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916cda1aa1
This adds a new system call to enable the use of guarded storage for
user space processes. The system call takes two arguments, a command
and pointer to a guarded storage control block:
s390_guarded_storage(int command, struct gs_cb *gs_cb);
The second argument is relevant only for the GS_SET_BC_CB command.
The commands in detail:
0 - GS_ENABLE
Enable the guarded storage facility for the current task. The
initial content of the guarded storage control block will be
all zeros. After the enablement the user space code can use
load-guarded-storage-controls instruction (LGSC) to load an
arbitrary control block. While a task is enabled the kernel
will save and restore the current content of the guarded
storage registers on context switch.
1 - GS_DISABLE
Disables the use of the guarded storage facility for the current
task. The kernel will cease to save and restore the content of
the guarded storage registers, the task specific content of
these registers is lost.
2 - GS_SET_BC_CB
Set a broadcast guarded storage control block. This is called
per thread and stores a specific guarded storage control block
in the task struct of the current task. This control block will
be used for the broadcast event GS_BROADCAST.
3 - GS_CLEAR_BC_CB
Clears the broadcast guarded storage control block. The guarded-
storage control block is removed from the task struct that was
established by GS_SET_BC_CB.
4 - GS_BROADCAST
Sends a broadcast to all thread siblings of the current task.
Every sibling that has established a broadcast guarded storage
control block will load this control block and will be enabled
for guarded storage. The broadcast guarded storage control block
is used up, a second broadcast without a refresh of the stored
control block with GS_SET_BC_CB will not have any effect.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
205 lines
6.2 KiB
C
205 lines
6.2 KiB
C
/*
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* Copyright IBM Corp. 1999, 2012
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* Author(s): Hartmut Penner <hp@de.ibm.com>,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Denis Joseph Barrow,
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*/
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#ifndef _ASM_S390_LOWCORE_H
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#define _ASM_S390_LOWCORE_H
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#include <linux/types.h>
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#include <asm/ptrace.h>
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#include <asm/cpu.h>
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#include <asm/types.h>
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#define LC_ORDER 1
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#define LC_PAGES 2
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struct lowcore {
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__u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
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__u32 ipl_parmblock_ptr; /* 0x0014 */
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__u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
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__u32 ext_params; /* 0x0080 */
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__u16 ext_cpu_addr; /* 0x0084 */
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__u16 ext_int_code; /* 0x0086 */
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__u16 svc_ilc; /* 0x0088 */
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__u16 svc_code; /* 0x008a */
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__u16 pgm_ilc; /* 0x008c */
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__u16 pgm_code; /* 0x008e */
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__u32 data_exc_code; /* 0x0090 */
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__u16 mon_class_num; /* 0x0094 */
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__u8 per_code; /* 0x0096 */
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__u8 per_atmid; /* 0x0097 */
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__u64 per_address; /* 0x0098 */
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__u8 exc_access_id; /* 0x00a0 */
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__u8 per_access_id; /* 0x00a1 */
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__u8 op_access_id; /* 0x00a2 */
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__u8 ar_mode_id; /* 0x00a3 */
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__u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
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__u64 trans_exc_code; /* 0x00a8 */
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__u64 monitor_code; /* 0x00b0 */
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__u16 subchannel_id; /* 0x00b8 */
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__u16 subchannel_nr; /* 0x00ba */
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__u32 io_int_parm; /* 0x00bc */
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__u32 io_int_word; /* 0x00c0 */
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__u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
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__u32 stfl_fac_list; /* 0x00c8 */
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__u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
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__u64 mcck_interruption_code; /* 0x00e8 */
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__u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
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__u32 external_damage_code; /* 0x00f4 */
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__u64 failing_storage_address; /* 0x00f8 */
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__u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
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__u64 breaking_event_addr; /* 0x0110 */
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__u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
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psw_t restart_old_psw; /* 0x0120 */
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psw_t external_old_psw; /* 0x0130 */
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psw_t svc_old_psw; /* 0x0140 */
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psw_t program_old_psw; /* 0x0150 */
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psw_t mcck_old_psw; /* 0x0160 */
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psw_t io_old_psw; /* 0x0170 */
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__u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
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psw_t restart_psw; /* 0x01a0 */
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psw_t external_new_psw; /* 0x01b0 */
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psw_t svc_new_psw; /* 0x01c0 */
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psw_t program_new_psw; /* 0x01d0 */
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psw_t mcck_new_psw; /* 0x01e0 */
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psw_t io_new_psw; /* 0x01f0 */
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/* Save areas. */
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__u64 save_area_sync[8]; /* 0x0200 */
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__u64 save_area_async[8]; /* 0x0240 */
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__u64 save_area_restart[1]; /* 0x0280 */
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/* CPU flags. */
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__u64 cpu_flags; /* 0x0288 */
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/* Return psws. */
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psw_t return_psw; /* 0x0290 */
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psw_t return_mcck_psw; /* 0x02a0 */
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/* CPU accounting and timing values. */
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__u64 sync_enter_timer; /* 0x02b0 */
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__u64 async_enter_timer; /* 0x02b8 */
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__u64 mcck_enter_timer; /* 0x02c0 */
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__u64 exit_timer; /* 0x02c8 */
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__u64 user_timer; /* 0x02d0 */
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__u64 guest_timer; /* 0x02d8 */
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__u64 system_timer; /* 0x02e0 */
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__u64 hardirq_timer; /* 0x02e8 */
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__u64 softirq_timer; /* 0x02f0 */
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__u64 steal_timer; /* 0x02f8 */
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__u64 last_update_timer; /* 0x0300 */
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__u64 last_update_clock; /* 0x0308 */
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__u64 int_clock; /* 0x0310 */
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__u64 mcck_clock; /* 0x0318 */
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__u64 clock_comparator; /* 0x0320 */
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/* Current process. */
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__u64 current_task; /* 0x0328 */
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__u8 pad_0x318[0x320-0x318]; /* 0x0330 */
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__u64 kernel_stack; /* 0x0338 */
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/* Interrupt, panic and restart stack. */
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__u64 async_stack; /* 0x0340 */
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__u64 panic_stack; /* 0x0348 */
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__u64 restart_stack; /* 0x0350 */
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/* Restart function and parameter. */
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__u64 restart_fn; /* 0x0358 */
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__u64 restart_data; /* 0x0360 */
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__u64 restart_source; /* 0x0368 */
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/* Address space pointer. */
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__u64 kernel_asce; /* 0x0370 */
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__u64 user_asce; /* 0x0378 */
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/*
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* The lpp and current_pid fields form a
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* 64-bit value that is set as program
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* parameter with the LPP instruction.
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*/
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__u32 lpp; /* 0x0380 */
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__u32 current_pid; /* 0x0384 */
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/* SMP info area */
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__u32 cpu_nr; /* 0x0388 */
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__u32 softirq_pending; /* 0x038c */
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__u64 percpu_offset; /* 0x0390 */
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__u64 vdso_per_cpu_data; /* 0x0398 */
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__u64 machine_flags; /* 0x03a0 */
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__u32 preempt_count; /* 0x03a8 */
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__u8 pad_0x03ac[0x03b0-0x03ac]; /* 0x03ac */
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__u64 gmap; /* 0x03b0 */
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__u32 spinlock_lockval; /* 0x03b8 */
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__u32 fpu_flags; /* 0x03bc */
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__u8 pad_0x03c0[0x0400-0x03c0]; /* 0x03c0 */
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/* Per cpu primary space access list */
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__u32 paste[16]; /* 0x0400 */
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__u8 pad_0x04c0[0x0e00-0x0440]; /* 0x0440 */
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/*
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* 0xe00 contains the address of the IPL Parameter Information
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* block. Dump tools need IPIB for IPL after dump.
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* Note: do not change the position of any fields in 0x0e00-0x0f00
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*/
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__u64 ipib; /* 0x0e00 */
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__u32 ipib_checksum; /* 0x0e08 */
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__u64 vmcore_info; /* 0x0e0c */
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__u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */
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__u64 os_info; /* 0x0e18 */
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__u8 pad_0x0e20[0x0f00-0x0e20]; /* 0x0e20 */
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/* Extended facility list */
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__u64 stfle_fac_list[32]; /* 0x0f00 */
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__u8 pad_0x1000[0x11b0-0x1000]; /* 0x1000 */
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/* Pointer to the machine check extended save area */
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__u64 mcesad; /* 0x11b0 */
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/* 64 bit extparam used for pfault/diag 250: defined by architecture */
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__u64 ext_params2; /* 0x11B8 */
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__u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
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/* CPU register save area: defined by architecture */
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__u64 floating_pt_save_area[16]; /* 0x1200 */
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__u64 gpregs_save_area[16]; /* 0x1280 */
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psw_t psw_save_area; /* 0x1300 */
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__u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
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__u32 prefixreg_save_area; /* 0x1318 */
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__u32 fpt_creg_save_area; /* 0x131c */
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__u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
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__u32 tod_progreg_save_area; /* 0x1324 */
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__u32 cpu_timer_save_area[2]; /* 0x1328 */
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__u32 clock_comp_save_area[2]; /* 0x1330 */
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__u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */
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__u32 access_regs_save_area[16]; /* 0x1340 */
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__u64 cregs_save_area[16]; /* 0x1380 */
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__u8 pad_0x1400[0x1800-0x1400]; /* 0x1400 */
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/* Transaction abort diagnostic block */
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__u8 pgm_tdb[256]; /* 0x1800 */
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__u8 pad_0x1900[0x2000-0x1900]; /* 0x1900 */
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} __packed;
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#define S390_lowcore (*((struct lowcore *) 0))
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extern struct lowcore *lowcore_ptr[];
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static inline void set_prefix(__u32 address)
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{
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asm volatile("spx %0" : : "m" (address) : "memory");
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}
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static inline __u32 store_prefix(void)
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{
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__u32 address;
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asm volatile("stpx %0" : "=m" (address));
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return address;
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}
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#endif /* _ASM_S390_LOWCORE_H */
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