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201d6a70b7
Currently we process the first i2c_dw_xfer_msg() in i2c_dw_xfer(), but in this case there is a possibility to be interrupted by certain interrupts. As described before in this patchset, we need to keep providing new transmit data within a given time period, otherwise Tx FIFO underrun takes place and STOP condition will be generated on the bus, even if we have more bytes to be written. In order to exclude all such possibilities, change TX_EMPTY interrupt usage as below: * DW_IC_INTR_DEFAULT_MASK: Define a default interrupt mask set, and put TX_EMPTY there. * i2c_dw_xfer_init: Enable DW_IC_INTR_DEFAULT_MASK prior to initiating a new I2C transaction. The first TX_EMPTY will be triggered shortly. With the help of it, we can make the first call to i2c_dw_xfer_msg() in the interrupt handler. * i2c_dw_xfer_msg: Fixup intr_mask operation accordingly. Make sure that TX_EMPTY operations need to be reversed. * request_irq: Set IRQF_DISABLED so that we could load transmit data into Tx FIFO without being distracted by other interrupts. * Remove i2c_dw_xfer_msg() in i2c_dw_xfer(). Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org> |
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| .. | ||
| algos | ||
| busses | ||
| chips | ||
| i2c-boardinfo.c | ||
| i2c-core.c | ||
| i2c-core.h | ||
| i2c-dev.c | ||
| Kconfig | ||
| Makefile | ||