Ralph Siemsen 1ef48138f9 clk: renesas: r9a06g032: Improve clock tables ... Each entry in the clock table specifies a number of individual bits in registers, for contolling clock reset, gaiting, etc. These reg/bit were packed into a u16 to save space. The combined value is difficult to understand when reviewing the clock table entries. Introduce a "struct regbit" which still occupies only 16 bits, but allows the register and bit values to be specified explicitly. Convert all previous uses of u16 for reg/bit into "struct regbit". The bulk of this patch converts the clock table to use struct regbit, making use of the RB() helper macro. The conversion was automated by script, and as a further verification, the compiled binary of the table was compared before/after the change (with objdump -D). The clk_rdesc_set() function now checks for zero reg/bit internally. This allows callers of that function to remove those checks. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230301215520.828455-5-ralph.siemsen@linaro.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>		2023-03-10 17:09:00 +01:00
..
clk-div6.c	clk: renesas: div6: Implement range checking	2021-05-11 09:58:13 +02:00
clk-div6.h	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
clk-emev2.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-mstp.c	clk: renesas: Zero init clk_init_data	2021-03-30 09:58:27 +02:00
clk-r8a73a4.c	clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg	2022-06-13 11:53:18 +02:00
clk-r8a7740.c	clk: renesas: r8a7740: Remove r8a7740_cpg.reg	2022-06-13 11:53:18 +02:00
clk-r8a7778.c	clk: renesas: r8a7778: Remove struct r8a7778_cpg	2022-06-13 11:53:18 +02:00
clk-r8a7779.c	clk: renesas: r8a7779: Remove struct r8a7779_cpg	2022-06-13 11:53:18 +02:00
clk-rz.c	clk: renesas: rza1: Remove struct rz_cpg	2022-06-13 11:53:18 +02:00
clk-sh73a0.c	clk: renesas: sh73a0: Remove sh73a0_cpg.reg	2022-06-13 11:53:18 +02:00
Kconfig	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-02-10 10:35:16 +01:00
Makefile	clk: renesas: Add RZ/V2M support using the rzg2l driver	2022-05-06 09:38:40 +02:00
r7s9210-cpg-mssr.c	clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag	2020-09-17 15:30:08 +02:00
r8a774a1-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a774b1-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a774c0-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a774e1-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a779a0-cpg-mssr.c	clk: renesas: r8a779a0: Tidy up DMAC name on SYS-DMAC	2023-01-26 15:13:24 +01:00
r8a779f0-cpg-mssr.c	clk: renesas: r8a779f0: Fix Ethernet Switch clocks	2022-11-16 09:05:59 +01:00
r8a779g0-cpg-mssr.c	clk: renesas: r8a779g0: Add VIN clocks	2023-03-06 10:42:14 +01:00
r8a7742-cpg-mssr.c	clk: renesas: r8a7742: Add clk entry for VSPR	2020-09-04 09:42:01 +02:00
r8a7743-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7745-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7790-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7791-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7792-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7794-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7795-cpg-mssr.c	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-02-10 10:35:16 +01:00
r8a7796-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a77470-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a77965-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a77970-cpg-mssr.c	clk: renesas: r8a77970: Add Z2 clock	2023-03-10 17:07:07 +01:00
r8a77980-cpg-mssr.c	clk: renesas: r8a77980: Add Z2 clock	2023-03-10 17:07:08 +01:00
r8a77990-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a77995-cpg-mssr.c	clk: renesas: r8a77995: Fix VIN parent clock	2023-03-06 10:42:14 +01:00
r9a06g032-clocks.c	clk: renesas: r9a06g032: Improve clock tables	2023-03-10 17:09:00 +01:00
r9a07g043-cpg.c	clk: renesas: r9a07g043: Drop WDT2 clock and reset entry	2022-10-26 12:38:01 +02:00
r9a07g044-cpg.c	clk: renesas: r9a07g044: Add clock and reset entries for CRU	2023-01-12 17:18:48 +01:00
r9a09g011-cpg.c	clk: renesas: r9a09g011: Add SDHI/eMMC clock and reset entries	2022-12-27 09:45:23 +01:00
rcar-cpg-lib.c	clk: renesas: rcar-gen3: Switch to new SD clock handling	2021-11-19 11:32:39 +01:00
rcar-cpg-lib.h	clk: renesas: rcar-gen3: Switch to new SD clock handling	2021-11-19 11:32:39 +01:00
rcar-gen2-cpg.c	clk: renesas: Zero init clk_init_data	2021-03-30 09:58:27 +02:00
rcar-gen2-cpg.h	clk: renesas: rcar-gen2: Change multipliers and dividers to u8	2019-12-10 10:24:10 +01:00
rcar-gen3-cpg.c	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-02-10 10:35:16 +01:00
rcar-gen3-cpg.h	clk: renesas: r8a77995: Add RPC clocks	2022-04-11 12:13:13 +02:00
rcar-gen4-cpg.c	clk: renesas: r8a779g0: Add custom clock for PLL2	2023-01-24 10:11:50 +01:00
rcar-gen4-cpg.h	clk: renesas: r8a779g0: Add custom clock for PLL2	2023-01-24 10:11:50 +01:00
rcar-usb2-clock-sel.c	clk: renesas: rcar-usb2-clock-sel: Fix kernel NULL pointer dereference	2021-08-28 21:29:36 -07:00
renesas-cpg-mssr.c	clk: renesas: cpg-mssr: Update MSSR register range for R-Car V4H	2023-03-06 10:42:14 +01:00
renesas-cpg-mssr.h	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-02-10 10:35:16 +01:00
rzg2l-cpg.c	clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM	2022-10-28 14:35:57 +02:00
rzg2l-cpg.h	clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM	2022-10-28 14:35:57 +02:00