linux/drivers/clk/Kconfig
Linus Torvalds ca4e7c5120 The large diff this time around is from the addition of a new clk driver
for the TI Davinci family of SoCs. So far those clks have been supported
 with a custom implementation of the clk API in the arch port instead of in
 the CCF. With this driver merged we're one step closer to having a single
 clk API implementation.
 
 The other large diff is from the Amlogic clk driver that underwent some
 major surgery to use regmap. Beyond that, the biggest hitter is Samsung
 which needed some reworks to properly handle clk provider power domains
 and a bunch of PLL rate updates.
 
 The core framework was fairly quiet this round, just getting some cleanups
 and small fixes for some of the more esoteric features. And the usual
 set of driver non-critical fixes, cleanups, and minor additions are here as
 well.
 
 Core:
  - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops
  - debugfs ops macroized to shave some lines of boilerplate code
  - Always calculate the phase instead of caching it in clk_get_phase()
  - More __must_check on bulk clk APIs
 
 New Drivers:
  - TI's Davinci family of SoCs
  - Intel's Stratix10 SoC
  - stm32mp157 SoC
  - Allwinner H6 CCU
  - Silicon Labs SI544 clock generator chip
  - Renesas R-Car M3-N and V3H SoCs
  - i.MX6SLL SoCs
 
 Removed Drivers:
  - ST-Ericsson AB8540/9540
 
 Updates:
  - Mediatek MT2701 and MT7622 audsys support and MT2712 updates
  - STM32F469 DSI and STM32F769 sdmmc2 support
  - GPIO clks can sleep now
  - Spreadtrum SC9860 RTC clks
  - Nvidia Tegra MBIST workarounds and various minor fixes
  - Rockchip phase handling fixes and a memory leak plugged
  - Renesas drivers switch to readl/writel from clk_readl/clk_writel
  - Renesas gained CPU (Z/Z2) and watchdog support
  - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support
  - Qualcomm PM8921 PMIC XO buffers
  - Amlogic migrates to regmap APIs
  - TI Keystone clk latching support
  - Allwinner H3 and H5 video clk fixes
  - Broadcom BCM2835 PLLs needed another bit to enable
  - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix
  - i.MX6UL/ULL epdc_podf support
  - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The large diff this time around is from the addition of a new clk
  driver for the TI Davinci family of SoCs. So far those clks have been
  supported with a custom implementation of the clk API in the arch port
  instead of in the CCF. With this driver merged we're one step closer
  to having a single clk API implementation.

  The other large diff is from the Amlogic clk driver that underwent
  some major surgery to use regmap. Beyond that, the biggest hitter is
  Samsung which needed some reworks to properly handle clk provider
  power domains and a bunch of PLL rate updates.

  The core framework was fairly quiet this round, just getting some
  cleanups and small fixes for some of the more esoteric features. And
  the usual set of driver non-critical fixes, cleanups, and minor
  additions are here as well.

  Core:
   - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops
   - debugfs ops macroized to shave some lines of boilerplate code
   - Always calculate the phase instead of caching it in clk_get_phase()
   - More __must_check on bulk clk APIs

  New Drivers:
   - TI's Davinci family of SoCs
   - Intel's Stratix10 SoC
   - stm32mp157 SoC
   - Allwinner H6 CCU
   - Silicon Labs SI544 clock generator chip
   - Renesas R-Car M3-N and V3H SoCs
   - i.MX6SLL SoCs

  Removed Drivers:
   - ST-Ericsson AB8540/9540

  Updates:
   - Mediatek MT2701 and MT7622 audsys support and MT2712 updates
   - STM32F469 DSI and STM32F769 sdmmc2 support
   - GPIO clks can sleep now
   - Spreadtrum SC9860 RTC clks
   - Nvidia Tegra MBIST workarounds and various minor fixes
   - Rockchip phase handling fixes and a memory leak plugged
   - Renesas drivers switch to readl/writel from clk_readl/clk_writel
   - Renesas gained CPU (Z/Z2) and watchdog support
   - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support
   - Qualcomm PM8921 PMIC XO buffers
   - Amlogic migrates to regmap APIs
   - TI Keystone clk latching support
   - Allwinner H3 and H5 video clk fixes
   - Broadcom BCM2835 PLLs needed another bit to enable
   - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix
   - i.MX6UL/ULL epdc_podf support
   - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits)
  clk: davinci: add a reset lookup table for psc0
  clk: imx: add clock driver for imx6sll
  dt-bindings: imx: update clock doc for imx6sll
  clk: imx: add new gate/gate2 wrapper funtion
  clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux
  clk: cs2000: set pm_ops in hibernate-compatible way
  clk: bcm2835: De-assert/assert PLL reset signal when appropriate
  clk: imx7d: Move clks_init_on before any clock operations
  clk: imx7d: Correct ahb clk parent select
  clk: imx7d: Correct dram pll type
  clk: imx7d: Add USB clock information
  clk: socfpga: stratix10: add clock driver for Stratix10 platform
  dt-bindings: documentation: add clock bindings information for Stratix10
  clk: ti: fix flag space conflict with clkctrl clocks
  clk: uniphier: add additional ethernet clock lines for Pro4
  clk: uniphier: add SATA clock control support
  clk: uniphier: add PCIe clock control support
  clk: Add driver for the si544 clock generator chip
  clk: davinci: Remove redundant dev_err calls
  clk: uniphier: add ethernet clock control support for PXs3
  ...
2018-04-13 15:51:06 -07:00

299 lines
8.6 KiB
Plaintext

config CLKDEV_LOOKUP
bool
select HAVE_CLK
config HAVE_CLK_PREPARE
bool
config COMMON_CLK
bool
select HAVE_CLK_PREPARE
select CLKDEV_LOOKUP
select SRCU
select RATIONAL
---help---
The common clock framework is a single definition of struct
clk, useful across many platforms, as well as an
implementation of the clock API in include/linux/clk.h.
Architectures utilizing the common struct clk should select
this option.
menu "Common Clock Framework"
depends on COMMON_CLK
config COMMON_CLK_WM831X
tristate "Clock driver for WM831x/2x PMICs"
depends on MFD_WM831X
---help---
Supports the clocking subsystem of the WM831x/2x series of
PMICs from Wolfson Microelectronics.
source "drivers/clk/versatile/Kconfig"
config CLK_HSDK
bool "PLL Driver for HSDK platform"
depends on OF || COMPILE_TEST
---help---
This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
control.
config COMMON_CLK_MAX77686
tristate "Clock driver for Maxim 77620/77686/77802 MFD"
depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
---help---
This driver supports Maxim 77620/77686/77802 crystal oscillator
clock.
config COMMON_CLK_RK808
tristate "Clock driver for RK805/RK808/RK818"
depends on MFD_RK808
---help---
This driver supports RK805, RK808 and RK818 crystal oscillator clock. These
multi-function devices have two fixed-rate oscillators,
clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
by control register.
config COMMON_CLK_HI655X
tristate "Clock driver for Hi655x" if EXPERT
depends on (MFD_HI655X_PMIC || COMPILE_TEST)
depends on REGMAP
default MFD_HI655X_PMIC
---help---
This driver supports the hi655x PMIC clock. This
multi-function device has one fixed-rate oscillator, clocked
at 32KHz.
config COMMON_CLK_SCMI
tristate "Clock driver controlled via SCMI interface"
depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
---help---
This driver provides support for clocks that are controlled
by firmware that implements the SCMI interface.
This driver uses SCMI Message Protocol to interact with the
firmware providing all the clock controls.
config COMMON_CLK_SCPI
tristate "Clock driver controlled via SCPI interface"
depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
---help---
This driver provides support for clocks that are controlled
by firmware that implements the SCPI interface.
This driver uses SCPI Message Protocol to interact with the
firmware providing all the clock controls.
config COMMON_CLK_SI5351
tristate "Clock driver for SiLabs 5351A/B/C"
depends on I2C
select REGMAP_I2C
select RATIONAL
---help---
This driver supports Silicon Labs 5351A/B/C programmable clock
generators.
config COMMON_CLK_SI514
tristate "Clock driver for SiLabs 514 devices"
depends on I2C
depends on OF
select REGMAP_I2C
help
---help---
This driver supports the Silicon Labs 514 programmable clock
generator.
config COMMON_CLK_SI544
tristate "Clock driver for SiLabs 544 devices"
depends on I2C
select REGMAP_I2C
help
---help---
This driver supports the Silicon Labs 544 programmable clock
generator.
config COMMON_CLK_SI570
tristate "Clock driver for SiLabs 570 and compatible devices"
depends on I2C
depends on OF
select REGMAP_I2C
help
---help---
This driver supports Silicon Labs 570/571/598/599 programmable
clock generators.
config COMMON_CLK_CDCE706
tristate "Clock driver for TI CDCE706 clock synthesizer"
depends on I2C
select REGMAP_I2C
select RATIONAL
---help---
This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
config COMMON_CLK_CDCE925
tristate "Clock driver for TI CDCE913/925/937/949 devices"
depends on I2C
depends on OF
select REGMAP_I2C
help
---help---
This driver supports the TI CDCE913/925/937/949 programmable clock
synthesizer. Each chip has different number of PLLs and outputs.
For example, the CDCE925 contains two PLLs with spread-spectrum
clocking support and five output dividers. The driver only supports
the following setup, and uses a fixed setting for the output muxes.
Y1 is derived from the input clock
Y2 and Y3 derive from PLL1
Y4 and Y5 derive from PLL2
Given a target output frequency, the driver will set the PLL and
divider to best approximate the desired output.
config COMMON_CLK_CS2000_CP
tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
depends on I2C
help
If you say yes here you get support for the CS2000 clock multiplier.
config COMMON_CLK_GEMINI
bool "Clock driver for Cortina Systems Gemini SoC"
depends on ARCH_GEMINI || COMPILE_TEST
select MFD_SYSCON
select RESET_CONTROLLER
---help---
This driver supports the SoC clocks on the Cortina Systems Gemini
platform, also known as SL3516 or CS3516.
config COMMON_CLK_ASPEED
bool "Clock driver for Aspeed BMC SoCs"
depends on ARCH_ASPEED || COMPILE_TEST
default ARCH_ASPEED
select MFD_SYSCON
select RESET_CONTROLLER
---help---
This driver supports the SoC clocks on the Aspeed BMC platforms.
The G4 and G5 series, including the ast2400 and ast2500, are supported
by this driver.
config COMMON_CLK_S2MPS11
tristate "Clock driver for S2MPS1X/S5M8767 MFD"
depends on MFD_SEC_CORE || COMPILE_TEST
---help---
This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
clock. These multi-function devices have two (S2MPS14) or three
(S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
config CLK_TWL6040
tristate "External McPDM functional clock from twl6040"
depends on TWL6040_CORE
---help---
Enable the external functional clock support on OMAP4+ platforms for
McPDM. McPDM module is using the external bit clock on the McPDM bus
as functional clock.
config COMMON_CLK_AXI_CLKGEN
tristate "AXI clkgen driver"
depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
help
---help---
Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
FPGAs. It is commonly used in Analog Devices' reference designs.
config CLK_QORIQ
bool "Clock driver for Freescale QorIQ platforms"
depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
---help---
This adds the clock driver support for Freescale QorIQ platforms
using common clock framework.
config COMMON_CLK_XGENE
bool "Clock driver for APM XGene SoC"
default y
depends on ARM64 || COMPILE_TEST
---help---
Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
config COMMON_CLK_NXP
def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
select REGMAP_MMIO if ARCH_LPC32XX
select MFD_SYSCON if ARCH_LPC18XX
---help---
Support for clock providers on NXP platforms.
config COMMON_CLK_PALMAS
tristate "Clock driver for TI Palmas devices"
depends on MFD_PALMAS
---help---
This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
using common clock framework.
config COMMON_CLK_PWM
tristate "Clock driver for PWMs used as clock outputs"
depends on PWM
---help---
Adapter driver so that any PWM output can be (mis)used as clock signal
at 50% duty cycle.
config COMMON_CLK_PXA
def_bool COMMON_CLK && ARCH_PXA
---help---
Support for the Marvell PXA SoC.
config COMMON_CLK_PIC32
def_bool COMMON_CLK && MACH_PIC32
config COMMON_CLK_OXNAS
bool "Clock driver for the OXNAS SoC Family"
depends on ARCH_OXNAS || COMPILE_TEST
select MFD_SYSCON
---help---
Support for the OXNAS SoC Family clocks.
config COMMON_CLK_VC5
tristate "Clock driver for IDT VersaClock 5,6 devices"
depends on I2C
depends on OF
select REGMAP_I2C
help
---help---
This driver supports the IDT VersaClock 5 and VersaClock 6
programmable clock generators.
config COMMON_CLK_STM32MP157
def_bool COMMON_CLK && MACH_STM32MP157
help
---help---
Support for stm32mp157 SoC family clocks
config COMMON_CLK_STM32F
bool "Clock driver for stm32f4 and stm32f7 SoC families"
depends on MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746
help
---help---
Support for stm32f4 and stm32f7 SoC families clocks
config COMMON_CLK_STM32H7
bool "Clock driver for stm32h7 SoC family"
depends on MACH_STM32H743
help
---help---
Support for stm32h7 SoC family clocks
source "drivers/clk/bcm/Kconfig"
source "drivers/clk/hisilicon/Kconfig"
source "drivers/clk/imgtec/Kconfig"
source "drivers/clk/keystone/Kconfig"
source "drivers/clk/mediatek/Kconfig"
source "drivers/clk/meson/Kconfig"
source "drivers/clk/mvebu/Kconfig"
source "drivers/clk/qcom/Kconfig"
source "drivers/clk/renesas/Kconfig"
source "drivers/clk/samsung/Kconfig"
source "drivers/clk/sprd/Kconfig"
source "drivers/clk/sunxi-ng/Kconfig"
source "drivers/clk/tegra/Kconfig"
source "drivers/clk/ti/Kconfig"
source "drivers/clk/uniphier/Kconfig"
endmenu