Chris Wilson 1af8452f16 drm/i915: Revert workaround for disabling L3 cache aging on IVB ... In commit e4e0c058a1 Author: Eugeni Dodonov <eugeni.dodonov@intel.com> Date: Wed Feb 8 12:53:50 2012 -0800 drm/i915: gen7: Implement an L3 caching workaround. the L3 cache aging was disabled. This was part of a shotgun response to a number of GPU hang bugs, but there appears to be no documentation to suggest that disabling the L3 cache age was ever required (to prevent the GPU hangs). Restoring the L3 cache age is a minor performance win of around 2% on IVB:GT2. (Note that this value seems to be consistent across a number of tests and so appears to be above the usual noise.) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2014-03-05 21:30:02 +01:00
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drm	drm/i915: Revert workaround for disabling L3 cache aging on IVB	2014-03-05 21:30:02 +01:00
host1x	gpu: host1x: Remove unnecessary include	2014-01-14 14:39:45 +01:00
vga	vgaarb: Fix VGA decodes changes	2013-09-03 19:17:59 +02:00
Makefile	gpu: host1x: Add host1x driver	2013-04-22 12:32:40 +02:00