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0489929f73
caam driver needs to be aware of OP-TEE f/w presence, since some things are done differently: 1. there is no access to controller's register page (note however that some registers are aliased in job rings' register pages) 2 Due to this, MCFGR[PS] cannot be read and driver assumes MCFGR[PS] = b'0 - engine using 32-bit address pointers. This is in sync with the fact that: -all i.MX SoCs currently use MCFGR[PS] = b'0 -only i.MX OP-TEE use cases don't allow access to controller register page Signed-off-by: Horia GeantA <horia.geanta@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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| .. | ||
| blob_gen.c | ||
| caamalg.c | ||
| caamalg_desc.c | ||
| caamalg_desc.h | ||
| caamalg_qi.c | ||
| caamalg_qi2.c | ||
| caamalg_qi2.h | ||
| caamhash.c | ||
| caamhash_desc.c | ||
| caamhash_desc.h | ||
| caampkc.c | ||
| caampkc.h | ||
| caamprng.c | ||
| caamrng.c | ||
| compat.h | ||
| ctrl.c | ||
| ctrl.h | ||
| debugfs.c | ||
| debugfs.h | ||
| desc.h | ||
| desc_constr.h | ||
| dpseci-debugfs.c | ||
| dpseci-debugfs.h | ||
| dpseci.c | ||
| dpseci.h | ||
| dpseci_cmd.h | ||
| error.c | ||
| error.h | ||
| intern.h | ||
| jr.c | ||
| jr.h | ||
| Kconfig | ||
| key_gen.c | ||
| key_gen.h | ||
| Makefile | ||
| pdb.h | ||
| pkc_desc.c | ||
| qi.c | ||
| qi.h | ||
| regs.h | ||
| sg_sw_qm.h | ||
| sg_sw_qm2.h | ||
| sg_sw_sec4.h | ||