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https://github.com/torvalds/linux
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12f460f234
Implement the bridge join, leave and set_stp callbacks by making that we do the following: - when a port joins the bridge, all existing ports in the bridge get their VLAN control register updated with that joining port - the joining port is including all existing bridge ports in its own VLAN control register The leave operation is fairly similar, special care must be taken to make sure that port leaving the bridging is not removing itself from its own VLAN control register. Since the various BR_* states apply directly to our HW semantics, we just need to translate these constants into their corresponding HW settings, and voila! We make sure to trigger a fast-ageing process for ports that are joining/leaving the bridge and transition from incompatible states, this is equivalent to triggering an ARL flush for that port. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
150 lines
3.6 KiB
C
150 lines
3.6 KiB
C
/*
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* Broadcom Starfighter2 private context
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*
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* Copyright (C) 2014, Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __BCM_SF2_H
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#define __BCM_SF2_H
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#include <linux/platform_device.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <net/dsa.h>
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#include "bcm_sf2_regs.h"
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struct bcm_sf2_hw_params {
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u16 top_rev;
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u16 core_rev;
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u16 gphy_rev;
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u32 num_gphy;
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u8 num_acb_queue;
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u8 num_rgmii;
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u8 num_ports;
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u8 fcb_pause_override:1;
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u8 acb_packets_inflight:1;
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};
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#define BCM_SF2_REGS_NAME {\
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"core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" \
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}
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#define BCM_SF2_REGS_NUM 6
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struct bcm_sf2_port_status {
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unsigned int link;
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struct ethtool_eee eee;
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u32 vlan_ctl_mask;
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};
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struct bcm_sf2_priv {
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/* Base registers, keep those in order with BCM_SF2_REGS_NAME */
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void __iomem *core;
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void __iomem *reg;
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void __iomem *intrl2_0;
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void __iomem *intrl2_1;
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void __iomem *fcb;
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void __iomem *acb;
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/* spinlock protecting access to the indirect registers */
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spinlock_t indir_lock;
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int irq0;
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int irq1;
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u32 irq0_stat;
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u32 irq0_mask;
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u32 irq1_stat;
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u32 irq1_mask;
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/* Mutex protecting access to the MIB counters */
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struct mutex stats_mutex;
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struct bcm_sf2_hw_params hw_params;
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struct bcm_sf2_port_status port_sts[DSA_MAX_PORTS];
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/* Mask of ports enabled for Wake-on-LAN */
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u32 wol_ports_mask;
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};
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struct bcm_sf2_hw_stats {
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const char *string;
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u16 reg;
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u8 sizeof_stat;
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};
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#define SF2_IO_MACRO(name) \
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static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \
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{ \
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return __raw_readl(priv->name + off); \
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} \
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static inline void name##_writel(struct bcm_sf2_priv *priv, \
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u32 val, u32 off) \
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{ \
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__raw_writel(val, priv->name + off); \
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} \
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/* Accesses to 64-bits register requires us to latch the hi/lo pairs
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* using the REG_DIR_DATA_{READ,WRITE} ancillary registers. The 'indir_lock'
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* spinlock is automatically grabbed and released to provide relative
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* atomiticy with latched reads/writes.
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*/
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#define SF2_IO64_MACRO(name) \
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static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off) \
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{ \
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u32 indir, dir; \
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spin_lock(&priv->indir_lock); \
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indir = reg_readl(priv, REG_DIR_DATA_READ); \
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dir = __raw_readl(priv->name + off); \
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spin_unlock(&priv->indir_lock); \
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return (u64)indir << 32 | dir; \
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} \
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static inline void name##_writeq(struct bcm_sf2_priv *priv, u32 off, \
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u64 val) \
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{ \
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spin_lock(&priv->indir_lock); \
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reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE); \
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__raw_writel(lower_32_bits(val), priv->name + off); \
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spin_unlock(&priv->indir_lock); \
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}
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#define SWITCH_INTR_L2(which) \
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static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \
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u32 mask) \
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{ \
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intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
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priv->irq##which##_mask &= ~(mask); \
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} \
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static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \
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u32 mask) \
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{ \
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intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
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priv->irq##which##_mask |= (mask); \
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} \
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SF2_IO_MACRO(core);
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SF2_IO_MACRO(reg);
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SF2_IO64_MACRO(core);
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SF2_IO_MACRO(intrl2_0);
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SF2_IO_MACRO(intrl2_1);
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SF2_IO_MACRO(fcb);
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SF2_IO_MACRO(acb);
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SWITCH_INTR_L2(0);
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SWITCH_INTR_L2(1);
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#endif /* __BCM_SF2_H */
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