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f209132104
Similar to the syndrome calculation, the recovery algorithms also work on 64 bytes at a time to align with the L1 cache line size of current and future LoongArch cores (that we care about). Which means unrolled-by-4 LSX and unrolled-by-2 LASX code. The assembly is originally based on the x86 SSSE3/AVX2 ports, but register allocation has been redone to take advantage of LSX/LASX's 32 vector registers, and instruction sequence has been optimized to suit (e.g. LoongArch can perform per-byte srl and andi on vectors, but x86 cannot). Performance numbers measured by instrumenting the raid6test code, on a 3A5000 system clocked at 2.5GHz: > lasx 2data: 354.987 MiB/s > lasx datap: 350.430 MiB/s > lsx 2data: 340.026 MiB/s > lsx datap: 337.318 MiB/s > intx1 2data: 164.280 MiB/s > intx1 datap: 187.966 MiB/s Because recovery algorithms are chosen solely based on priority and availability, lasx is marked as priority 2 and lsx priority 1. At least for the current generation of LoongArch micro-architectures, LASX should always be faster than LSX whenever supported, and have similar power consumption characteristics (because the only known LASX-capable uarch, the LA464, always compute the full 256-bit result for vector ops). Acked-by: Song Liu <song@kernel.org> Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
152 lines
4.1 KiB
Makefile
152 lines
4.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# This is a simple Makefile to test some of the RAID-6 code
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# from userspace.
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#
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pound := \#
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# Adjust as desired
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CC = gcc
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OPTFLAGS = -O2
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CFLAGS = -I.. -I ../../../include -g $(OPTFLAGS)
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LD = ld
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AWK = awk -f
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AR = ar
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RANLIB = ranlib
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OBJS = int1.o int2.o int4.o int8.o int16.o int32.o recov.o algos.o tables.o
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ARCH := $(shell uname -m 2>/dev/null | sed -e /s/i.86/i386/)
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ifeq ($(ARCH),i386)
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CFLAGS += -DCONFIG_X86_32
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IS_X86 = yes
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endif
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ifeq ($(ARCH),x86_64)
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CFLAGS += -DCONFIG_X86_64
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IS_X86 = yes
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endif
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ifeq ($(ARCH),arm)
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CFLAGS += -I../../../arch/arm/include -mfpu=neon
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HAS_NEON = yes
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endif
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ifeq ($(ARCH),aarch64)
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CFLAGS += -I../../../arch/arm64/include
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HAS_NEON = yes
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endif
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ifeq ($(findstring ppc,$(ARCH)),ppc)
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CFLAGS += -I../../../arch/powerpc/include
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HAS_ALTIVEC := $(shell printf '$(pound)include <altivec.h>\nvector int a;\n' |\
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gcc -c -x c - >/dev/null && rm ./-.o && echo yes)
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endif
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ifeq ($(ARCH),loongarch64)
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CFLAGS += -I../../../arch/loongarch/include -DCONFIG_LOONGARCH=1
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CFLAGS += $(shell echo 'vld $$vr0, $$zero, 0' | \
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gcc -c -x assembler - >/dev/null 2>&1 && \
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rm ./-.o && echo -DCONFIG_CPU_HAS_LSX=1)
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CFLAGS += $(shell echo 'xvld $$xr0, $$zero, 0' | \
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gcc -c -x assembler - >/dev/null 2>&1 && \
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rm ./-.o && echo -DCONFIG_CPU_HAS_LASX=1)
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endif
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ifeq ($(IS_X86),yes)
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OBJS += mmx.o sse1.o sse2.o avx2.o recov_ssse3.o recov_avx2.o avx512.o recov_avx512.o
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CFLAGS += -DCONFIG_X86
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CFLAGS += $(shell echo "vpmovm2b %k1, %zmm5" | \
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gcc -c -x assembler - >/dev/null 2>&1 && \
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rm ./-.o && echo -DCONFIG_AS_AVX512=1)
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else ifeq ($(HAS_NEON),yes)
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OBJS += neon.o neon1.o neon2.o neon4.o neon8.o recov_neon.o recov_neon_inner.o
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CFLAGS += -DCONFIG_KERNEL_MODE_NEON=1
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else ifeq ($(HAS_ALTIVEC),yes)
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CFLAGS += -DCONFIG_ALTIVEC
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OBJS += altivec1.o altivec2.o altivec4.o altivec8.o \
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vpermxor1.o vpermxor2.o vpermxor4.o vpermxor8.o
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else ifeq ($(ARCH),loongarch64)
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OBJS += loongarch_simd.o recov_loongarch_simd.o
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endif
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.c.o:
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$(CC) $(CFLAGS) -c -o $@ $<
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%.c: ../%.c
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cp -f $< $@
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%.uc: ../%.uc
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cp -f $< $@
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all: raid6.a raid6test
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raid6.a: $(OBJS)
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rm -f $@
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$(AR) cq $@ $^
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$(RANLIB) $@
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raid6test: test.c raid6.a
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$(CC) $(CFLAGS) -o raid6test $^
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neon1.c: neon.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=1 < neon.uc > $@
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neon2.c: neon.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=2 < neon.uc > $@
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neon4.c: neon.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=4 < neon.uc > $@
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neon8.c: neon.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=8 < neon.uc > $@
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altivec1.c: altivec.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=1 < altivec.uc > $@
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altivec2.c: altivec.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=2 < altivec.uc > $@
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altivec4.c: altivec.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=4 < altivec.uc > $@
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altivec8.c: altivec.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=8 < altivec.uc > $@
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vpermxor1.c: vpermxor.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=1 < vpermxor.uc > $@
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vpermxor2.c: vpermxor.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=2 < vpermxor.uc > $@
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vpermxor4.c: vpermxor.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=4 < vpermxor.uc > $@
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vpermxor8.c: vpermxor.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=8 < vpermxor.uc > $@
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int1.c: int.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=1 < int.uc > $@
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int2.c: int.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=2 < int.uc > $@
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int4.c: int.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=4 < int.uc > $@
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int8.c: int.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=8 < int.uc > $@
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int16.c: int.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=16 < int.uc > $@
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int32.c: int.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=32 < int.uc > $@
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tables.c: mktables
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./mktables > tables.c
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clean:
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rm -f *.o *.a mktables mktables.c *.uc int*.c altivec*.c vpermxor*.c neon*.c tables.c raid6test
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spotless: clean
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rm -f *~
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