Thierry Reding 11cec15bf3 iommu/tegra-smmu: Parameterize number of TLB lines ... The number of TLB lines was increased from 16 on Tegra30 to 32 on Tegra114 and later. Parameterize the value so that the initial default can be set accordingly. On Tegra30, initializing the value to 32 would effectively disable the TLB and hence cause massive latencies for memory accesses translated through the SMMU. This is especially noticeable for isochronuous clients such as display, whose FIFOs would continuously underrun. Fixes: 8918465163 ("memory: Add NVIDIA Tegra memory controller support") Signed-off-by: Thierry Reding <treding@nvidia.com>		2015-08-13 17:05:28 +02:00
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tegra	iommu/tegra-smmu: Parameterize number of TLB lines	2015-08-13 17:05:28 +02:00
atmel-sdramc.c	memory: drop owner assignment from platform_drivers	2014-10-20 16:20:52 +02:00
emif.c	drivers/memory: don't check resource with devm_ioremap_resource	2013-05-18 11:55:52 +02:00
emif.h	memory: emif: handle frequency and voltage change events	2012-05-02 10:52:09 -07:00
fsl-corenet-cf.c	memory/fsl-corenet-cf: Add t1040 support	2015-01-29 22:57:43 -06:00
fsl_ifc.c	fsl_ifc: Support all 8 IFC chip selects	2014-11-05 14:45:53 -08:00
jz4780-nemc.c	memory: jz4780-nemc: driver for the NEMC on JZ4780 SoCs	2015-03-26 23:51:36 +01:00
Kconfig	memory: omap-gpmc: Add Kconfig option for debug	2015-06-01 19:22:10 -06:00
Makefile	memory: jz4780-nemc: driver for the NEMC on JZ4780 SoCs	2015-03-26 23:51:36 +01:00
mvebu-devbus.c	memory: drop owner assignment from platform_drivers	2014-10-20 16:20:52 +02:00
of_memory.c	memory: emif: add device tree support to emif driver	2012-09-04 16:14:31 -07:00
of_memory.h	memory: fix build when CONFIG_OF && !CONFIG_DDR	2012-09-05 11:57:19 -07:00
omap-gpmc.c	memory: omap-gpmc: Add Kconfig option for debug	2015-06-01 19:22:10 -06:00
tegra20-mc.c	memory: drop owner assignment from platform_drivers	2014-10-20 16:20:52 +02:00
ti-aemif.c	memory: drop owner assignment from platform_drivers	2014-10-20 16:20:52 +02:00