mirror of
https://github.com/torvalds/linux
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d9c14743a3
The clock information is being kept in the custom register on Intel MID
platforms. Each controller has its own dedicated custom register for that.
Thus, to get a proper frequency we have to read value from the specific offset
to the register block. This patch makes this happen.
Fixes: d58cf5ff65 (spi: dw-pci: describe Intel MID controllers better)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
164 lines
3.7 KiB
C
164 lines
3.7 KiB
C
/*
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* PCI interface driver for DW SPI Core
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*
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* Copyright (c) 2009, 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/module.h>
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#include "spi-dw.h"
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#define DRIVER_NAME "dw_spi_pci"
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struct dw_spi_pci {
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struct pci_dev *pdev;
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struct dw_spi dws;
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};
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struct spi_pci_desc {
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int (*setup)(struct dw_spi *);
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u16 num_cs;
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u16 bus_num;
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};
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static struct spi_pci_desc spi_pci_mid_desc_1 = {
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.setup = dw_spi_mid_init,
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.num_cs = 32,
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.bus_num = 0,
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};
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static struct spi_pci_desc spi_pci_mid_desc_2 = {
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.setup = dw_spi_mid_init,
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.num_cs = 4,
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.bus_num = 1,
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};
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static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct dw_spi_pci *dwpci;
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struct dw_spi *dws;
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struct spi_pci_desc *desc = (struct spi_pci_desc *)ent->driver_data;
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int pci_bar = 0;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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dwpci = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_pci),
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GFP_KERNEL);
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if (!dwpci)
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return -ENOMEM;
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dwpci->pdev = pdev;
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dws = &dwpci->dws;
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/* Get basic io resource and map it */
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dws->paddr = pci_resource_start(pdev, pci_bar);
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ret = pcim_iomap_regions(pdev, 1 << pci_bar, pci_name(pdev));
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if (ret)
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return ret;
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dws->regs = pcim_iomap_table(pdev)[pci_bar];
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dws->irq = pdev->irq;
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/*
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* Specific handling for paltforms, like dma setup,
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* clock rate, FIFO depth.
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*/
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if (desc) {
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dws->num_cs = desc->num_cs;
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dws->bus_num = desc->bus_num;
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if (desc->setup) {
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ret = desc->setup(dws);
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if (ret)
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return ret;
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}
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} else {
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return -ENODEV;
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}
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ret = dw_spi_add_host(&pdev->dev, dws);
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if (ret)
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return ret;
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/* PCI hook and SPI hook use the same drv data */
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pci_set_drvdata(pdev, dwpci);
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dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n",
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pdev->vendor, pdev->device);
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return 0;
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}
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static void spi_pci_remove(struct pci_dev *pdev)
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{
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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dw_spi_remove_host(&dwpci->dws);
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}
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#ifdef CONFIG_PM_SLEEP
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static int spi_suspend(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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return dw_spi_suspend_host(&dwpci->dws);
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}
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static int spi_resume(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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return dw_spi_resume_host(&dwpci->dws);
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}
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#endif
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static SIMPLE_DEV_PM_OPS(dw_spi_pm_ops, spi_suspend, spi_resume);
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static const struct pci_device_id pci_ids[] = {
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/* Intel MID platform SPI controller 0 */
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/*
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* The access to the device 8086:0801 is disabled by HW, since it's
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* exclusively used by SCU to communicate with MSIC.
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*/
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/* Intel MID platform SPI controller 1 */
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{ PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1},
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/* Intel MID platform SPI controller 2 */
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{ PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2},
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{},
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};
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static struct pci_driver dw_spi_driver = {
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.name = DRIVER_NAME,
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.id_table = pci_ids,
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.probe = spi_pci_probe,
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.remove = spi_pci_remove,
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.driver = {
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.pm = &dw_spi_pm_ops,
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},
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};
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module_pci_driver(dw_spi_driver);
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MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
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MODULE_DESCRIPTION("PCI interface driver for DW SPI Core");
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MODULE_LICENSE("GPL v2");
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