mirror of
https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
f4662e6d51
clang points out that ret may be used uninitialized in
lpc32xx_i2s_probe() in an error pointer path (which becomes fatal with
CONFIG_WERROR):
sound/soc/fsl/lpc3xxx-i2s.c:326:47: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized]
326 | "failed to init register map: %d\n", ret);
| ^~~
sound/soc/fsl/lpc3xxx-i2s.c:310:9: note: initialize the variable 'ret' to silence this warning
310 | int ret;
| ^
| = 0
1 error generated.
One solution would be a small refactoring of the second parameter in
dev_err_probe(), PTR_ERR(i2s_info_p->regs), to be the value of ret in
the if statement. However, a nicer solution for debugging purposes,
which is the point of this statement, would be to use the '%pe'
specifier to symbolically print the error pointer value. Do so, which
eliminates the uninitialized use of ret, clearing up the warning.
Fixes: 0959de657a
("ASoC: fsl: Add i2s and pcm drivers for LPC32xx CPUs")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Link: https://patch.msgid.link/20240701-lpc32xx-asoc-fix-uninitialized-ret-v1-1-985d86189739@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
375 lines
10 KiB
C
375 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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//
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// Author: Kevin Wells <kevin.wells@nxp.com>
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//
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// Copyright (C) 2008 NXP Semiconductors
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// Copyright 2023 Timesys Corporation <piotr.wojtaszczyk@timesys.com>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include "lpc3xxx-i2s.h"
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#define I2S_PLAYBACK_FLAG 0x1
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#define I2S_CAPTURE_FLAG 0x2
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#define LPC3XXX_I2S_RATES ( \
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SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
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SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000)
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#define LPC3XXX_I2S_FORMATS ( \
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SNDRV_PCM_FMTBIT_S8 | \
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SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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static void __lpc3xxx_find_clkdiv(u32 *clkx, u32 *clky, int freq, int xbytes, u32 clkrate)
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{
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u32 i2srate;
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u32 idxx, idyy;
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u32 savedbitclkrate, diff, trate, baseclk;
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/* Adjust rate for sample size (bits) and 2 channels and offset for
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* divider in clock output
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*/
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i2srate = (freq / 100) * 2 * (8 * xbytes);
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i2srate = i2srate << 1;
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clkrate = clkrate / 100;
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baseclk = clkrate;
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*clkx = 1;
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*clky = 1;
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/* Find the best divider */
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*clkx = *clky = 0;
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savedbitclkrate = 0;
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diff = ~0;
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for (idxx = 1; idxx < 0xFF; idxx++) {
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for (idyy = 1; idyy < 0xFF; idyy++) {
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trate = (baseclk * idxx) / idyy;
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if (abs(trate - i2srate) < diff) {
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diff = abs(trate - i2srate);
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savedbitclkrate = trate;
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*clkx = idxx;
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*clky = idyy;
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}
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}
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}
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}
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static int lpc3xxx_i2s_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai)
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{
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struct lpc3xxx_i2s_info *i2s_info_p = snd_soc_dai_get_drvdata(cpu_dai);
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struct device *dev = i2s_info_p->dev;
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u32 flag;
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int ret = 0;
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guard(mutex)(&i2s_info_p->lock);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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flag = I2S_PLAYBACK_FLAG;
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else
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flag = I2S_CAPTURE_FLAG;
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if (flag & i2s_info_p->streams_in_use) {
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dev_warn(dev, "I2S channel is busy\n");
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ret = -EBUSY;
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return ret;
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}
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if (i2s_info_p->streams_in_use == 0) {
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ret = clk_prepare_enable(i2s_info_p->clk);
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if (ret) {
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dev_err(dev, "Can't enable clock, err=%d\n", ret);
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return ret;
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}
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}
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i2s_info_p->streams_in_use |= flag;
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return 0;
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}
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static void lpc3xxx_i2s_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai)
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{
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struct lpc3xxx_i2s_info *i2s_info_p = snd_soc_dai_get_drvdata(cpu_dai);
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struct regmap *regs = i2s_info_p->regs;
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const u32 stop_bits = (LPC3XXX_I2S_RESET | LPC3XXX_I2S_STOP);
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u32 flag;
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guard(mutex)(&i2s_info_p->lock);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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flag = I2S_PLAYBACK_FLAG;
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regmap_write(regs, LPC3XXX_REG_I2S_TX_RATE, 0);
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regmap_update_bits(regs, LPC3XXX_REG_I2S_DAO, stop_bits, stop_bits);
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} else {
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flag = I2S_CAPTURE_FLAG;
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regmap_write(regs, LPC3XXX_REG_I2S_RX_RATE, 0);
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regmap_update_bits(regs, LPC3XXX_REG_I2S_DAI, stop_bits, stop_bits);
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}
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i2s_info_p->streams_in_use &= ~flag;
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if (i2s_info_p->streams_in_use == 0)
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clk_disable_unprepare(i2s_info_p->clk);
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}
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static int lpc3xxx_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct lpc3xxx_i2s_info *i2s_info_p = snd_soc_dai_get_drvdata(cpu_dai);
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/* Will use in HW params later */
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i2s_info_p->freq = freq;
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return 0;
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}
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static int lpc3xxx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
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{
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struct lpc3xxx_i2s_info *i2s_info_p = snd_soc_dai_get_drvdata(cpu_dai);
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struct device *dev = i2s_info_p->dev;
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if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_I2S) {
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dev_warn(dev, "unsupported bus format %d\n", fmt);
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return -EINVAL;
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}
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if ((fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) != SND_SOC_DAIFMT_BP_FP) {
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dev_warn(dev, "unsupported clock provider %d\n", fmt);
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return -EINVAL;
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}
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return 0;
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}
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static int lpc3xxx_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *cpu_dai)
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{
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struct lpc3xxx_i2s_info *i2s_info_p = snd_soc_dai_get_drvdata(cpu_dai);
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struct device *dev = i2s_info_p->dev;
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struct regmap *regs = i2s_info_p->regs;
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int xfersize;
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u32 tmp, clkx, clky;
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tmp = LPC3XXX_I2S_RESET | LPC3XXX_I2S_STOP;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S8:
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tmp |= LPC3XXX_I2S_WW8 | LPC3XXX_I2S_WS_HP(LPC3XXX_I2S_WW8_HP);
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xfersize = 1;
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break;
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case SNDRV_PCM_FORMAT_S16_LE:
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tmp |= LPC3XXX_I2S_WW16 | LPC3XXX_I2S_WS_HP(LPC3XXX_I2S_WW16_HP);
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xfersize = 2;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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tmp |= LPC3XXX_I2S_WW32 | LPC3XXX_I2S_WS_HP(LPC3XXX_I2S_WW32_HP);
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xfersize = 4;
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break;
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default:
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dev_warn(dev, "Unsupported audio data format %d\n", params_format(params));
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return -EINVAL;
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}
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if (params_channels(params) == 1)
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tmp |= LPC3XXX_I2S_MONO;
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__lpc3xxx_find_clkdiv(&clkx, &clky, i2s_info_p->freq, xfersize, i2s_info_p->clkrate);
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dev_dbg(dev, "Stream : %s\n",
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substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? "playback" : "capture");
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dev_dbg(dev, "Desired clock rate : %d\n", i2s_info_p->freq);
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dev_dbg(dev, "Base clock rate : %d\n", i2s_info_p->clkrate);
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dev_dbg(dev, "Transfer size (bytes) : %d\n", xfersize);
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dev_dbg(dev, "Clock divider (x) : %d\n", clkx);
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dev_dbg(dev, "Clock divider (y) : %d\n", clky);
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dev_dbg(dev, "Channels : %d\n", params_channels(params));
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dev_dbg(dev, "Data format : %s\n", "I2S");
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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regmap_write(regs, LPC3XXX_REG_I2S_DMA1,
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LPC3XXX_I2S_DMA1_TX_EN | LPC3XXX_I2S_DMA0_TX_DEPTH(4));
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regmap_write(regs, LPC3XXX_REG_I2S_TX_RATE, (clkx << 8) | clky);
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regmap_write(regs, LPC3XXX_REG_I2S_DAO, tmp);
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} else {
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regmap_write(regs, LPC3XXX_REG_I2S_DMA0,
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LPC3XXX_I2S_DMA0_RX_EN | LPC3XXX_I2S_DMA1_RX_DEPTH(4));
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regmap_write(regs, LPC3XXX_REG_I2S_RX_RATE, (clkx << 8) | clky);
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regmap_write(regs, LPC3XXX_REG_I2S_DAI, tmp);
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}
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return 0;
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}
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static int lpc3xxx_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *cpu_dai)
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{
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struct lpc3xxx_i2s_info *i2s_info_p = snd_soc_dai_get_drvdata(cpu_dai);
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struct regmap *regs = i2s_info_p->regs;
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int ret = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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regmap_update_bits(regs, LPC3XXX_REG_I2S_DAO,
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LPC3XXX_I2S_STOP, LPC3XXX_I2S_STOP);
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else
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regmap_update_bits(regs, LPC3XXX_REG_I2S_DAI,
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LPC3XXX_I2S_STOP, LPC3XXX_I2S_STOP);
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break;
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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case SNDRV_PCM_TRIGGER_RESUME:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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regmap_update_bits(regs, LPC3XXX_REG_I2S_DAO,
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(LPC3XXX_I2S_RESET | LPC3XXX_I2S_STOP), 0);
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else
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regmap_update_bits(regs, LPC3XXX_REG_I2S_DAI,
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(LPC3XXX_I2S_RESET | LPC3XXX_I2S_STOP), 0);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static int lpc3xxx_i2s_dai_probe(struct snd_soc_dai *dai)
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{
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struct lpc3xxx_i2s_info *i2s_info_p = snd_soc_dai_get_drvdata(dai);
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snd_soc_dai_init_dma_data(dai, &i2s_info_p->playback_dma_config,
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&i2s_info_p->capture_dma_config);
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return 0;
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}
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const struct snd_soc_dai_ops lpc3xxx_i2s_dai_ops = {
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.probe = lpc3xxx_i2s_dai_probe,
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.startup = lpc3xxx_i2s_startup,
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.shutdown = lpc3xxx_i2s_shutdown,
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.trigger = lpc3xxx_i2s_trigger,
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.hw_params = lpc3xxx_i2s_hw_params,
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.set_sysclk = lpc3xxx_i2s_set_dai_sysclk,
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.set_fmt = lpc3xxx_i2s_set_dai_fmt,
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};
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struct snd_soc_dai_driver lpc3xxx_i2s_dai_driver = {
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.playback = {
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.channels_min = 1,
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.channels_max = 2,
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.rates = LPC3XXX_I2S_RATES,
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.formats = LPC3XXX_I2S_FORMATS,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 2,
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.rates = LPC3XXX_I2S_RATES,
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.formats = LPC3XXX_I2S_FORMATS,
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},
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.ops = &lpc3xxx_i2s_dai_ops,
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.symmetric_rate = 1,
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.symmetric_channels = 1,
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.symmetric_sample_bits = 1,
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};
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static const struct snd_soc_component_driver lpc32xx_i2s_component = {
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.name = "lpc32xx-i2s",
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.legacy_dai_naming = 1,
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};
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static const struct regmap_config lpc32xx_i2s_regconfig = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = LPC3XXX_REG_I2S_RX_RATE,
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};
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static int lpc32xx_i2s_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct lpc3xxx_i2s_info *i2s_info_p;
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struct resource *res;
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void __iomem *iomem;
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int ret;
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i2s_info_p = devm_kzalloc(dev, sizeof(*i2s_info_p), GFP_KERNEL);
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if (!i2s_info_p)
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return -ENOMEM;
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platform_set_drvdata(pdev, i2s_info_p);
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i2s_info_p->dev = dev;
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iomem = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(iomem))
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return dev_err_probe(dev, PTR_ERR(iomem), "Can't map registers\n");
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i2s_info_p->regs = devm_regmap_init_mmio(dev, iomem, &lpc32xx_i2s_regconfig);
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if (IS_ERR(i2s_info_p->regs))
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return dev_err_probe(dev, PTR_ERR(i2s_info_p->regs),
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"failed to init register map: %pe\n", i2s_info_p->regs);
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i2s_info_p->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(i2s_info_p->clk))
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return dev_err_probe(dev, PTR_ERR(i2s_info_p->clk), "Can't get clock\n");
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i2s_info_p->clkrate = clk_get_rate(i2s_info_p->clk);
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if (i2s_info_p->clkrate == 0)
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return dev_err_probe(dev, -EINVAL, "Invalid returned clock rate\n");
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mutex_init(&i2s_info_p->lock);
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ret = devm_snd_soc_register_component(dev, &lpc32xx_i2s_component,
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&lpc3xxx_i2s_dai_driver, 1);
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if (ret)
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return dev_err_probe(dev, ret, "Can't register cpu_dai component\n");
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i2s_info_p->playback_dma_config.addr = (dma_addr_t)(res->start + LPC3XXX_REG_I2S_TX_FIFO);
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i2s_info_p->playback_dma_config.maxburst = 4;
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i2s_info_p->capture_dma_config.addr = (dma_addr_t)(res->start + LPC3XXX_REG_I2S_RX_FIFO);
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i2s_info_p->capture_dma_config.maxburst = 4;
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ret = lpc3xxx_pcm_register(pdev);
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if (ret)
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return dev_err_probe(dev, ret, "Can't register pcm component\n");
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return 0;
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}
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static const struct of_device_id lpc32xx_i2s_match[] = {
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{ .compatible = "nxp,lpc3220-i2s" },
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{},
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};
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MODULE_DEVICE_TABLE(of, lpc32xx_i2s_match);
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static struct platform_driver lpc32xx_i2s_driver = {
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.probe = lpc32xx_i2s_probe,
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.driver = {
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.name = "lpc3xxx-i2s",
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.of_match_table = lpc32xx_i2s_match,
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},
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};
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module_platform_driver(lpc32xx_i2s_driver);
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MODULE_AUTHOR("Kevin Wells <kevin.wells@nxp.com>");
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MODULE_AUTHOR("Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>");
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MODULE_DESCRIPTION("ASoC LPC3XXX I2S interface");
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MODULE_LICENSE("GPL");
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