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This patch provides access methods for PCI registers that mis-behave on the CE4100. Each register can be assigned a private init, read and write routine. The exception to this is the bridge device. The bridge device is the only device on bus zero (0) that requires any fixup so it is a special case. [ tglx: minor coding style cleanups, __init annotation and simplification of ce4100_conf_read/write ] Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com> LKML-Reference: <40b6751381c2275dc359db5a17989cce22ad8db7.1289331834.git.dirk.brandewie@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
28 lines
650 B
Makefile
28 lines
650 B
Makefile
obj-y := i386.o init.o
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obj-$(CONFIG_PCI_BIOS) += pcbios.o
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obj-$(CONFIG_PCI_MMCONFIG) += mmconfig_$(BITS).o direct.o mmconfig-shared.o
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obj-$(CONFIG_PCI_DIRECT) += direct.o
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obj-$(CONFIG_PCI_OLPC) += olpc.o
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obj-$(CONFIG_PCI_XEN) += xen.o
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obj-y += fixup.o
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obj-$(CONFIG_X86_INTEL_CE) += ce4100.o
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obj-$(CONFIG_ACPI) += acpi.o
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obj-y += legacy.o irq.o
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obj-$(CONFIG_X86_VISWS) += visws.o
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obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
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obj-$(CONFIG_X86_MRST) += mrst.o
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obj-y += common.o early.o
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obj-y += amd_bus.o bus_numa.o
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obj-$(CONFIG_PCI_CNB20LE_QUIRK) += broadcom_bus.o
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ifeq ($(CONFIG_PCI_DEBUG),y)
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EXTRA_CFLAGS += -DDEBUG
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endif
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