linux/arch/arm/mach-omap2/omap-headsmp.S
Richard Woodruff df571c4ab3 omap4: Fix build break when used with gcc-4.4.1 (2009-q3)
This patch adds  argument to smc calls as gcc-4.4.1 requires it
otherwise the build breaks with 2009-q3 toolchanin.

arch/arm/mach-omap2/omap-headsmp.S: Assembler messages:
arch/arm/mach-omap2/omap-headsmp.S:36: Error: missing expression -- `smc'
arch/arm/mach-omap2/omap-headsmp.S:55: Error: missing expression -- `smc'
arch/arm/mach-omap2/omap-headsmp.S:63: Error: missing expression -- `smc'
make[1]: *** [arch/arm/mach-omap2/omap-headsmp.o] Error 1

Signed-off-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-04-23 15:35:11 -07:00

66 lines
1.6 KiB
ArmAsm

/*
* Secondary CPU startup routine source file.
*
* Copyright (C) 2009 Texas Instruments, Inc.
*
* Author:
* Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* Interface functions needed for the SMP. This file is based on arm
* realview smp platform.
* Copyright (c) 2003 ARM Limited.
*
* This program is free software,you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/linkage.h>
#include <linux/init.h>
/* Physical address needed since MMU not enabled yet on secondary core */
#define OMAP4_AUX_CORE_BOOT1_PA 0x48281804
__INIT
/*
* OMAP4 specific entry point for secondary CPU to jump from ROM
* code. This routine also provides a holding flag into which
* secondary core is held until we're ready for it to initialise.
* The primary core will update this flag using a hardware
* register AuxCoreBoot0.
*/
ENTRY(omap_secondary_startup)
hold: ldr r12,=0x103
dsb
smc #0 @ read from AuxCoreBoot0
mov r0, r0, lsr #9
mrc p15, 0, r4, c0, c0, 5
and r4, r4, #0x0f
cmp r0, r4
bne hold
/*
* we've been released from the wait loop,secondary_stack
* should now contain the SVC stack for this core
*/
b secondary_startup
END(omap_secondary_startup)
ENTRY(omap_modify_auxcoreboot0)
stmfd sp!, {r1-r12, lr}
ldr r12, =0x104
dsb
smc #0
ldmfd sp!, {r1-r12, pc}
END(omap_modify_auxcoreboot0)
ENTRY(omap_auxcoreboot_addr)
stmfd sp!, {r2-r12, lr}
ldr r12, =0x105
dsb
smc #0
ldmfd sp!, {r2-r12, pc}
END(omap_auxcoreboot_addr)