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354da4cf57
It turns out that XEN/PV Dom0 has halfways usable CPUID/MADT enumeration
except that it cannot deal with CPUs which are enumerated as disabled in
MADT.
DomU has no MADT and provides at least rudimentary topology information in
CPUID leaves 1 and 4.
For both it's important that there are not more possible Linux CPUs than
vCPUs provided by the hypervisor.
As this is ensured by counting the vCPUs before enumeration happens:
- lift the restrictions in the CPUID evaluation and the MADT parser
- Utilize MADT registration for Dom0
- Keep the fake APIC ID registration for DomU
- Fix the XEN APIC fake so the readout of the local APIC ID works for
Dom0 via the hypercall and for DomU by returning the registered
fake APIC IDs.
With that the XEN/PV fake approximates usefulness.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Michael Kelley <mhklinux@outlook.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Link: https://lore.kernel.org/r/20240213210252.626195405@linutronix.de
151 lines
2.9 KiB
C
151 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/init.h>
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#include <linux/thread_info.h>
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#include <asm/x86_init.h>
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#include <asm/apic.h>
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#include <asm/io_apic.h>
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#include <asm/xen/hypercall.h>
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#include <xen/xen.h>
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#include <xen/interface/physdev.h>
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#include "xen-ops.h"
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#include "pmu.h"
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#include "smp.h"
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static unsigned int xen_io_apic_read(unsigned apic, unsigned reg)
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{
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struct physdev_apic apic_op;
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int ret;
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apic_op.apic_physbase = mpc_ioapic_addr(apic);
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apic_op.reg = reg;
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ret = HYPERVISOR_physdev_op(PHYSDEVOP_apic_read, &apic_op);
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if (!ret)
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return apic_op.value;
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/* fallback to return an emulated IO_APIC values */
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if (reg == 0x1)
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return 0x00170020;
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else if (reg == 0x0)
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return apic << 24;
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return 0xfd;
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}
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static u32 xen_get_apic_id(u32 x)
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{
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return ((x)>>24) & 0xFFu;
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}
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static u32 xen_apic_read(u32 reg)
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{
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struct xen_platform_op op = {
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.cmd = XENPF_get_cpuinfo,
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.interface_version = XENPF_INTERFACE_VERSION,
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};
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int ret, cpu;
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if (reg == APIC_LVR)
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return 0x14;
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if (reg != APIC_ID)
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return 0;
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cpu = smp_processor_id();
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if (!xen_initial_domain())
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return cpu ? cpuid_to_apicid[cpu] << 24 : 0;
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op.u.pcpu_info.xen_cpuid = cpu;
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ret = HYPERVISOR_platform_op(&op);
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if (ret)
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op.u.pcpu_info.apic_id = BAD_APICID;
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return op.u.pcpu_info.apic_id << 24;
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}
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static void xen_apic_write(u32 reg, u32 val)
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{
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if (reg == APIC_LVTPC) {
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(void)pmu_apic_update(reg);
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return;
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}
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/* Warn to see if there's any stray references */
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WARN(1,"register: %x, value: %x\n", reg, val);
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}
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static void xen_apic_eoi(void)
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{
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WARN_ON_ONCE(1);
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}
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static u64 xen_apic_icr_read(void)
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{
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return 0;
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}
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static void xen_apic_icr_write(u32 low, u32 id)
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{
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/* Warn to see if there's any stray references */
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WARN_ON(1);
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}
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static int xen_apic_probe_pv(void)
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{
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if (xen_pv_domain())
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return 1;
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return 0;
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}
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static int xen_madt_oem_check(char *oem_id, char *oem_table_id)
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{
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return xen_pv_domain();
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}
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static u32 xen_cpu_present_to_apicid(int cpu)
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{
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if (cpu_present(cpu))
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return cpu_data(cpu).topo.apicid;
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else
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return BAD_APICID;
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}
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static struct apic xen_pv_apic __ro_after_init = {
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.name = "Xen PV",
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.probe = xen_apic_probe_pv,
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.acpi_madt_oem_check = xen_madt_oem_check,
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/* .delivery_mode and .dest_mode_logical not used by XENPV */
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.disable_esr = 0,
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.cpu_present_to_apicid = xen_cpu_present_to_apicid,
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.max_apic_id = UINT_MAX,
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.get_apic_id = xen_get_apic_id,
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.calc_dest_apicid = apic_flat_calc_apicid,
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#ifdef CONFIG_SMP
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.send_IPI_mask = xen_send_IPI_mask,
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.send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself,
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.send_IPI_allbutself = xen_send_IPI_allbutself,
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.send_IPI_all = xen_send_IPI_all,
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.send_IPI_self = xen_send_IPI_self,
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#endif
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.read = xen_apic_read,
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.write = xen_apic_write,
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.eoi = xen_apic_eoi,
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.icr_read = xen_apic_icr_read,
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.icr_write = xen_apic_icr_write,
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};
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apic_driver(xen_pv_apic);
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void __init xen_init_apic(void)
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{
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x86_apic_ops.io_apic_read = xen_io_apic_read;
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}
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