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f83ccb9358
A large part of the arm-soc patches are nowadays DT changes, adding support for new SoCs, boards and devices without changing kernel source. The plan is still to move the devicetree files out of the kernel tree and reduce the amount of churn going on here, but we keep finding reasons to delay doing that. Changes are really all over the place, with little sticking out particularly. We have contributions from a total of 116 people in this branch. Unfortunately, the size of this branch also causes a significant number of conflicts at the moment, typically when subsystem maintainers merge patches that change the driver at the same time as the dts files. In most cases this could be avoided because the dts changes are supposed to be compatible in both ways, and we are asking everyone to send ARM dts changes through our tree only. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUz/11WCrR//JCVInAQIIyRAA0DjdNNQ/A4G2i1nZCiTFH6a4oZy4JarN ATVPkW/V8avhh+yVNe5FWA44Xe6CDC5TXwMaIsbK+w3Iclj3fplh/MsBkQ9ZT9Sl LAjJoOjuYucCeDy0WLVioRKZ4PJEDoCu/oZTauIMnmWCOCRxLYpOM3FkAT9oN/Ti lswpTSLiV1/U3ZSI4M3qn+Sx1VJL8c/hAIWbvf5if2diYkWPk3VOSKyxmD9zLWdD Iqtb79J+ETVeOIM4sHnx79cG4ZCdpOfRAl7qx6hkJu0YATXESxWhpXVE2McTJuzM qHKsRRNSfsfSWPeF4angll9o06X/qgdT6C4P2dfH49lGeG7llOttw3OaCx3hWCTe U5bt26qtbwG2ZbzocaqvideP+rbpQrCH2vdO1embPv5Lu6peMoBWjxy6twSVXJBG LIymJ0IbiGYxL7BReGqRXt6ehy0BDWBeTSTdsGqgEl2TnxHuS/kgGfJc4D5riiEk aRPVq10p/k+yo4BZtq2GqXIOG6cqkIQ5lhl5Tg9+MfUlquAONqJP70FgRJDBIw9L 9uJp71bgSsA6eYg2tXoqJtpdjKplDWavgtACzIkFg2qFLyYmKvx+F0AXbeTIsrri /mIchTyG+dgiIjWvj/Xsf7jhrdzRcl3uKsJwFmk927pIsh24HV8T+LKgHrf+sVcO qEsEnKGYA6s= =zl/N -----END PGP SIGNATURE----- Merge tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree changes from Arnd Bergmann: "A large part of the arm-soc patches are nowadays DT changes, adding support for new SoCs, boards and devices without changing kernel source. The plan is still to move the devicetree files out of the kernel tree and reduce the amount of churn going on here, but we keep finding reasons to delay doing that. Changes are really all over the place, with little sticking out particularly. We have contributions from a total of 116 people in this branch. Unfortunately, the size of this branch also causes a significant number of conflicts at the moment, typically when subsystem maintainers merge patches that change the driver at the same time as the dts files. In most cases this could be avoided because the dts changes are supposed to be compatible in both ways, and we are asking everyone to send ARM dts changes through our tree only" * tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits) dts: stmmac: Document the clocks property in the stmmac base document dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. ARM: STi: stih41x: Add support for the FSM Serial Flash Controller ARM: STi: stih416: Add support for the FSM Serial Flash Controller ARM: tegra: fix Dalmore pinctrl configuration ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND ARM: dts: Build all keystone dt blobs ARM: dts: keystone: Fix control register range for clktsip ARM: dts: keystone: Fix domain register range for clkfftc1 ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap ARM: dts: bcm21664: Add device tree files. ARM: DT: bcm21664: Device tree bindings ARM: efm32: properly namespace i2c location property ARM: efm32: fix unit address part in USART2 device nodes' names ARM: mvebu: Enable NAND controller in Armada 385-DB ARM: mvebu: Add support for NAND controller in Armada 38x SoC ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs ...
398 lines
9.1 KiB
Plaintext
398 lines
9.1 KiB
Plaintext
/*
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* Copyright (C) 2012-2013 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "dt-bindings/clock/bcm281xx.h"
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#include "skeleton.dtsi"
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/ {
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model = "BCM11351 SoC";
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compatible = "brcm,bcm11351";
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interrupt-parent = <&gic>;
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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gic: interrupt-controller@3ff00100 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x3ff01000 0x1000>,
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<0x3ff00100 0x100>;
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};
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smc@0x3404c000 {
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compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
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reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
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};
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uart@3e000000 {
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e000000 0x1000>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uart@3e001000 {
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e001000 0x1000>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uart@3e002000 {
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e002000 0x1000>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uart@3e003000 {
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e003000 0x1000>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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L2: l2-cache {
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compatible = "brcm,bcm11351-a2-pl310-cache";
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reg = <0x3ff20000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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watchdog@35002f40 {
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compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
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reg = <0x35002f40 0x6c>;
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};
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timer@35006000 {
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compatible = "brcm,kona-timer";
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reg = <0x35006000 0x1000>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
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};
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gpio: gpio@35003000 {
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compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
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reg = <0x35003000 0x800>;
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interrupts =
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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sdio1: sdio@3f180000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f180000 0x10000>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
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status = "disabled";
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};
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sdio2: sdio@3f190000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f190000 0x10000>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
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status = "disabled";
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};
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sdio3: sdio@3f1a0000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f1a0000 0x10000>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
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status = "disabled";
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};
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sdio4: sdio@3f1b0000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f1b0000 0x10000>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
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status = "disabled";
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};
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pinctrl@35004800 {
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compatible = "brcm,bcm11351-pinctrl";
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reg = <0x35004800 0x430>;
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};
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i2c@3e016000 {
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compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
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reg = <0x3e016000 0x80>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
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status = "disabled";
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};
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i2c@3e017000 {
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compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
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reg = <0x3e017000 0x80>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
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status = "disabled";
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};
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i2c@3e018000 {
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compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
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reg = <0x3e018000 0x80>;
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interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
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status = "disabled";
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};
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i2c@3500d000 {
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compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
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reg = <0x3500d000 0x80>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
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status = "disabled";
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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root_ccu: root_ccu {
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compatible = "brcm,bcm11351-root-ccu";
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reg = <0x35001000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "frac_1m";
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};
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hub_ccu: hub_ccu {
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compatible = "brcm,bcm11351-hub-ccu";
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reg = <0x34000000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "tmon_1m";
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};
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aon_ccu: aon_ccu {
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compatible = "brcm,bcm11351-aon-ccu";
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reg = <0x35002000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "hub_timer",
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"pmu_bsc",
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"pmu_bsc_var";
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};
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master_ccu: master_ccu {
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compatible = "brcm,bcm11351-master-ccu";
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reg = <0x3f001000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "sdio1",
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"sdio2",
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"sdio3",
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"sdio4",
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"usb_ic",
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"hsic2_48m",
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"hsic2_12m";
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};
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slave_ccu: slave_ccu {
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compatible = "brcm,bcm11351-slave-ccu";
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reg = <0x3e011000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "uartb",
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"uartb2",
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"uartb3",
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"uartb4",
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"ssp0",
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"ssp2",
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"bsc1",
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"bsc2",
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"bsc3",
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"pwm";
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};
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ref_1m_clk: ref_1m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <1000000>;
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};
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ref_32k_clk: ref_32k {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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bbl_32k_clk: bbl_32k {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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ref_13m_clk: ref_13m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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};
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var_13m_clk: var_13m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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};
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dft_19_5m_clk: dft_19_5m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <19500000>;
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};
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ref_crystal_clk: ref_crystal {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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};
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ref_cx40_clk: ref_cx40 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <40000000>;
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};
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ref_52m_clk: ref_52m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
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};
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var_52m_clk: var_52m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
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};
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usb_otg_ahb_clk: usb_otg_ahb {
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
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#clock-cells = <0>;
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};
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ref_96m_clk: ref_96m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <96000000>;
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};
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var_96m_clk: var_96m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <96000000>;
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};
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ref_104m_clk: ref_104m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <104000000>;
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};
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var_104m_clk: var_104m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <104000000>;
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};
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ref_156m_clk: ref_156m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <156000000>;
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};
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var_156m_clk: var_156m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <156000000>;
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};
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ref_208m_clk: ref_208m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <208000000>;
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};
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var_208m_clk: var_208m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <208000000>;
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};
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ref_312m_clk: ref_312m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <312000000>;
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};
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var_312m_clk: var_312m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <312000000>;
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};
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};
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usbotg: usb@3f120000 {
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compatible = "snps,dwc2";
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reg = <0x3f120000 0x10000>;
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&usb_otg_ahb_clk>;
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clock-names = "otg";
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phys = <&usbphy>;
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phy-names = "usb2-phy";
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status = "disabled";
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};
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usbphy: usb-phy@3f130000 {
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compatible = "brcm,kona-usb2-phy";
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reg = <0x3f130000 0x28>;
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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