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Reading from the DCC grabs a character from the buffer and clears the status bit. Since this is a context-changing operation, instructions following the character read that rely on the status bit being accurate need to be synchronized with an ISB. In this case, the status bit check needs to execute after the character read otherwise we run the risk of reading the character and checking the status bit before the read can clear the status bit in the first place. When this happens, the user will see the same character they typed twice, instead of once. Add an ISB after the read and the write, so that the status check is synchronized with the read/write operations. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |
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.. | ||
hvc_beat.c | ||
hvc_bfin_jtag.c | ||
hvc_console.c | ||
hvc_console.h | ||
hvc_dcc.c | ||
hvc_irq.c | ||
hvc_iseries.c | ||
hvc_iucv.c | ||
hvc_opal.c | ||
hvc_rtas.c | ||
hvc_tile.c | ||
hvc_udbg.c | ||
hvc_vio.c | ||
hvc_xen.c | ||
hvcs.c | ||
hvsi.c | ||
hvsi_lib.c | ||
Kconfig | ||
Makefile |