linux/arch/arm/plat-mxc
Jason Wang 14f0f512ba ARM: imx: set cache line size to 64 bytes for i.MX5
The core of i.MX5 series is cortex-A8, its cache line size is 64 bytes
instead of 32 bytes. Refer to the OMAP3's selection, we choose 64
bytes for i.MX5, this can increase a little bit performance when
perform cache operations.

Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-08-21 12:22:43 +02:00
..
devices
include/mach eukrea-baseboards: fix the merge in one file 2010-08-16 13:30:35 +02:00
3ds_debugboard.c
audmux-v1.c
audmux-v2.c
clock.c
cpu.c
devices.c
ehci.c
gpio.c
iomux-v1.c
iomux-v3.c
irq.c
Kconfig ARM: imx: set cache line size to 64 bytes for i.MX5 2010-08-21 12:22:43 +02:00
Makefile
pwm.c
ssi-fiq-ksym.c
ssi-fiq.S
system.c
time.c
tzic.c mxc/tzic: add base address when accessing TZIC registers 2010-08-21 12:22:43 +02:00
ulpi.c