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043d07084b
The noexec support on s390 does not rely on a bit in the page table entry but utilizes the secondary space mode to distinguish between memory accesses for instructions vs. data. The noexec code relies on the assumption that the cpu will always use the secondary space page table for data accesses while it is running in the secondary space mode. Up to the z9-109 class machines this has been the case. Unfortunately this is not true anymore with z10 and later machines. The load-relative-long instructions lrl, lgrl and lgfrl access the memory operand using the same addressing-space mode that has been used to fetch the instruction. This breaks the noexec mode for all user space binaries compiled with march=z10 or later. The only option is to remove the current noexec support. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
21 lines
576 B
C
21 lines
576 B
C
#ifndef __MMU_H
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#define __MMU_H
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typedef struct {
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atomic_t attach_count;
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unsigned int flush_mm;
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spinlock_t list_lock;
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struct list_head pgtable_list;
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unsigned long asce_bits;
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unsigned long asce_limit;
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unsigned long vdso_base;
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int has_pgste; /* The mmu context has extended page tables */
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int alloc_pgste; /* cloned contexts will have extended page tables */
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} mm_context_t;
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#define INIT_MM_CONTEXT(name) \
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.context.list_lock = __SPIN_LOCK_UNLOCKED(name.context.list_lock), \
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.context.pgtable_list = LIST_HEAD_INIT(name.context.pgtable_list),
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#endif
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