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0317e6c0f1
Disabling the adapter after each transfer adds additional delays for each I2C transfer. Even if we don't wait for it to be disabled anymore, on next transfer we will need to if we have several transfers in a row. Now during the transfer init we check if IC_TAR can be changed dynamically, the status register for no activity and TX buffer being empty. In this case we don't need to disable it When a transfer fails the adapter will still be disabled - this is a conservative approach. When transfers succeed, the adapter is left enabled and it's configured so to disable interrupts. Alternating register reads on 2 slaves: perf stat -r4 chrt -f 10 ./i2c-test /dev/i2c-1 25000 0x40 0x6 0x1e 0x00 Before: 8.638705161 seconds time elapsed ( +- 5.90% ) After: 7.516821591 seconds time elapsed ( +- 0.11% ) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> |
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.. | ||
algos | ||
busses | ||
muxes | ||
i2c-boardinfo.c | ||
i2c-core.c | ||
i2c-core.h | ||
i2c-dev.c | ||
i2c-mux.c | ||
i2c-slave-eeprom.c | ||
i2c-smbus.c | ||
i2c-stub.c | ||
Kconfig | ||
Makefile |