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2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
107 lines
2.2 KiB
ArmAsm
107 lines
2.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* arch/powerpc/boot/gamecube-head.S
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*
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* Nintendo GameCube bootwrapper entry.
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* Copyright (C) 2004-2009 The GameCube Linux Team
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* Copyright (C) 2008,2009 Albert Herranz
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*/
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#include "ppc_asm.h"
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/*
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* The entry code does no assumptions regarding:
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* - if the data and instruction caches are enabled or not
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* - if the MMU is enabled or not
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*
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* We enable the caches if not already enabled, enable the MMU with an
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* identity mapping scheme and jump to the start code.
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*/
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.text
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.globl _zimage_start
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_zimage_start:
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/* turn the MMU off */
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mfmsr 9
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rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
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bcl 20, 31, 1f
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1:
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mflr 8
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clrlwi 8, 8, 3 /* convert to a real address */
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addi 8, 8, _mmu_off - 1b
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mtsrr0 8
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mtsrr1 9
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rfi
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_mmu_off:
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/* MMU disabled */
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/* setup BATs */
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isync
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li 8, 0
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mtspr 0x210, 8 /* IBAT0U */
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mtspr 0x212, 8 /* IBAT1U */
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mtspr 0x214, 8 /* IBAT2U */
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mtspr 0x216, 8 /* IBAT3U */
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mtspr 0x218, 8 /* DBAT0U */
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mtspr 0x21a, 8 /* DBAT1U */
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mtspr 0x21c, 8 /* DBAT2U */
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mtspr 0x21e, 8 /* DBAT3U */
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li 8, 0x01ff /* first 16MiB */
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li 9, 0x0002 /* rw */
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mtspr 0x211, 9 /* IBAT0L */
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mtspr 0x210, 8 /* IBAT0U */
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mtspr 0x219, 9 /* DBAT0L */
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mtspr 0x218, 8 /* DBAT0U */
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lis 8, 0x0c00 /* I/O mem */
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ori 8, 8, 0x3ff /* 32MiB */
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lis 9, 0x0c00
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ori 9, 9, 0x002a /* uncached, guarded, rw */
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mtspr 0x21b, 9 /* DBAT1L */
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mtspr 0x21a, 8 /* DBAT1U */
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lis 8, 0x0100 /* next 8MiB */
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ori 8, 8, 0x00ff /* 8MiB */
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lis 9, 0x0100
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ori 9, 9, 0x0002 /* rw */
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mtspr 0x215, 9 /* IBAT2L */
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mtspr 0x214, 8 /* IBAT2U */
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mtspr 0x21d, 9 /* DBAT2L */
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mtspr 0x21c, 8 /* DBAT2U */
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/* enable and invalidate the caches if not already enabled */
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mfspr 8, 0x3f0 /* HID0 */
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andi. 0, 8, (1<<15) /* HID0_ICE */
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bne 1f
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ori 8, 8, (1<<15)|(1<<11) /* HID0_ICE|HID0_ICFI*/
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1:
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andi. 0, 8, (1<<14) /* HID0_DCE */
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bne 1f
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ori 8, 8, (1<<14)|(1<<10) /* HID0_DCE|HID0_DCFI*/
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1:
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mtspr 0x3f0, 8 /* HID0 */
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isync
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/* initialize arguments */
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li 3, 0
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li 4, 0
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li 5, 0
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/* turn the MMU on */
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bcl 20, 31, 1f
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1:
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mflr 8
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addi 8, 8, _mmu_on - 1b
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mfmsr 9
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ori 9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */
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mtsrr0 8
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mtsrr1 9
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sync
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rfi
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_mmu_on:
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b _zimage_start_lib
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