#include #include #include "skeleton.dtsi" / { compatible = "nvidia,tegra114"; interrupt-parent = <&gic>; aliases { serial0 = &uarta; serial1 = &uartb; serial2 = &uartc; serial3 = &uartd; }; gic: interrupt-controller { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x50041000 0x1000>, <0x50042000 0x1000>, <0x50044000 0x2000>, <0x50046000 0x2000>; interrupts = ; }; timer@60005000 { compatible = "nvidia,tegra114-timer", "nvidia,tegra20-timer"; reg = <0x60005000 0x400>; interrupts = , , , , , ; clocks = <&tegra_car 5>; }; tegra_car: clock { compatible = "nvidia,tegra114-car"; reg = <0x60006000 0x1000>; #clock-cells = <1>; }; apbdma: dma { compatible = "nvidia,tegra114-apbdma"; reg = <0x6000a000 0x1400>; interrupts = , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , ; clocks = <&tegra_car 34>; }; ahb: ahb { compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb"; reg = <0x6000c004 0x14c>; }; gpio: gpio { compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio"; reg = <0x6000d000 0x1000>; interrupts = , , , , , , , ; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; interrupt-controller; }; pinmux: pinmux { compatible = "nvidia,tegra114-pinmux"; reg = <0x70000868 0x148 /* Pad control registers */ 0x70003000 0x40c>; /* Mux registers */ }; /* * There are two serial driver i.e. 8250 based simple serial * driver and APB DMA based serial driver for higher baudrate * and performace. To enable the 8250 based driver, the compatible * is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable * the APB DMA based serial driver, the comptible is * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". */ uarta: serial@70006000 { compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; reg = <0x70006000 0x40>; reg-shift = <2>; interrupts = ; nvidia,dma-request-selector = <&apbdma 8>; status = "disabled"; clocks = <&tegra_car 6>; }; uartb: serial@70006040 { compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; reg = <0x70006040 0x40>; reg-shift = <2>; interrupts = ; nvidia,dma-request-selector = <&apbdma 9>; status = "disabled"; clocks = <&tegra_car 192>; }; uartc: serial@70006200 { compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; reg = <0x70006200 0x100>; reg-shift = <2>; interrupts = ; nvidia,dma-request-selector = <&apbdma 10>; status = "disabled"; clocks = <&tegra_car 55>; }; uartd: serial@70006300 { compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; reg = <0x70006300 0x100>; reg-shift = <2>; interrupts = ; nvidia,dma-request-selector = <&apbdma 19>; status = "disabled"; clocks = <&tegra_car 65>; }; pwm: pwm { compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car 17>; status = "disabled"; }; i2c@7000c000 { compatible = "nvidia,tegra114-i2c"; reg = <0x7000c000 0x100>; interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 12>; clock-names = "div-clk"; status = "disabled"; }; i2c@7000c400 { compatible = "nvidia,tegra114-i2c"; reg = <0x7000c400 0x100>; interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 54>; clock-names = "div-clk"; status = "disabled"; }; i2c@7000c500 { compatible = "nvidia,tegra114-i2c"; reg = <0x7000c500 0x100>; interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 67>; clock-names = "div-clk"; status = "disabled"; }; i2c@7000c700 { compatible = "nvidia,tegra114-i2c"; reg = <0x7000c700 0x100>; interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 103>; clock-names = "div-clk"; status = "disabled"; }; i2c@7000d000 { compatible = "nvidia,tegra114-i2c"; reg = <0x7000d000 0x100>; interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 47>; clock-names = "div-clk"; status = "disabled"; }; spi@7000d400 { compatible = "nvidia,tegra114-spi"; reg = <0x7000d400 0x200>; interrupts = ; nvidia,dma-request-selector = <&apbdma 15>; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 41>; clock-names = "spi"; status = "disabled"; }; spi@7000d600 { compatible = "nvidia,tegra114-spi"; reg = <0x7000d600 0x200>; interrupts = ; nvidia,dma-request-selector = <&apbdma 16>; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 44>; clock-names = "spi"; status = "disabled"; }; spi@7000d800 { compatible = "nvidia,tegra114-spi"; reg = <0x7000d800 0x200>; interrupts = ; nvidia,dma-request-selector = <&apbdma 17>; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 46>; clock-names = "spi"; status = "disabled"; }; spi@7000da00 { compatible = "nvidia,tegra114-spi"; reg = <0x7000da00 0x200>; interrupts = ; nvidia,dma-request-selector = <&apbdma 18>; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 68>; clock-names = "spi"; status = "disabled"; }; spi@7000dc00 { compatible = "nvidia,tegra114-spi"; reg = <0x7000dc00 0x200>; interrupts = ; nvidia,dma-request-selector = <&apbdma 27>; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 104>; clock-names = "spi"; status = "disabled"; }; spi@7000de00 { compatible = "nvidia,tegra114-spi"; reg = <0x7000de00 0x200>; interrupts = ; nvidia,dma-request-selector = <&apbdma 28>; #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car 105>; clock-names = "spi"; status = "disabled"; }; rtc { compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc"; reg = <0x7000e000 0x100>; interrupts = ; clocks = <&tegra_car 4>; }; kbc { compatible = "nvidia,tegra114-kbc"; reg = <0x7000e200 0x100>; interrupts = ; clocks = <&tegra_car 36>; status = "disabled"; }; pmc { compatible = "nvidia,tegra114-pmc"; reg = <0x7000e400 0x400>; clocks = <&tegra_car 261>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; }; iommu { compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu"; reg = <0x7000f010 0x02c 0x7000f1f0 0x010 0x7000f228 0x074>; nvidia,#asids = <4>; dma-window = <0 0x40000000>; nvidia,swgroups = <0x18659fe>; nvidia,ahb = <&ahb>; }; sdhci@78000000 { compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000000 0x200>; interrupts = ; clocks = <&tegra_car 14>; status = "disable"; }; sdhci@78000200 { compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000200 0x200>; interrupts = ; clocks = <&tegra_car 9>; status = "disable"; }; sdhci@78000400 { compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000400 0x200>; interrupts = ; clocks = <&tegra_car 69>; status = "disable"; }; sdhci@78000600 { compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000600 0x200>; interrupts = ; clocks = <&tegra_car 15>; status = "disable"; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <1>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <2>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <3>; }; }; timer { compatible = "arm,armv7-timer"; interrupts = , , , ; }; };