This patch also includes fix CSPI ID for i.MX53. ID should be 2,
because IDs 0 and 1 are occupied by eCSPI.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fix incorrect defined bits for GPT clocks according to datasheet.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for Enhanced Periodic Interrupt Timer (EPIT)
to clock subsystem.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
WARNING: at mm/vmalloc.c:1471 __iommu_free_buffer+0xcc/0xd0()
Trying to vfree() nonexistent vm area (ef095000)
Modules linked in:
[<c0015a18>] (unwind_backtrace+0x0/0xfc) from [<c0025a94>] (warn_slowpath_common+0x54/0x64)
[<c0025a94>] (warn_slowpath_common+0x54/0x64) from [<c0025b38>] (warn_slowpath_fmt+0x30/0x40)
[<c0025b38>] (warn_slowpath_fmt+0x30/0x40) from [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0)
[<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) from [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138)
[<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) from [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc)
[<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) from [<c0211230>] (drm_gem_object_free+0x28/0x34)
[<c0211230>] (drm_gem_object_free+0x28/0x34) from [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8)
[<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) from [<c01abe10>] (idr_for_each+0x74/0xb8)
[<c01abe10>] (idr_for_each+0x74/0xb8) from [<c02114e4>] (drm_gem_release+0x1c/0x30)
[<c02114e4>] (drm_gem_release+0x1c/0x30) from [<c0210ae8>] (drm_release+0x608/0x694)
[<c0210ae8>] (drm_release+0x608/0x694) from [<c00b75a0>] (fput+0xb8/0x228)
[<c00b75a0>] (fput+0xb8/0x228) from [<c00b40c4>] (filp_close+0x64/0x84)
[<c00b40c4>] (filp_close+0x64/0x84) from [<c0029d54>] (put_files_struct+0xe8/0x104)
[<c0029d54>] (put_files_struct+0xe8/0x104) from [<c002b930>] (do_exit+0x608/0x774)
[<c002b930>] (do_exit+0x608/0x774) from [<c002bae4>] (do_group_exit+0x48/0xb4)
[<c002bae4>] (do_group_exit+0x48/0xb4) from [<c002bb60>] (sys_exit_group+0x10/0x18)
[<c002bb60>] (sys_exit_group+0x10/0x18) from [<c000ee80>] (ret_fast_syscall+0x0/0x30)
This patch modifies the condition while freeing to match the condition
used while allocation. This fixes the above warning which arises when
array size is equal to PAGE_SIZE where allocation is done using kzalloc
but free is done using vfree.
Signed-off-by: Prathyush K <prathyush.k@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Samsung SoC fixes from Arnd Bergmann.
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: S3C24XX: Correct CAMIF interrupt definitions
ARM: S3C24XX: Correct AC97 clock control bit for S3C2440
ARM: SAMSUNG: fix race in s3c_adc_start for ADC
ARM: SAMSUNG: Update default rate for xusbxti clock
ARM: EXYNOS: register devices in 'need_restore' state for pm_domains
ARM: EXYNOS: read initial state of power domain from hw registers
Add device nodes for the three instances of spi controllers in
EXYNOS5 platforms and enable instance SPI 1 for SMDK5250 board.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add the platform bits which are required to support SPI controllers.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add support for clock instances for each spi controller.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
[kgene.kim@samsung.com: changed the name of clk for consensus]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add device nodes for the three instances of spi controllers in
EXYNOS4 platforms. Enable instance SPI 2 for SMDKV310 board and
disable all spi instances for Origen board.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add the platform bits which are required to support SPI controllers.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The sclk_spi clock is derived currently from the first level divider
(MMCx_RATIO) which is incorrect. The output of the first level clock
is divided by a second level divider (MMCx_PRE_RATIO), the output of
which is used as the spi bus clock (sclk_spi). Fix the clock hierarchy
issues for the sclk_spi clock.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
[kgene.kim@samsung.com: changed the name of clk for consensus]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add DT support for DaVinci cp_intc interrupt controller
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Merge tag 'davinci-v3.6-dt' of git://gitorious.org/linux-davinci/linux-davinci into next/dt
From Sekhar Nori <nsekhar@ti.com>:
DaVinci DT support
Add DT support for DaVinci cp_intc interrupt controller
* tag 'davinci-v3.6-dt' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: cp_intc: Add OF support for TI interrupt controller
ARM: davinci: add runtime PM support for clock management
ARM: davinci: cp_intc: Add irq domain support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Versatile Express platform can be used in different configurations,
the console UART used by early printk may be located at different
addresses in the address space.
This patch makes it possible to select the base address of a PL011
UART to be used as a console output in the kernel configuration.
The default behaviour is still the heuristic detecting memory map
on Cortex-A core tiles.
The zImage decompressor will use the same configuration values
or print out nothing if DEBUG_LL is not enabled.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
This patch adds Device Tree file for the CoreTile Express
A15x2 A7x3 (V2P-CA15_CA7).
Note that the A7 cpu nodes are commented out, as the
big.LITTLE-relevant patches are not upstreamed yet. Till
this time one can use the board with two A15 cores only,
keeping the A7s in reset by adding the following setting
to the board.txt file in Versatile Express configuration
tree:
SCC: 0x018 0x00001FFF
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
SMSC driver requires "vdd33a" and "vddvario" regulator supplies now.
Add fixed regulator describing 3V3 power line (in both motherboard's
Device Trees and the non-DT code) and force fixed regulator config
option if regulators framework is enabled.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
This patch makes Versatile Express use the common clock framework
instead of the plat-versatile implementation.
It defines clock provider for VE's OSCs (clock generators) and
registers all required fixed and variable clock sources (for both
motherboard and core tile).
This is a simple conversion of the existing state and will be
extended (and migrated to drivers/clk) in the near future.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
This patch adds framebuffer support to SMDK4212 and SMDK4412 boards.
A framebuffer window of 480x800x24bpp is defined.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
S3C-HSOTG support is added to SMDK4212 and SMDK4412 boards.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
After using snd_soc_register_card() in smdk_wm8994.c, the sound
card is registered as a platform driver and it needs related platform
device entry in machine file.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
After using snd_soc_register_card() in smdk_wm8994.c, the sound
card is registered as a platform driver and it needs related platform
device entry in machine file.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
After using snd_soc_register_card() in smdk_wm8994.c, the sound
card is registered as a platform driver and it needs related platform
device entry in machine file.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
None of the GPIO IRQs are connected so there is no reason to specify a
base.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
mach-s3c24xx/include/mach/gta02.h header file contains defines
which are now not used anywhere, remove them.
Cc: Nelson Castillo <arhuaco@freaks-unidos.net>
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
There is no need now for individual GPIO port J pin control bit
definitions, the GPIO0..12 pins can be configured using the gpiolib
API. The GPJ* register address offset definitions for S3C2413 are
moved to the common mach-s3c24xx/include/mach/regs-gpio.h header.
These are still used outside of the gpio-samsung driver by PM code.
Switching GPJ port to camera function can be done for example with:
s3c_gpio_cfgall_range(S3C2410_GPJ(0), 13, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
There is now no more users of these compatibility definitions,
so remove them.
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Replace the S3C24XX SoC specific calls with the common gpiolib
API. This removes one more user of an obsolete GPIO API.
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Replace deprecated functions with the gpiolib ones.
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Replace SoC specific GPIO functions with the gpiolib API. The LED
gpio is freed right after it is configured so it can be acquired
in the s3c24xx_led driver.
This change is required for converting the s3c24xx_led driver
to the gpiolib API.
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: Harald Welte <laforge@gnumonks.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Replace SoC specific GPIO functions with the gpiolib API. The LED
gpios are freed right after they are initially configured so they
can be acquired in the s3c24xx_led driver.
This change is required for converting the s3c24xx_led driver
to the gpiolib API.
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The backlight gpio must not be left requested in the board
code, otherwise s3c24xx_led driver can't successfully claim it.
So request the backlight gpio, configure it to proper state and
gpio_free right away.
This change is required for converting the s3c24xx_led driver
to the gpiolib API.
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Properly define the CAMIF interrupt resources. This device have two
interrupts - corresponding to the "codec" and "preview" data paths.
IRQ_CAM is handled internally by the architecture and demultiplexed
to IRQ_S3C2440_CAM_C and IRQ_S3C2440_CAM_P - these interrupts only
should be handled in the driver.
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Use correct gate control bit for AC97 clock which is
S3C2440_CLKCON_AC97, not S3C2440_CLKCON_CAMERA.
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch configures the I2C bus timing registers according
to information passed via DT. Currently, 100kHz and 400kHz
modes are supported.
The TIMING2 register value is wrong in the documentation for
i.MX28! This was found and fixed by:
Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
PMU registration is successfully completed by Device Tree now, so
there is no longer a requirement to register it from platform code.
This patch removes platform registration during a DT boot.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
All Device Tree enablement for Snowball's Platform devices; LEDs, Keys,
Ethernet and all associated AB8500 Multi-Functional Devices are now
complete, so here we remove any trace of adding those devices when Device
Tree is enabled.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Any non-standard property should contain the vendor's identifier which
should be perpended onto the property name followed by a comma. This
aids in name-space collision prevention.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
During a Device Tree boot, all probing will now be completed on parse
of the Device Tree binary. In the same patch we remove platform
registration of the Real Time Clock.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Here we add a node for the AB8500 Real Time Clock in all devices
supporting the DB8500. The AB8500 RTC driver makes use of named
interrupts we provide support for this too.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The AB8500 driver has now been provided with IRQ domain support. This
means we can request IRQs from any of it's uses via Device Tree. This
patch advertises the AB8500 as an Interrupt Controller and provides the
correct calls in the format the driver expects.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This node has no properties. It merely allows probing of the
ab8500-debugfs driver during Device Tree initialisation.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Here we specify each of the ab8500 USB driver's seven IRQs, which the
driver references by name. We also apply regulator support for the
three used by the device.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This adds the DT node for the misc/ab8500-pwm driver. It will
allow probing of the driver during a Device Tree enabled boot.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This adds the DT node for the mfd/ab8500-sysctrl driver. It will
allow probing of the driver during a Device Tree enabled boot.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch configures the user LED on Snowball to double flash
every second or so, whilst it's still alive. This can give key
indications as to what the board is doing in the case of no
console output.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch configures the user LED on Snowball to double flash
every second or so, whilst it's still alive. This can give key
indications as to what the board is doing in the case of no
console output.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch provides support for the ab8500-gpadc driver.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch enables and illuminates the user_led on the
Snowball low-cost development board using DT. It also
removes initialisation carried out from platform code.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Code exists in the mop500 board file (used for HREF and Snowball)
to initialise Snowball's user LED via the leds-gpio driver. However,
the driver isn't currently built when using the current configuration.
This patch aims to change that behavior.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch provides a way for find_clk() to complete its name-based
searches and still find the nmk-i2c clocks. As Device Tree has a
different naming structure to that of more traditional initialisation
methods, find_clk() not succeed without these bindings.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Now that u5500 is obsolete, u8500 is the only user of the Nomadik
i2c driver. As such there is no requirement to differentiate between
initialisation values. By the time a new SoC is released, almost all
of the ux500 platform will be DT:ed, so we can make decisions based
on the compatible property instead.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Allow proper initialisation for MMC via the mmci driver
for the Snowball low-cost development board using DT. At
the moment we continue to use DMA setup from platform code.
Once the DMA generic DT bindings have been completed we
can then port the remainder over to DT.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
On some platform it may happen that the input clock to keyboard may
change during suspend, thus impacting its wakeup capability.
There is no means for keyboard driver to know this frequency before
hand. Hence introduce a platform data 'suspended_rate' which indicates
the frequency during suspend at which keyboard operates.
Accordingly reprogram keyboard while going into suspend and restore
original configuration at the time of resume.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Checking for adc->ts_pend already claimed should be done with the
lock held.
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The rate of xusbxti clock is set in individual machine files.
The default value should be defined at the clock definition
and individual machine files should modify it if required.
Division by zero in kernel.
[<c0011849>] (unwind_backtrace+0x1/0x9c) from [<c022c663>] (Ldiv0+0x9/0x12)
[<c022c663>] (Ldiv0+0x9/0x12) from [<c001a3c3>] (s3c_setrate_clksrc+0x33/0x78)
[<c001a3c3>] (s3c_setrate_clksrc+0x33/0x78) from [<c0019e67>] (clk_set_rate+0x2f/0x78)
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add node for EXYNOS4 interrupt combiner controller.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The set_level callback in the controller data, which is used to configure
the slave select line, cannot be supported when migrating the driver to
device tree based discovery. Since all the platforms currently use gpio
as the slave select line, this callback can be removed from the
controller data and replaced with call to gpio_set_value in the driver.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
With the spi controller hardware configuration moved into the driver data, there
are no more default hardware configuration data that is passed through platform
data. Accordingly, the s3c64xx_spi{0|1|2}_set_platdata functions are adapted to
these changes.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The platform data pointer that is passed to the spi gpio setup functions
is not used. Hence, this parameter is removed from all the spi gpio setup
functions.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Platform data is used to specify controller hardware specific information
such as the tx/rx fifo level mask and bit offset of rx fifo level. Such
information is not suitable to be supplied from device tree. Instead,
it can be moved into the driver data and removed from platform data.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Commit 4972a80e16 (ARM: SAMSUNG: Add device tree support for pl330 dma
engine wrappers) introduced a new member 'dt_dmach_prop' in the struct
samsung_dma_info which is used to specify the dma channel number property
as obtained from the device tree. It also introduced a new dma request id
'DMACH_DT_PROP' to indicate that a device tree node property represting
the dma channel is available in 'struct samsung_dma_info'.
Add dma request id 'DMACH_DT_PROP' in s3c64xx dma channel id list in order
to maintain compatibility to the changes in the Samsung dma wrappper
operations.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Make it easier to switch to the common clock API by making the existing
clock API implementation depend on a Kconfig symbol which is enabled when
the common clock API is disabled. This means that we can have some SoCs
using the common clock API and some using the existing API rather than
needing a flag day to convert the entire family of devices over.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-exynos/pmu.c:318:14: warning:
symbol 'exynos5_list_both_cnt_feed' was not declared. Should it be static?
arch/arm/mach-exynos/pmu.c:332:14: warning:
symbol 'exynos5_list_diable_wfi_wfe' was not declared. Should it be static?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fixes the following warning:
arch/arm/mach-exynos/common.c:543:13:
warning: symbol 'combiner_init' was not declared. Should it be static?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adds clock setting entries for EXYNOS4212 and EXYNOS4412 platforms.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
[fixed compilation warning which is reported by Arnd Bergmann]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Use cpu compatibility field and clock-frequency field of DT to
estimate the capacity of each core of the system and to update
the cpu_power field accordingly.
This patch enables to put more running tasks on big cores than
on LITTLE ones. But this patch doesn't ensure that long running
tasks will run on big cores and short ones on LITTLE cores.
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Namhyung Kim <namhyung@kernel.org>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This factorization has also been proposed in another patch that has not been
merged yet:
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-January/080873.html
So, this patch could be dropped depending of the state of the other one.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Namhyung Kim <namhyung@kernel.org>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add infrastructure to be able to modify the cpu_power of each core
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Namhyung Kim <namhyung@kernel.org>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
From Shawn Guo <shawn.guo@linaro.org>:
Here is the second (last) batch of mxs mxs device tree changes for 3.6.
* 'mxs/dt-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: dts: imx28-evk: add usb devices
ARM: mxs: rename dts files with soc name being the prefix
ARM: apx4devkit: add pin muxing for GPIOs
ARM: apx4devkit: remove AUART3
ARM: apx4devkit: add SSP2 support
ARM: apx4devkit: fix the bus-width of SSP0 to 4 bits
ARM: apx4devkit: add display support
ARM: apx4devkit: add NAND support
ARM: mxs: add dtb-y target into Makefile.boot
ARM: mxs: convert stmp378x_devb board to device tree
ARM: mxs: convert tx28 board to device tree
ARM: mxs: convert apx4devkit board to device tree
ARM: mxs: convert m28evk board to device tree
ARM: dts: imx28: move lcdif control pins into board dts
ARM: dts: imx28: move extra gpmi-nand pins into board dts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'imx-defconfig' of git://git.pengutronix.de/git/imx/linux-2.6 into next/defconfig
From Sascha Hauer <s.hauer@pengutronix.de>:
ARM i.MX defconfig updates for v3.6
* tag 'imx-defconfig' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: imx_v4_v5_defconfig: update features
ARM: imx_v6_v7_defconfig: update features
Includes an update to v3.5-rc5
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Shawn Guo <shawn.guo@linaro.org>:
Here is the second (last) batch of imx device tree changes for 3.6.
* 'imx/dt-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: ensure ANATOP controller is available
ARM: dts: imx6q-sabrelite: add ecspi1 pinctrl support
ARM: dts: imx6q-sabrelite: add usb devices
ARM: imx6q: disable usb charger detector
ARM: imx6q: add usbphy clocks
ARM: imx6q: add usb controller clock lookups
ARM: dts: imx: update #interrupt-cells for gpio nodes
bindings: update imx and mxs #gpio-cells
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Sascha Hauer <s.hauer@pengutronix.de>:
ARM i.MX dt updates for v3.6
* tag 'imx-dt' of git://git.pengutronix.de/git/imx/linux-2.6:
arm/dts: Add support for i.MX31 bug 1.x board from buglabs.
ARM i.MX31: Add devicetree support
ARM: dts: Add basic support for mx27_3ds board
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Tony Lindgren <tony@atomide.com>:
Device tree related patches for omaps
* tag 'omap-devel-dt-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm/dts: New dts file for PandaBoardES (4460)
arm/dts: omap4-panda: Audio support for PandaBoard 4430
arm/dts: omap4-sdp: Enable audio support via device tree
arm/dts: omap4-sdp: Add support for twl6040
arm/dts: omap4-sdp: Add fixed regulator to represent VBAT
arm/dts: omap4: Add entry for OMAP DMIC IP
arm/dts: omap4: Add entry for OMAP McPDM IP
arm/dts: am33xx wdt node
arm/dts: remove MMC/SD and SPI related entries from am33xx.dtsi
watchdog: omap_wdt: add device tree support
ARM: OMAP: avoid build wdt platform device if with dt support
arm/dts: add wdt node for omap3 and omap4
arm/dts: OMAP4: Add Variscite OMAP4 System-On-Modeule support
arm/dts: Add support for AM335x BeagleBone
arm/dts: Add support for AM335x EVM
arm/dts: Add initial DT support for AM33XX SoC family
arm/dts: omap3-evm: Add i2c and twl4030 support
arm/dts: Add support for TI AM3517/05 EVM board
arm/dts: OMAP2: Add support for OMAP2420H4 Board
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Nicolas Ferre <nicolas.ferre@atmel.com>:
Two new boards described with device tree
* tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91:
ARM: at91: Add support for board aks-cdu
ARM: at91: add support for Telit EVK-PRO3 with Telit GE863-PRO3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch contains changes to Tegra device tree files, and related
Kconfig and Makefile changes. Highlights are:
* New support for the Whistler board.
* Use of the I2C pinctrl-based bus mux on Seaboard/Springbank.
This branch is based on Tegra's for-3.6/cleanup branch from a previous
pull request.
* 'for-3.6/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dt: tegra seaboard: move battery monitor to mux'd I2C bus.
ARM: dt: tegra: seaboard: instantiate pinctrl-based I2C bus mux
ARM: dt: tegra: add Whistler device tree file
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Imported from mailing list
* picoxcell/timer:
clocksource: dw_apb_timer: Add common DTS glue for dw_apb_timer
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Make a common device tree glue for clocksource/dw_apb_timer.
Move mach-picoxcell/time.c to be a generic device tree application
of the dw_apb_timer.
Configure mach-picoxcell to use the dw_apb_timer_of device tree
implementation in drivers/clocksource.
Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
... in preparation for common clock coming for Integrator
and Versatile Express.
Based on Linus Walleij's "ARM: integrator: convert to common
clock" patch.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
With recent enough motherboard firmware, core tile can be fitted
in either of the two daughterboard sites. The non-DT tile code for
V2P-CA9 did not check that when configuring DVI output nor setting
CLCD pixel clock.
Fixed now, providing "get master site" API in motherboard's code.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
The vexpress Kconfig setup tries to be clever^Whelpful and selects some
errata workarounds for certain revisions of the Cortex-A9 and PL310,
which may be required depending on the core tile.
Since the mach-vexpress can support A5, A7 and A15 coretiles, let's
make errata workaround selection optional.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Rob Herring <robherring2@gmail.com>
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
From Roland Stigge <stigge@antcom.de>:
This is the pull request including the fix for the compile error caused
by lpc32xx-next and dma branches collisions in linux-next.
* 'lpc32xx/core-fixes' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Adjust to pl08x DMA interface changes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adjusts the LPC32xx platform support to the new pl08x DMA interface,
fixing the compile error resulting from changed pl08x structures.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Commit ca1d72f033 ('PM / Domains: Make it possible to add devices to
inactive domains') introduced possibility to add devices to inactive
power domains and added pm_genpd_dev_need_restore() function which lets
platform core to notify power domain core that the specified device must
be restored (with its runtime_resume() callback) before first use.
This patch adds the pm_genpd_dev_need_restore() call what brings back
the suspend/resume behaviour for the client devices known from the
previous power domain driver (removed by commit 91cfbd4ee0 - 'ARM:
EXYNOS: Hook up power domains to generic power domain infrastructure').
Client device drivers relay on that suspend/resume behaviour, thus this
patch fixes runtime pm operation for client devices.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Some bootloaders disable unused power domains to reduce power
consuption. Power domain driver can easily read the actual state from
the hardware registers instead of assuming that their initial state is
always 'on'.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
When SYS_WDTRESET is set, watchdog timer reset request
is ignored by power management unit.
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
During imx6q initialization the usb charger detector is disabled but
for it, ANATOP controller symbols need to be available.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Imx6q sabrelite board uses ecspi1 to connect a spi flash sst25vf016b,
we need to add pinctrl information for it in the dts, otherwise the
ecspi1 driver can't work and the connected flash is wrongly
detected as a mr25h256 flash like this:
m25p80 spi32766.0: found mr25h256, expected sst25vf016b
m25p80 spi32766.0: mr25h256 (32 Kbytes)
Cc: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The external charger detector needs to be disabled,
or the signal at DP will be poor
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds real clock support to Calxeda Highbank SOC using the common
clock infrastructure.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
[mturquette@linaro.org: fixed up invalid writes to const struct member]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This converts the Integrator platform to use common clock
and the ICST driver. Since from this point not all ARM
reference platforms use the clock, we define
CONFIG_PLAT_VERSATILE_CLOCK and select it for all platforms
except the Integrator.
Open issue: I could not use the .init_early() field of the
machine descriptor to initialize the clocks, but had to
move them to .init_irq(), so presumably .init_early() is
so early that common clock is not up, and .init_machine()
is too late since it's needed for the clockevent/clocksource
initialization. Any suggestions on how to solve this is
very welcome.
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[mturquette@linaro.org: use 'select' instead of versatile Kconfig]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
All the Integrator devices have bus names like "mb:16" which
I think means "memory base 0x16000000" which is where the
UART0 is. So let's call it "uart0" because that's what most
platforms do these days.
Change this everywhere for the integrator as we prepare for
some core clock code movement.
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This converts the U300 clock implementation over to use the common
struct clk and moves the implementation down into drivers/clk.
Since VCO isn't used in tree it was removed, it's not hard to
put it back in if need be.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[mturquette@linaro.org: trivial Makefile conflict]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
* renesas-board-common:
ARM: mach-shmobile: select the fixed regulator driver on several boards
regulator: extend the fixed dummy voltage regulator to accept voltage
regulator: support multiple dummy fixed regulators
Conflicts:
arch/arm/mach-shmobile/Kconfig
* renesas-soc: (31 commits)
ARM: shmobile: Fix build problem in pm-sh7372.c for unusual .config
ARM: shmobile: Take cpuidle dependencies into account correctly
ARM: mach-shmobile: sh7377 generic board support via DT
ARM: mach-shmobile: r8a7740 generic board support via DT
ARM: shmobile: sh7372: completely switch over to using pm-rmobile API
ARM: shmobile: ap4evb: switch to using pm-rmobile API
ARM: shmobile: mackerel: switch to using pm-rmobile API
ARM: shmobile: sh7372: add pm-rmobile domain support
ARM: shmobile: r8a7740: add A4LC pm domain support
ARM: shmobile: r8a7740: add A3SP pm domain support
ARM: shmobile: r8a7740: add A4S pm domain support
ARM: shmobile: r8a7740: fixup: MSEL1CR 7bit control
ARM: shmobile: soc-core: add R-mobile PM domain common APIs
ARM: shmobile: sh7372 A3SM CPUIdle support
ARM: shmobile: Use INTCA with sh7372 A3SM power domain
ARM: mach-shmobile: Convert sh_clk_mstp32_register to sh_clk_mstp_register
ARM: shmobile: use common DMAEngine definitions on sh7372
ARM: shmobile: use common DMAEngine definitions on sh73a0
ARM: shmobile: sh73a0: add DMAEngine support for MPDMAC
ARM: shmobile: sh73a0: add USB clock support
...
* renesas-sh7372:
ARM: shmobile: Fix build problem in pm-sh7372.c for unusual .config
ARM: shmobile: Take cpuidle dependencies into account correctly
ARM: shmobile: sh7372: completely switch over to using pm-rmobile API
ARM: shmobile: ap4evb: switch to using pm-rmobile API
ARM: shmobile: mackerel: switch to using pm-rmobile API
ARM: shmobile: sh7372: add pm-rmobile domain support
ARM: shmobile: sh7372 A3SM CPUIdle support
ARM: shmobile: Use INTCA with sh7372 A3SM power domain
ARM: shmobile: use common DMAEngine definitions on sh7372
ARM: shmobile: sh7372: remove unused sh7372_a3sp_init() on !CONFIG_PM
* renesas-sh73a0:
ARM: shmobile: use common DMAEngine definitions on sh73a0
ARM: shmobile: sh73a0: add DMAEngine support for MPDMAC
ARM: shmobile: sh73a0: add USB clock support
* renesas-r8a7740:
ARM: mach-shmobile: r8a7740 generic board support via DT
ARM: shmobile: r8a7740: add A4LC pm domain support
ARM: shmobile: r8a7740: add A3SP pm domain support
ARM: shmobile: r8a7740: add A4S pm domain support
ARM: shmobile: r8a7740: fixup: MSEL1CR 7bit control
ARM: shmobile: use common DMAEngine definitions on r8a7740
ARM: shmobile: r8a7740: add DMAEngine support for USB
ARM: shmobile: r8a7740: add DMAEngine support for SDHI
ARM: shmobile: r8a7740: add DMAEngine support for FSI
* renesas-fixes:
ARM: shmobile: r8a7779: Route all interrupts to ARM
ARM: shmobile: kzm9d: use late init machine hook
ARM: shmobile: kzm9g: use late init machine hook
ARM: mach-shmobile: armadillo800eva: Use late init machine hook
This is required for udev to run which is common to many user-spaces.
It is my understanding that this is a requirement for automated
testing conducted by Iwamatsu-san.
Signed-off-by: Simon Horman <horms@verge.net.au>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
If neither CONFIG_SUSPEND nor CONFIG_CPU_IDLE is set in the kernel
configuration file, build error occurs in
arch/arm/mach-shmobile/pm-sh7372.c.
Fix it by rearranging #ifdefs in that file to make the
definition of sh7372_suspend_init() depend only on
CONFIG_SUSPEND and the definition of sh7372_cpuidle_init()
depend only on CONFIG_CPU_IDLE.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Magnus Damm <damm@opensource.se>
The sh7372's cpuidle code uses cpu_suspend() and cpu_resume() in
its implementation of the .enter() callback for deeper C-states, so
make ARCH_SH7372 select ARM_CPU_SUSPEND if CPU_IDLE is set to satisfy
all of the build dependencies (it has to be selected for CONFIG_PM
as well for the system suspend handling).
[rjw: Added the subject and changelog.]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* multiple omap2+ bug fixes
* a regression on ux500 dt support
* a build failure on shmobile
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
- multiple omap2+ bug fixes
- a regression on ux500 dt support
- a build failure on shmobile
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP2+: omap2plus_defconfig: EHCI driver is not stable, disable it
ARM: shmobile: fix platsmp.c build when ARCH_SH73A0=n
ARM: ux500: Over-ride the DT device naming scheme for pinctrl
ARM: ux500: Fix build errors/warnings when MACH_UX500_DT is not set
of: address: Don't fail a lookup just because a node has no reg property
ARM: OMAP2+: hwmod code/clockdomain data: fix 32K sync timer
Rename mxs dts files with soc name being the prefix, so that the board
dts file can be located easily by soc name, and we also gain the
consistency of naming.
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
- Add sound support
- Enable mtd support
- Enable i.MX NAND support
- Enable NOR flash support
- Enable JFFS2/UBI
- Enable clk debugfs support
- Disable iommu support which is not present on i.MX
- Enable MC13xxx RTC
- Enable RNGA random number generator
- Enable SPI EEPROM support
- Enable I2C EEPROM support
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
AUART3 is not available anymore. Pins are used as GPIOs.
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add HannStar display and device tree configuration.
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add dtb-y target into Makefile.boot, so that "make ARCH=arm dtbs" can
build out all the dtbs listed there. It's very useful for build-testing
all the <board>.dts when imx28.dtsi changes.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The enc28j60 spi device does not get converted to dts file, because
there is no mxs spi driver on mainline so far. The enc28j60 spi
in mach-stmp378x_devb.c does not work anyway.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
FEC support is missing because we need to find a proper way to rewrite
tx28_add_fec0 for device tree boot.
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The presence and muxing of lcdif control pins can vary much on different
boards. Move them into imx28-evk.dts to make lcdif_24bit_pins_a only
about data pins, so that it can be reused by other boards.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Only pins GPMI_CE0N and GPMI_READY0 are generally used by other boards.
Move GPMI_CE1N and GPMI_READY1 into imx28-evk.dts to make gpmi_pins_a
more general, and can be used by other boards.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Nicolas Royer <nicolas@eukrea.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Eric Bénard <eric@eukrea.com>
Tested-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Only the main UART and the memory node information are added.
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds basic devicetree support for i.MX31 based SoCs.
Only the UART and interrupts bindings are added.
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
From Tony Lindgren <tony@atomide.com>:
This branch contains minimal support for omap5 to boot to a
console without clock framework support. This branch depends
on omap-cleanup-part2-for-v3.6.
* 'devel-omap5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: Kconfig update to support additional GPIOs in OMAP5
ARM: OMAP5: Add the build support
arm/dts: OMAP5: Add omap5 dts files
ARM: OMAP5: board-generic: Add device tree support
ARM: omap2+: board-generic: clean up the irq data from board file
ARM: OMAP5: Add SMP support
ARM: OMAP5: Add the WakeupGen IP updates
ARM: OMAP5: l3: Add l3 error handler support for omap5
ARM: OMAP5: gpmc: Update gpmc_init()
ARM: OMAP5: timer: Add clocksource, clockevent support
ARM: OMAP5: Add minimal support for OMAP5430 SOC
ARM: OMAP5: id: Add cpu id for ES versions
ARM: OMAP: counter-32k: Select the CR register offset using the IP scheme
ARM: OMAP2+: Move stubbed secure_sram_reserve function to a common.c and call it __weak
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
will use the common clock framework, but those patches are not quite
ready yet for omaps. This branch depends on omap-cleanup-part2-for-v3.6
branch.
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Merge tag 'omap-devel-am33xx-data-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/clk
From Tony Lindgren <tony@atomide.com>:
This branch adds clock data for am33xx. Note that eventually these
will use the common clock framework, but those patches are not quite
ready yet for omaps. This branch depends on omap-cleanup-part2-for-v3.6
branch.
* tag 'omap-devel-am33xx-data-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3+: clock33xx: Add AM33XX clock tree data
ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix an interrupt handling issue with cp_intc which
was causing occasional spurious interrupts with DA850 EVM
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Merge tag 'davinci-v3.6-fixes' of git://gitorious.org/linux-davinci/linux-davinci into next/fixes-non-critical
DaVinci fixes for v3.6
Fix an interrupt handling issue with cp_intc which
was causing occasional spurious interrupts with DA850 EVM
* tag 'davinci-v3.6-fixes' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: da8xx: fix interrupt handling
Add IRQ domain support for cp_intc and
runtime PM core support for DaVinci devices.
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Merge tag 'davinci-v3.6-soc' of git://gitorious.org/linux-davinci/linux-davinci into next/soc
From Sekhar Nori <nsekhar@ti.com>:
DaVinci SoC updates for v3.6
Add IRQ domain support for cp_intc and
runtime PM core support for DaVinci devices.
* tag 'davinci-v3.6-soc' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: add runtime PM support for clock management
ARM: davinci: cp_intc: Add irq domain support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Remove some header files which were marked for removal. These files are
not used anymore.
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Merge tag 'davinci-v3.6-cleanup' of git://gitorious.org/linux-davinci/linux-davinci into next/cleanup
From: Sekhar Nori <nsekhar@ti.com>
DaVinci cleanups for v3.6
Remove some header files which were marked for removal. These files are
not used anymore.
* tag 'davinci-v3.6-cleanup' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: remove dummy header files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
echi-omap because the driver currently causes issues with PM.
This annoys Kevin as it makes it harder for him to validate that
PM is working. The proper fixes for the echi-omap are being
discussed, but looks like it will not be properly working with PM
until in v3.7.
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Merge tag 'omap-fixes-for-v3.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
From Tony Lindgren <tony@atomide.com>:
Here is one PM regression fix and a defconfig change to disable
echi-omap because the driver currently causes issues with PM.
This annoys Kevin as it makes it harder for him to validate that
PM is working. The proper fixes for the echi-omap are being
discussed, but looks like it will not be properly working with PM
until in v3.7.
* tag 'omap-fixes-for-v3.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: omap2plus_defconfig: EHCI driver is not stable, disable it
ARM: OMAP2+: hwmod code/clockdomain data: fix 32K sync timer
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Read the number of MPIC interrupts from the controller and only register
that many.
[gregory.clement@free-electrons.com: rename armada symbol name to fit
with new name: armada_370_xp]
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32]
[ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ]
[ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic]
[ben.dooks@codethink.co.uk: move mpic per-cpu register base ]
[ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()]
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-by: Lior Amsalem <alior@marvell.com>
From Kukjin Kim <kgene.kim@samsung.com>:
* 'next/board-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C64XX: Add IRQ mapping for wm0010 on Cragganmore
ARM: S5PV210: Add HSOTG support to SMDKV210
ARM: EXYNOS: Update keypad entries for SMDK4X12
ARM: S3C64XX: Dynamically assign interrupts for CPU PMIC on Cragganmore
ARM: S3C64XX: Dynamically allocate the IRQ range for WM8994 on Cragganmore
ARM: S3C64XX: Add WM5102 EVM to Cragganmore modules
ARM: S3C64XX: Add module identification for Balblair Cragganmore module
ARM: EXYNOS: Add HSOTG support to SMDKV310
ARM: EXYNOS: Add HSOTG support to Origen
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Kukjin Kim <kgene.kim@samsung.com>:
Here is updating DMA common operation for Samsung SoCs.
Since some DMA client driver such as spi needs to change the configuration
after dma_request() so this branch adds dma_config() can configure DMA
transmit option which is included in dma_request() after that.
Note, according to the changes, needs to update spi and ASoC drivers
for Samsung SoCs and only got the ack from Mark Brown not Grant Likely
and as I know, he is busy for moving. But I think, the spi change has
no problem and it is simple.
* 'next/devel-dma-ops' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: Fix compiler warning in dma-ops.c file
ASoC: follow the updated samsung DMA common operations
spi/s3c64xx: Add the use of DMA config operation
ARM: SAMSUNG: Add config() function in DMA common operations
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Kukjin Kim <kgene.kim@samsung.com>:
Samsung cleanup patches for v3.6 and most of them are removing
useless codes
* 'next/cleanup-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5
ARM: EXYNOS: Remove leftovers of the Samsung specific power domain control
ARM: SAMSUNG: Remove unused variable 'running' on PWM
ARM: SAMSUNG: remove unused SPI clock headers
ARM: S3C24XX: remove unused header <mach/bast-pmu.h>
ARM: S3C24XX: Remove duplicate header file inclusion
ARM: SAMSUNG: Remove description corresponding to a deleted element
ARM: S5PC100: Remove unused variable in dma.c file
ARM: S5P64X0: Remove unused variable in dma.c file
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
sparse found this assignment of u32 to an int. Fix it:
drivers/i2c/busses/i2c-imx.c:540:56: warning: incorrect type in argument 3 (different signedness)
and also fix the type in platform_data. All current users use values
which fit into the old and new type, so it is a safe change.
Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
Reviewed-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit cb8ca5897 (ARM: omap3evm: enable VBUS switch for EHCI tranceiver)
added a new randconfig error if TWL4030_CORE is not selected:
arch/arm/mach-omap2/board-omap3evm.c:368: undefined reference to `twl_i2c_read_u8'
arch/arm/mach-omap2/board-omap3evm.c:370: undefined reference to `twl_i2c_write_u8'
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for our "aks-cdu" board based up on Telit's module GE863 Pro3.
It has more uarts, leds, another nand partitioning.
Signed-off-by: Jiri Prchal <jiri.prchal@aksignal.cz>
[nicolas.ferre@atmel.com: correction of the dts file]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The syscall_trace on ARM takes a `why' parameter to indicate whether or
not we are entering or exiting a system call. This can be confusing for
people looking at the code since (a) it conflicts with the why register
alias in the entry assembly code and (b) it is not immediately clear
what it represents.
This patch splits up the syscall_trace function into separate wrappers
for syscall entry and exit, allowing the low-level syscall handling
code to branch to the appropriate function.
Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When auditing system calls on ARM, the audit code is called before
notifying the parent process in the case that the current task is being
ptraced. At this point, the parent (debugger) may choose to change the
system call being issued via the SET_SYSCALL ptrace request, causing
the wrong system call to be reported to the audit tools.
This patch moves the audit calls after the ptrace SIGTRAP handling code
in the syscall tracing implementation.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ret_from_fork is setup for a freshly spawned child task via copy_thread,
called from copy_process. The latter function clears TIF_SYSCALL_TRACE
and also resets the child task's audit_context to NULL, meaning that
there is little point invoking the system call tracing routines.
Furthermore, getting hold of the syscall number is a complete pain and
it looks like the current code doesn't even bother.
This patch removes the syscall tracing checks from ret_from_fork.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch allows a timer-based delay implementation to be selected by
switching the delay routines over to use get_cycles, which is
implemented in terms of read_current_timer. This further allows us to
skip the loop calibration and have a consistent delay function in the
face of core frequency scaling.
To avoid the pain of dealing with memory-mapped counters, this
implementation uses the co-processor interface to the architected timers
when they are available. The previous loop-based implementation is
kept around for CPUs without the architected timers and we retain both
the maximum delay (2ms) and the corresponding conversion factors for
determining the number of loops required for a given interval. Since the
indirection of the timer routines will only work when called from C,
the sa1100 sleep routines are modified to branch to the loop-based delay
functions directly.
Tested-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch implements read_current_timer using the architected timers
when they are selected via CONFIG_ARM_ARCH_TIMER. If they are detected
not to be usable at runtime, we return -ENXIO to the caller.
Furthermore, if read_current_timer is exported then we can implement
get_cycles in terms of it for use as both an entropy source and for
implementing __udelay and friends.
Tested-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
DCACHE_WORD_ACCESS uses the word-at-a-time API for optimised string
comparisons in the vfs layer.
This patch implements support for load_unaligned_zeropad for ARM CPUs
with native support for unaligned memory accesses (v6+) when running
little-endian.
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch implements the word-at-a-time interface for ARM using the
same algorithm as x86. We use the fls macro from ARMv5 onwards, where
we have a clz instruction available which saves us a mov instruction
when targetting Thumb-2. For older CPUs, we use the magic 0x0ff0001
constant. Big-endian configurations make use of the implementation from
asm-generic.
With this implemented, we can replace our byte-at-a-time strnlen_user
and strncpy_from_user functions with the optimised generic versions.
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In order to provide PMU name strings compatible with the OProfile
user ABI, an enumeration of all PMUs is currently used by perf to
identify each PMU uniquely. Unfortunately, this does not scale well
in the presence of multiple PMUs and creates a single, global namespace
across all PMUs in the system.
This patch removes the enumeration and instead uses the name string
for the PMU to map onto the OProfile variant. perf_pmu_name is
implemented for CPU PMUs, which is all that OProfile cares about anyway.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ARM arch_{read,write}_trylock implementations include unused
backwards branch labels, since we don't retry the locking operation
if the exclusive store fails.
This patch removes the labels.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Ticket spinlocks ensure locking fairness by introducing a FIFO-like
nature to the granting of lock acquisitions and also reducing the
thundering herd effect when spinning on a lock by allowing the cacheline
to remain in a shared state amongst the waiting CPUs. This is especially
important on systems where memory-access times are not necessarily
uniform when accessing the lock structure (for example, on a
multi-cluster platform where the lock is allocated into L1 when a CPU
releases it).
This patch implements the ticket spinlock algorithm for ARM, replacing
the simpler implementation for ARMv6+ processors.
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch introduces a new Kconfig option which, when enabled, causes
the kernel to write the PID of the current task into the PROCID field
of the CONTEXTIDR on context switch. This is useful when analysing
hardware trace, since writes to this register can be configured to emit
an event into the trace stream.
The thread notifier for writing the PID is deliberately kept separate
from the ASID-writing code so that we can support newer processors using
LPAE, where the ASID is stored in TTBR0. As such, the switch_mm code is
updated to perform a read-modify-write sequence to ensure that we don't
clobber the PID on CPUs using the classic 2-level page tables.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When a CPU is shutdown its architected timer comparators registers are
lost. Within CPU idle, before processors enter shutdown they enter
clock events broadcast mode through the
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, cpuid);
function where the local timers are emulated by a global always-on timer.
On CPU resume, the per-CPU tick device normal mode is restored by exiting
broadcast mode through
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, cpuid);
In order for this mechanism to function, architected timers should add to
their feature C3STOP, which means that they are not able to function when the
CPU is in off-mode.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 64ac24e738 ("Generic semaphore
implementation") removed the last include of this header. Apparently it
was just an oversight to keep this header. It can safely be removed now.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Let's map the initial RAM up to the end of the kernel .bss instead of
the strict kernel image area. This simplifies the code as the kernel
image only needs to be handled specially in the XIP case. That covers
the legacy ATAG location as well.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch allows the ATAG_CMDLINE provided by the bootloader to be
concatenated to the bootargs property of the device tree.
This is useful to merge static values defined in the device tree
with the boot loader's (possibly) more dynamic values, such as
startup reasons and more.
The bootloader should use the device tree to pass those values to
the kernel, but that's not always simple (old bootloader or very
small one).
The behaviour is the same as the one introduced by Victor Boivie in
4394c12442 by extending the CONFIG_CMDLINE.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The vectors page has been traditionally mapped as WT on UP systems but
this creates a mismatched alias with the directly mapped RAM that is
using WB attributes. On newer processors like Cortex-A15 this has
implications on the data/instructions coherency at the point of
unification (usually L2).
This patch removes such restriction.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Robustify ARM's die() handling with improvements from x86:
- Fix for a deadlock (before panic in the case of panic_on_oops) if we
oops under a spinlock which is also used from interrupt handler,
since the old code was unconditionally enabling interrupts.
- Usage of arch spinlock so lockdep etc doesn't get involved while
we're trying to dump out oopses.
- Deadlock prevention in the unlikely event that die() recurses.
The changes all touch the same few lines of code, so they're done
together in one patch.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make the OS timer registers have IOMEM like properities so they can
be passed to readl_relaxed/writel_relaxed() et.al. rather than being
straight volatile dereferences. Add linux/io.h includes where
required.
linux/io.h includes added to arch/arm/mach-sa1100/cpu-sa1100.c,
arch/arm/mach-sa1100/jornada720_ssp.c, arch/arm/mach-sa1100/leds-lart.c
drivers/input/touchscreen/jornada720_ts.c, drivers/pcmcia/sa1100_shannon.c
from Arnd.
This fixes these warnings:
arch/arm/mach-sa1100/time.c: In function 'sa1100_timer_init':
arch/arm/mach-sa1100/time.c:104: warning: passing argument 1 of 'clocksource_mmio_init' discards qualifiers from pointer target type
arch/arm/mach-pxa/time.c: In function 'pxa_timer_init':
arch/arm/mach-pxa/time.c:126: warning: passing argument 1 of 'clocksource_mmio_init' discards qualifiers from pointer target type
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
While running hotplug tests I ran into this RCU splat
===============================
[ INFO: suspicious RCU usage. ]
3.4.0 #3275 Tainted: G W
-------------------------------
include/linux/rcupdate.h:729 rcu_read_lock() used illegally while idle!
other info that might help us debug this:
RCU used illegally from idle CPU!
rcu_scheduler_active = 1, debug_locks = 0
RCU used illegally from extended quiescent state!
4 locks held by swapper/2/0:
#0: ((cpu_died).wait.lock){......}, at: [<c00ab128>] complete+0x1c/0x5c
#1: (&p->pi_lock){-.-.-.}, at: [<c00b275c>] try_to_wake_up+0x2c/0x388
#2: (&rq->lock){-.-.-.}, at: [<c00b2860>] try_to_wake_up+0x130/0x388
#3: (rcu_read_lock){.+.+..}, at: [<c00abe5c>] cpuacct_charge+0x28/0x1f4
stack backtrace:
[<c001521c>] (unwind_backtrace+0x0/0x12c) from [<c00abec8>] (cpuacct_charge+0x94/0x1f4)
[<c00abec8>] (cpuacct_charge+0x94/0x1f4) from [<c00b395c>] (update_curr+0x24c/0x2c8)
[<c00b395c>] (update_curr+0x24c/0x2c8) from [<c00b59c4>] (enqueue_task_fair+0x50/0x194)
[<c00b59c4>] (enqueue_task_fair+0x50/0x194) from [<c00afea4>] (enqueue_task+0x30/0x34)
[<c00afea4>] (enqueue_task+0x30/0x34) from [<c00b0908>] (ttwu_activate+0x14/0x38)
[<c00b0908>] (ttwu_activate+0x14/0x38) from [<c00b28a8>] (try_to_wake_up+0x178/0x388)
[<c00b28a8>] (try_to_wake_up+0x178/0x388) from [<c00a82a0>] (__wake_up_common+0x34/0x78)
[<c00a82a0>] (__wake_up_common+0x34/0x78) from [<c00ab154>] (complete+0x48/0x5c)
[<c00ab154>] (complete+0x48/0x5c) from [<c07db7cc>] (cpu_die+0x2c/0x58)
[<c07db7cc>] (cpu_die+0x2c/0x58) from [<c000f954>] (cpu_idle+0x64/0xfc)
[<c000f954>] (cpu_idle+0x64/0xfc) from [<80208160>] (0x80208160)
When a cpu is marked offline during its idle thread it calls
cpu_die() during an RCU idle period. cpu_die() calls complete()
to notify the killing process that the cpu has died. complete()
calls into the scheduler code and eventually grabs an RCU read
lock in cpuacct_charge().
Mark complete() as RCU_NONIDLE so that RCU pays attention to this
CPU for the duration of the complete() function even though it's
in idle.
Suggested-by: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
OMAP5 has 8 GPIO banks so that there are 32x8 = 256 GPIOs.
In order for the gpiolib to detect and initialize these
additional GPIOs and other TWL GPIOs, ARCH_NR_GPIO is set
to 512 instead of present 256.
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Reported-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Adding the build support required for OMAP5 soc
in to omap2+ config.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Adding the minimum device tree files required for
OMAP5 to boot.
Reviewed-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Adding the minimal support for OMAP5 evm board
with device tree.
Reviewed-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Move the irq_match arrays and the irq init functions of OMAP 2,3
and 4 based boards out of board-generic.c file and also rename the
irq init function to match the interrupt controller present in
the SOCs.
This is a preparatory patch to add the OMAP5 evm board's irq init
support with device tree.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Add OMAP5 SMP boot support using OMAP4 SMP code. The relevant code paths
are runtime checked using cpu id
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
OMAP4 and OMAP5 share same WakeupGen IP with below few udpates on OMAP5.
- Additional 32 interrupt support is added w.r.t OMAP4 design.
- The AUX CORE boot registers are now made accessible from non-secure SW.
- SAR offset are changed and PTMSYNC* registers are removed from SAR.
Patch updates the WakeupGen code accordingly.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The l3 interconnect ip is same for OMAP4 and OMAP5.
So reuse the l3 error handler error code for OMAP5
as well. Also a few targets has been newly added for
OMAP5. So updating the driver for that here.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
GPMC module is the same as in OMAP4.
Just update the base address and irq number.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Adding the Initialisaton for clocksource and clockevent device
on OMAP5 Socs.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP
architecture. It's a dual core SOC with GIC used for interrupt
handling and with an integrated L2 cache controller.
OMAP5432 is another variant of OMAP5430, with a
memory controller supporting DDR3 and SATA.
Patch includes:
- The machine specific headers and sources updates.
- Platform header updates.
- Minimum initialisation support for serial.
- IO table init
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Adding the OMAP5 ES1.0, 2.0 and OMAP5432 cpu revision
detection support.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
OMAP socs has a legacy and a highlander version of the
32k sync counter IP. The register offsets vary between the
highlander and the legacy scheme. So use the 'SCHEME'
bits(30-31) of the revision register to distinguish between
the two versions and choose the CR register offset accordingly.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
omap_secure_ram_reserve_memblock is stubbed for OMAP1,2 only builds using a
ifdef check. But this results in adding CONFIG_ARCH_OMAPxx checks for
future socs that use the real function. So move this to common.c file and
call it __weak.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The 4430 and 4460 version of PandaBoard mostly the same with
exception at least in audio setup.
Use the omap4-panda.dts file as a base and only override the differences
between the revisions.
For audio it is the name of the sound card and the routing information.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
PandaBoard uses twl6040 connected via McPDM for audio.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On OMAP4 SDP the audio setup includes the twl6040 codec and digital
microphones.
Since OMAP4 SDP is a reference board it has all possible audio interfaces
connected. This information is passed via the ti,audio-routing
property.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The twl6040 provides the audio and vibra support on OMAP4 SDP boards.
It is connected to i2c1 bus with 0x4b address.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DMIC IP is used to connect up to 6 digital microphones directly to OMAP.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
McPDM is used on OMAP4 based boards to communicate with an external audio
codec (twl6040).
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The sys_nirq2 is used for twl6040, make sure the pin is configured
correctly.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The sys_nirq2 is used for twl6040, make sure the pin is configured
correctly.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
CP_INTC code in entry-macro.S code reads SECR1n register to see if
an interrupt was indeed pending. This register is actually marked as
write-only in the OMAP-L138 TRM. Moreover, the code just checks to see
the entire register is non-zero and does not check a specific interrupt
number.
Fix this to use interrupt pending bit in GIPR register for this purpose.
GIPR register is already being read to know the highest priority interrupt
pending.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The i2c-nomadik gateware is really a PrimeCell APB device. By hosting
the driver under the amba bus we can access it more easily, for
example using the generic pci-amba driver. The patch also fixes the
mach-ux500 users, so they register an amba device instead than a
platform device.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Acked-by: Giancarlo Asnaghi <giancarlo.asnaghi@st.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
The header and driver are only used by arm/mach-u8500 (and potentially
arm/mach-nomadik), but the STA2X11 I/O Hub exports on PCIe a number of
devices, including i2c-nomadik. This patch allows compilation of the
driver under x86.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Acked-by: Giancarlo Asnaghi <giancarlo.asnaghi@st.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
The MMC/SD and SPI entries in this file are not tested yet. They
inadvertently came into the patch because of some work in progress
stuff I had in my repo.
These entries should not have been sent out in the first place and
I am sorry for the trouble and will be extra careful in future.
Since the offending commit is not sent upstream yet, I hope this can
be merged into the commit 5fc0b42a98
(arm/dts: Add initial DT support for AM33XX SoC family) on the devel-dt
branch of linux-omap tree.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If provided dt support, then skip add wdt platform device as usual.
Signed-off-by: Xiao Jiang <jgq516@gmail.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP4 only build breaks with below error
arch/arm/mach-omap2/sdrc.c:135: error: redefinition of 'omap2_sdrc_init'
arch/arm/plat-omap/include/plat/sdrc.h:130: note: previous definition of 'omap2_sdrc_init' was here
make[1]: *** [arch/arm/mach-omap2/sdrc.o] Error 1
Fix the same by using newly introduced CONFIG_SOC_HAS_OMAP2_SDRC marco.
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch completes commit 08406f5 by fixing the following issues, according to
the reference manual:
* MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like H1PM and
H2PM, not the opposite.
* MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like H1_OC_DIS, not the
opposite.
* Typos in comments.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make ehci power and overcurrent polarities configurable. If not set, these new
configurartions keep the default register values so that existing board files
do not have to be changed.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that RTC support has been enabled for i.MX35, add RTC to the mx35_3ds board.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX35 has an RTC compatible with the i.MX31's, so enable its support even
if it's not very useful because it's not battery backed.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The data sheet of the i.MX35 says it is an ARM1136JF-S processor, version r1p3,
which, according to section "B.1. New instructions" of the ARM1136JF-S and
ARM1136J-S Technical Reference Manual, makes the i.MX35 CPU architecture not
only ARMv6, but ARMv6k.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds missing definitions for DISP, GPT and CCM pads.
These pins are not used by kernel, but may be helpful for custom boards.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a very basic dt support for mx27_3ds (also known as mx27pdk).
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The EHCI driver is not stable enough to be enabled by default. In v3.5,
it has at least the following problems:
- warning dump during bootup
- hang during suspend
- prevents CORE powerdomain from entering retention during idle (even
when no USB devices connected.)
This demonstrates that this driver has not been thoroughly tested and
therfore should not be enabled in the default defconfig.
In addition, the problems above cause new PM regressions which need be
addressed before this driver should be enabled in the default
defconfig.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Prior to the new i.mx clock conversion the mx27 silicon version was printed at boot.
Reenable this feature.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the AB8500 is a subordinate MFD device to the DB8500-PRCMU,
for consistency and a better 1:1 depiction of how the hardware
is laid out, it is a good idea to register it in the same way
as we do for the other MFD child devices. In order for us to do
this successfully we have to pass AB8500's platform data when
registering the DB8500-PRCMU from platform code.
Also solves this issue:
WARNING: at fs/sysfs/dir.c:526 sysfs_add_one+0x88/0xb0()
sysfs: cannot create duplicate filename '/bus/platform/devices/ab8500-core.0'
Reported-by: Linus Walleij <linus.walleij@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Add irq domain support for max8997 interrupts. The reverse mapping method
used is linear mapping since the sub-drivers of max8997 such as regulator
and charger drivers can use the max8997 irq_domain to get the linux irq
number for max8997 interrupts. All uses of irq_base in platform data and
max8997 driver private data are removed.
Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Now the MFD API is Device Tree aware we can use it for platform
registration again, even when booting with DT enabled. To aid in
Device Node pointer allocation we provide each cell with the
associative compatible string.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Hierarchically, the AB8500 is a child of the DB8500 PRCMU. So now that
Device Tree is being used and MFD core code is Device Tree aware, we
can simply register DB8500 PRCMU from Device Tree in the normal way
then allow the DB8500 PRCMU driver to register the AB8500 as a simple
MFD device at probe time.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This allows use a Debian armhf usespace
as well as the existing ability to use a Debian armel userspace.
Signed-off-by: Simon Horman <horms@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Pull ARM fixes from Russell King:
"Last merge window, we had some updates from Al cleaning up the signal
restart handling. These have caused some problems on ARM, and while
Al has some fixes, we have some concerns with Al's patches but we've
been unsuccesful with discussing this.
We have got to the point where we need to do something, and we've
decided that the best solution is to revert the appropriate commits
until Al is able to reply to us.
Also included here are four patches to fix warnings that I've noticed
in my build system, and one fix for kprobes test code."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: fix warning caused by wrongly typed arm_dma_limit
ARM: fix warnings about atomic64_read
ARM: 7440/1: kprobes: only test 'sub pc, pc, #1b-2b+8-2' on ARMv6
ARM: 7441/1: perf: return -EOPNOTSUPP if requested mode exclusion is unavailable
ARM: 7443/1: Revert "new way of handling ERESTART_RESTARTBLOCK"
ARM: 7442/1: Revert "remove unused restart trampoline"
ARM: fix set_domain() macro
ARM: fix mach-versatile/pci.c warning
Change the value of #interrupt-cells of gpio nodes from 1 to 2, so that
the gpio irq type can be specified in device tree. Also update binding
document to make it clear.
Reported-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
From Stephen Warren <swarren@wwwdotorg.org>:
This branch contains a single commit which adjusts tegra_defconfig to
enable new kernel features, driven by new device tree file content and drivers.
* 'for-3.6/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: defconfig updates
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Stephen Warren <swarren@wwwdotorg.org>:
This branch contains numerous changes required as a baseline in order to
convert Tegra to the common clock framework. The intention was to also
include patches to actually convert Tegra to the common clock framework.
However, those patches appeared late in the kernel cycle and currently
cause regressions on some boards, so were dropped for now.
* 'for-3.6/common-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: Provide clock for only one PWM controller
ARM: tegra: Fix PWM clock programming
ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"
ARM: tegra: Remove second instance of uart clk
crypto: add clk_prepare/clk_unprepare
ASoC: tegra: add clk_prepare/clk_unprepare
staging: nvec: add clk_prepare/clk_unprepare
spi/tegra: add clk_prepare/clk_unprepare
Input: tegra-kbc - add clk_prepare/clk_unprepare
USB: ehci-tegra: add clk_prepare/clk_unprepare
mmc: tegra: add clk_prepare/clk_unprepare
i2c: tegra: Add clk_prepare/clk_unprepare
ARM: tegra: add clk_prepare/clk_unprepare
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Stephen Warren <swarren@wwwdotorg.org>
This branch contains changes to Tegra board files, and related Kconfig and
Makefile changes. Highlights include:
* Removal of Seaboard/Springbank board files; these boards can now only be
used with device tree.
* Use of small parts of some non-DT board files from the DT board files. This
enables all features that the non-DT board files have, when booting from DT.
This will allow almost complete removal of all non-DT board files in v3.7.
* Other miscellaneous changes.
This branch is based on Tegra's for-3.6/cleanup branch from a previous pull
request.
* 'for-3.6/boards' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: use of_default_bus_match_table
ARM: tegra: add device tree AUXDATA for APBDMA
ARM: tegra: paz00: enable WiFi rfkill when booting from device tree
ARM: tegra: harmony: init regulators, PCIe when booting from DT
ARM: tegra: trimslice: enable PCIe when booting from device tree
ARM: tegra: remove Seaboard board files
ARM: tegra: remove CONFIG_MACH_TEGRA_DT
ARM: tegra: make .dts compilation depend on Tegra2 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Stephen Warren <swarren@wwwdotorg.org>:
This branch contains changes to Tegra SoC-specific code in the
mach-tegra directory; only APBIO/DMA-related patches this time around.
* 'for-3.6/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: apbio: use dmaengine based dma driver
ARM: tegra: apbio access using dma for tegra20 only
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix build error in the case of SMP=y but ARCH_SH73A0=n
introduced by:
9601e87 ARM: shmobile: fix smp build
The use of of_machine_is_compatible() will link in the
the SoC-specific symbols:
"sh73a0_get_core_count", "sh73a0_smp_prepare_cpus",
"sh73a0_secondary_init" and "sh73a0_boot_secondary".
This patch adds an ugly #ifdef wrapper as a stop-gap
solution.
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Tested-by: Simon Horman <horms@verge.net.au>
Acked-by: "Rafael J. Wysocki" <rjw@sisk.pl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Lee Jones <lee.jones@linaro.org>:
* ux500/fixes-3.5:
ARM: ux500: Over-ride the DT device naming scheme for pinctrl
ARM: ux500: Fix build errors/warnings when MACH_UX500_DT is not set
of: address: Don't fail a lookup just because a node has no reg property
I ended up rebasing Lee's branch on 3.5-rc5 because we have more patches
lined for 3.6 that depend on them, and I want to keep all branches in
arm-soc be based on -rc releases rather than random commits in the
upstream history.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
When pin control mapping tables are written the registered device
name is supplied for use in name-based searches within the pinctrl
driver. In the case of the DB8500 the string "pinctrl-db8500" is
used. However, when we register the driver with Device Tree, its
naming convention uses something that looks more like "pinctrl.2".
To work around the device naming inconsistencies between devices
registered via platform code and the ones registered by Device
Tree, we use AUXDATA to over-ride the Device Tree naming scheme.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
When MACH_UX500_DT and all related Device Tree configurations are forced
off the warning and error below prevent the kernel from compiling. This
simple patch fixes both issues and allows for full build and boot of
ST-Ericsson's low-cost development board, Snowball.
Warnings fixed:
arch/arm/mach-ux500/board-mop500.c:680:32: warning: ‘snowball_of_platform_devs’ defined but not used
Errors fixed:
arch/arm/mach-ux500/timer.c: In function ‘ux500_timer_init’:
arch/arm/mach-ux500/timer.c:66:3: error: implicit declaration of function ‘of_find_matching_node’
arch/arm/mach-ux500/timer.c:66:6: warning: assignment makes pointer from integer without a cast
Cc: stable@vger.kernel.org
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Two bug fixes for the previous state of the imx sparse irq changes.
* 'imx/sparse-irq' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx: select USE_OF
ARM: imx: Fix build error due to missing irqs.h include
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Shawn Guo <shawn.guo@linaro.org>:
* 'mxs/defconfig-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: defconfig: Enable CONFIG_COMMON_CLK_DEBUG
ARM: mxs_defconfig: Enable RTC driver
ARM: mxs_defconfig: Let AUART driver be built by default
ARM: mxs: Enable MACH_APX4DEVKIT
ARM: mxs: Let GPMI driver be built by default
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add generic DT board support for the sh7377 SoC.
SCIF serial ports and timers are kept as regular
platform devices. Other on-chip and on-board devices
should be configured via the device tree.
At this point there is no interrupt controller support
in place but such code will be added over time when
proper IRQ domain support has been added to INTC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Add generic DT board support for the r8a7740 SoC.
SCIF serial ports and timers are kept as regular
platform devices. Other on-chip and on-board devices
should be configured via the device tree.
At this point there is no interrupt controller support
in place but such code will be added over time when
proper IRQ domain support has been added to INTC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Now, all sh7372 platforms are switched over to use pm-rmobile base PM domain,
and no one is using original sh7372_pm_domain APIs.
We can remove these, switching has been fully completed.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This patch switches ap4evb platform to use pm-rmobile base common API.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This patch switches mackerel platform to use pm-rmobile base common API.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This patch adds pm-rmobile common API base PM domain.
sh7372 CPU/platform will switch to using it from
original implementation
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Because USB Func is controlled by external IRQ mode,
it is possible to control USB under A3SP domain to reduce power.
This patch enables it.
Armadillo800eva board switchs USB Host/Func by SW1.6,
So, the device to adds into domain is selected on this patch.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
It is possible to control LCDC under A4LC domain to reduce power.
This patch enable it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
We can control renesas_usbhs driver as 2 way which are
autonomy mode and external IRQ trigger mode.
Autonomy mode is very easy settings for platform,
but it required USB power domain always ON,
since its connection/disconnection IRQ come from it.
If platform uses external IRQ trigger mode,
USB power domain can be OFF, since its
connection/disconnection IRQ come from external IRQ.
This patch enable external IRQ mode.
Now it is possible to add USB support on A4SP domain.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This patch adds basic A4LC pm domain support.
Now, below devices can be controled by PM
MERAM, LCDC, VOU, ICBS, SDENC-Link
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
MSEL1CR 7bit selects IRQ7 source pin which was
VBUS pin or A21/MSIOF0_RSYNC/MSIOF1_TSYNC pin.
But current pfc-r8a7740 MSEL1CR 7bit setting was wrong.
This patch fix it up
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This patch adds Renesas R-mobile series common PM domain APIs.
R-mobile CPU can use/switch this API
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Tegra's I2C2 controller can be routed to either the PTA or DDC pin group
on Seaboard. Define the pinctrl state nodes required to allow runtime
control of this routing. Instantiate a pinctrl-i2cmux I2C bus mux that
uses these pinctrl states.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:
E1120 motherboard
E1108 CPU board
E1116 PMU board
The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.
Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Original work by Magnus Damm, tested and tweaked by Simon Horman
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
On systems, using regulators to supply power to devices, if the REGULATOR
Kconfig option is disabled, regulator API stubs will be used, which often
suffices to bring a default configuration up. If REGULATOR is enabled but
respective regulator drivers are inactive, the real regulator API calls
will be used, which in the absence of drivers will fail to provide
services. This patch prevents such a problem on sh-mobile boards by
forcing REGULATOR_FIXED_VOLTAGE on if REGULATOR is selected.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Use the dmaengine based Tegra APB DMA driver for
apbio access in place of legacy Tegra APB DMA.
The new driver is selected if legacy driver is not
selected and new DMA driver is enabled through config
file.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: s/pr_err/pr_debug/ in tegra_apb_dma_init; this condition is
expected to fire repeatedly before the DMA driver is available]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The Tegra20 HW issue with accessing APBIO registers (such
as fuse registers) directly from the CPU concurrently with
APB DMA accesses has been fixed in Tegra30 and later chips.
Access these registers directly from the CPU on Tegra30
and later, and apply the workaround only for Tegra20.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Currently most ads7846 config definitions for OMAP3 series boards have
been moved to common-board-devices.c, and it is transparent for init.
And it's no very proper to do gpio_request based on get_pendown_state
since omap_ads7846_init knows everything about ads7846_config.
So it's more fit to request gpio according to the right gpio_pendown
and set debounce time conditionally. If we don't set proper debouce
time, there are flooded interrupt counters of ads7846 responding to
one time touch on screen, then the driver couldn't work very well.
This patch has been validated on 3530evm.
Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This was chosen by following the trace on the schematic from component U131
and U134 to the CPEN pin on the USB3320 device.
TWL4030.GPIO2-...->(T2_GPIO2_3V3)U131-..>nUSB2_EN-..>U134-..>EXP_nUSB2_1V8
which starts EHCI tranceiver USB3320.
This will set TWL4030.GPIO2 as output pin to drive EHCI tranceiver.
Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
EHCI PHY requires these regulators:
EVM Rev >=E --> VAUX2
EVM Rev < E --> VUSB1V5, VUSB1V8
Adding USB internal LDOs (vusb1v5 & vusb1v8) and VAUX2 to omap3evm
board file. Also removing vaux2_{1/2/3} supplies as they are not
used on omap3 evm.
But we need not to add vaux2 in twl4030_platform_data since it will
be added conditionally.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With omap_hwmod_get_main_clk() now available, this can be passed to
clk_get() to extract the fclk and thus avoid construction of fclk name.
Corrected the timer fck name mis-match between clock44xx_data.c and
omap_hwmod_44xx_data.c. For other platforms this is already taken care.
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit ac5b0ea3d (Merge tag 'omap-devel-f-for-3.6'...) had a merge
conflict that somehow got incorrecly resolved in a lossy way for
commit bed9d1bb (ARM: OMAP2+: hwmod: add omap_hwmod_get_main_clk() API).
Fix the issue by applying the missing pieces.
Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit
544496a (ARM: imx: move irq_domain_add_legacy call into avic driver)
introduced unconditional calls to irq_find_mapping and
irq_domain_add_legacy, but it's still possible to have a .config without
CONFIG_IRQ_DOMAIN=y resulting in
CC arch/arm/plat-mxc/avic.o
arch/arm/plat-mxc/avic.c: In function 'avic_handle_irq':
arch/arm/plat-mxc/avic.c:172: error: implicit declaration of function 'irq_find_mapping'
arch/arm/plat-mxc/avic.c: In function 'mxc_init_irq':
arch/arm/plat-mxc/avic.c:207: error: implicit declaration of function 'irq_domain_add_legacy'
arch/arm/plat-mxc/avic.c:208: error: 'irq_domain_simple_ops' undeclared (first use in this function)
arch/arm/plat-mxc/avic.c:208: error: (Each undeclared identifier is reported only once
arch/arm/plat-mxc/avic.c:208: error: for each function it appears in.)
arch/arm/plat-mxc/avic.c:208: warning: assignment makes pointer from integer without a cast
make[3]: *** [arch/arm/plat-mxc/avic.o] Error 1
make[2]: *** [arch/arm/plat-mxc/avic.o] Error 2
make[1]: *** [sub-make] Error 2
make: *** [all] Error 2
While selecting CONFIG_IRQ_DOMAIN would be enough, USE_OF is the future
and implies CONFIG_IRQ_DOMAIN. So select USE_OF for ARCH_MXC and drop
other explicit selects that are superflous now.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
With the common clock framework in place, it is useful to enable
CONFIG_COMMON_CLK_DEBUG option, in order to easily inspect the clock tree.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Kevin discovered that commit c8d82ff68f
("ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod
database") broke CORE idle on OMAP3. This prevents device low power
states.
The root cause is that the 32K sync timer IP block does not support
smart-idle mode[1], and so the hwmod code keeps the IP block in
no-idle mode while it is active. This in turn prevents the WKUP
clockdomain from transitioning to idle. There is a hardcoded sleep
dependency that prevents the CORE_L3 and CORE_CM clockdomains from
transitioning to idle when the WKUP clockdomain is active[2], so the
chip cannot enter any device low power states.
It turns out that there is no need to take the 32k sync timer out of
idle. The IP block itself probably does not have any native idle
handling at all, due to its simplicity. Furthermore, the PRCM will
never request target idle for this IP block while the kernel is
running, due to the sleep dependency that prevents the WKUP
clockdomain from idling while the CORE_L3 clockdomain is active. So
we can safely leave the 32k sync timer in target-force-idle mode, even
while we continue to access it.
This workaround is implemented by defining a new clockdomain flag,
CLKDM_ACTIVE_WITH_MPU, that indicates that the clockdomain is
guaranteed to be active whenever the MPU is inactive. If an IP
block's main functional clock exists inside this clockdomain, and the
IP block does not support smart-idle modes, then the hwmod code will
place the IP block into target force-idle mode even when enabled. The
WKUP clockdomains on OMAP3/4 are marked with this flag. (On OMAP2xxx,
no OCP header existed on the 32k sync timer.) Other clockdomains also
should be marked with this flag, but those changes are deferred until
a later merge window, to create a minimal fix.
Another theoretically clean fix for this problem would be to implement
PM runtime-based control for 32k sync timer accesses. These PM
runtime calls would need to located in a custom clocksource, since the
32k sync timer is currently used as an MMIO clocksource. But in
practice, there would be little benefit to doing so; and there would
be some cost, due to the addition of unnecessary lines of code and the
additional CPU overhead of the PM runtime and hwmod code - unnecessary
in this case.
Another possible fix would have been to modify the pm34xx.c code to
force the IP block idle before entering WFI. But this would not have
been an acceptable approach: we are trying to remove this type of
centralized IP block idle control from the PM code.
This patch is a collaboration between Kevin Hilman <khilman@ti.com>
and Paul Walmsley <paul@pwsan.com>.
Thanks to Vaibhav Hiremath <hvaibhav@ti.com> for providing comments on
an earlier version of this patch. Thanks to Tero Kristo
<t-kristo@ti.com> for identifying a bug in an earlier version of this
patch. Thanks to Benoît Cousson <b-cousson@ti.com> for identifying
some bugs in several versions of this patch and for implementation
comments.
References:
1. Table 16-96 "REG_32KSYNCNT_SYSCONFIG" of the OMAP34xx TRM Rev. ZU
(SWPU223U), available from:
http://www.ti.com/pdfs/wtbu/OMAP34x_ES3.1.x_PUBLIC_TRM_vzU.zip
2. Table 4-72 "Sleep Dependencies" of the OMAP34xx TRM Rev. ZU
(SWPU223U)
3. ibid.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Add CPUIdle support for the A3SM power domain on sh7372.
With this in place we can turn off more of the SoC during
run time and save power. Makes use of the recently introduced
sh7372 INTCA A3SM power domain wakeup support.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Convert the sh7372 A3SM power domain code to allow
waking up through INTCA and SYSC instead of only
relying on SYSC for wakeups. This allows us to
enter A3SM more or less regardless of the state
of the rest of the system.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Small fixes on multiple ARM platforms
* A build regression from a previous fix on dove and mv78xx0
* Two fixes for recently (3.5-rc1) changed mmp/pxa code
* multiple omap2+ bug fixes
* two trivial fixes for i.MX
* one v3.5 regression for mxs
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Small fixes on multiple ARM platforms
- A build regression from a previous fix on dove and mv78xx0
- Two fixes for recently (3.5-rc1) changed mmp/pxa code
- multiple omap2+ bug fixes
- two trivial fixes for i.MX
- one v3.5 regression for mxs"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: apx4devkit: fix FEC enabling PHY clock
ARM: OMAP2+: hwmod data: Fix wrong McBSP clock alias on OMAP4
ARM: OMAP4: hwmod data: temporarily comment out data for the usb_host_fs and aess IP blocks
ARM: Orion: Fix WDT compile for Dove and MV78xx0
ARM: mmp: remove mach/gpio-pxa.h
ARM: imx: assert SCC gate stays enabled
ARM: OMAP4: TWL6030: ensure sys_nirq1 is mux'd and wakeup enabled
ARM: OMAP2: Overo: init I2C before MMC to fix MMC suspend/resume failure
ARM: imx27_visstrim_m10: Do not include <asm/system.h>
ARM: pxa: hx4700: Fix basic suspend/resume
