Contains a fix to the generic power domain driver to properly report
errors propagated from BPMP.
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Merge tag 'tegra-for-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Pull "soc/tegra: Changes for v4.15-rc1" from Thierry Reding:
Contains a fix to the generic power domain driver to properly report
errors propagated from BPMP.
* tag 'tegra-for-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: bpmp: Check BPMP response return code
The Qualcomm remote file system protocol is used by certain remoteprocs,
in particular the modem, to read and write persistent storage in
platforms where only the application CPU has physical storage access.
The protocol is based on a set of QMI-encoded control-messages and a
shared memory buffer for exchaning the data. This driver implements the
latter, providing the user space service access to the carved out chunk
of memory.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the DPAA QBMan support for ARM SoCs and a few minor fixes/updates.
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Merge tag 'soc-fsl-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers
Pull "FSL/NXP ARM SoC drivers updates for 4.14" from Li Yang:
This adds the DPAA QBMan support for ARM SoCs and a few minor fixes/updates.
This pull request includes updates to the QMAN/BMAN drivers to make
them work on the arm/arm64 architectures in addition to the power
architecture and a few minor update/bug-fix to the soc/fsl drivers.
We got the Reviewed-by from Catalin on the ARM architecture side.
DPAA (Data Path Acceleration Architecture) is a set of hardware
components used on some FSL/NXP QorIQ Networking SoCs, it provides the
infrastructure to support simplified sharing of networking interfaces
and accelerators by multiple CPU cores, and the accelerators
themselves. The QMan(Queue Manager) and BMan(Buffer Manager) are
infrastructural components within the DPAA framework. They are used to
manage queues and buffers for various I/O interfaces, hardware
accelerators.
* tag 'soc-fsl-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc/fsl/qbman: Enable FSL_LAYERSCAPE config on ARM
soc/fsl/qbman: Add missing headers on ARM
soc/fsl/qbman: different register offsets on ARM
soc/fsl/qbman: add QMAN_REV32
soc/fsl/qbman: Rework portal mapping calls for ARM/PPC
soc/fsl/qbman: Fix ARM32 typo
soc/fsl/qbman: Drop L1_CACHE_BYTES compile time check
soc/fsl/qbman: Drop set/clear_bits usage
dt-bindings: soc/fsl: Update reserved memory binding for QBMan
soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations
soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocations
soc/fsl/qbman: Add common routine for QBMan private allocations
soc/fsl/guts: Add compatible string for LS1088
soc/fsl/qman: Sleep instead of stuck hacking jiffies
* Add SCM firmware APIs for download mode and secure IO service
* Add SMEM support for cached entries
* Add SMEM support for global partition, dynamic item limit, and more hosts
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Merge tag 'qcom-drivers-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Pull "Qualcomm ARM Based Driver Updates for v4.15" from Andy Gross:
* Add SCM firmware APIs for download mode and secure IO service
* Add SMEM support for cached entries
* Add SMEM support for global partition, dynamic item limit, and more hosts
* tag 'qcom-drivers-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Expose download-mode control
firmware: qcom: scm: Expose secure IO service
soc: qcom: smem: Increase the number of hosts
soc: qcom: smem: Support dynamic item limit
soc: qcom: smem: Support global partition
soc: qcom: smem: Read version from the smem header
soc: qcom: smem: Use le32_to_cpu for comparison
soc: qcom: smem: Support getting cached entries
soc: qcom: smem: Rename "uncached" accessors
Remove of Exynos4212 related dead code (no more support for this SoC).
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Merge tag 'samsung-drivers-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Pull "Samsung soc drivers changes for v4.15" from Krzysztof Kozłowski:
Remove of Exynos4212 related dead code (no more support for this SoC).
* tag 'samsung-drivers-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: Remove Exynos4212 related dead code
Add basic support for R-Car V3M (R8A77970) SoC.
Sergei Shtylyov says:
* Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
driver
* Add support for identifying the R-Car V3M (R8A77970) SoC
* Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this
driver is needed for the clock driver to work
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Merge tag 'renesas-drivers-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Pull "Renesas ARM Based SoC Drivers Updates for v4.15" from Simon Horman:
Add basic support for R-Car V3M (R8A77970) SoC.
Sergei Shtylyov says:
* Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
driver
* Add support for identifying the R-Car V3M (R8A77970) SoC
* Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this
driver is needed for the clock driver to work
* tag 'renesas-drivers-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: add R8A77970 support
soc: renesas: identify R-Car V3M
soc: renesas: rcar-rst: add R8A77970 support
Add checks for the return code in BPMP response messages.
Signed-off-by: Timo Alho <talho@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Increase the maximum number of hosts in a system to 10.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In V12 SMEM, SBL writes SMEM parameter information after the TOC. Use
the SBL provided item count as the max item number.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
SMEM V12 creates a global partition to allocate global smem items from
instead of a global heap. The global partition has the same structure as
a private partition.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The SMEM header structure includes the version information. Read the
version directly from the header instead of getting an item from the
global heap.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Endianness can vary in the system, add le32_to_cpu when comparing
partition sizes from smem.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
On msm8996 cached SMEM items are used for storing the GLINK FIFOs, so
for items not found in the uncached list we need to also search the
cased list for these items.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In preparation for adding accessors for "cached" entries rename the
"uncached" accessors. Also rename "first" cached entry to "last", as
the cached list grows backwards.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Support for Exynos4212 SoCs has been removed by commit bca9085e0a ("ARM:
dts: exynos: remove Exynos4212 support (dead code)"), so there is no need
to keep remaining dead code related to this SoC version.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit adds support for the Broadcom STB S2/S3/S5 suspend
states on MIPS based SoCs.
This requires quite a lot of code in order to deal with the
different HW blocks that need to be quiesced during suspend:
- DDR PHY
- DDR memory controller and arbiter
- control processor
The final steps of the suspend execute in cache and there is is a little
bit of assembly code in order to shut down the DDR PHY PLL and then go
into a wait loop until a wake-up even occurs. Conversely the resume part
involves waiting for the DDR PHY PLL to come back up and resume
executions where we left.
Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit adds support for the Broadcom STB S2/S3/S5 suspend states on
ARM based SoCs.
This requires quite a lot of code in order to deal with the different HW
blocks that need to be quiesced during suspend:
- DDR PHY SHIM
- DDR memory controller and sequencer
- control processor
The final steps of the suspend execute in an on-chip SRAM and there is a
little bit of assembly code in order to shut down the DDR PHY PLL and
then go into a wfi loop until a wake-up even occurs. Conversely the
resume part involves waiting for the DDR PHY PLL to come back up and
resume executions where we left.
For S3, because of our memory hashing (actual hashing code not included
for simplicity, and is bypassed) we need to relocate the writable
variables (stack) into SRAM shortly before suspending in order to leave
the DRAM untouched and create a reliable hash of its contents.
This code has been contributed by Brian Norris initially and has been
incrementally fixed and updated to support new chips by a lot of people.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Signed-off-by: Gareth Powell <gpowell@broadcom.com>
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
[Stuart: changed to use ARCH_LAYERSCAPE]
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Unlike PPC builds, ARM builds need following headers
explicitly:
+#include <linux/io.h> for ioread32be()
+#include <linux/delay.h> for udelay()
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Add revision 3.2 of the QBMan block. This is the version
for LS1043A and LS1046A SoCs.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Rework portal mapping for PPC and ARM. The PPC devices require a
cacheable coherent mapping while ARM will work with a non-cachable/write
combine mapping. This also eliminates the need for manual cache
flushes on ARM. This also fixes the code so sparse checking is clean.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The Kconfig symbol for 32bit ARM is 'ARM', not 'ARM32'.
Signed-off-by: Valentin Rothberg <valentinrothberg@gmail.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Not relevant and arch dependent. Overkill for PPC.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Replace PPC specific set/clear_bits API with standard
bit twiddling so driver is portalable outside PPC.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Use the shared-memory-pool mechanism for frame queue descriptor and
packed frame descriptor record area allocations.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Use the shared-memory-pool mechanism for free buffer proxy record
area allocation.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The QBMan device uses several memory regions to manage frame
queues and buffers. Add a common routine for extracting and
initializing these reserved memory areas.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Adding compatible string "ls1088a-dcfg" so that
guts driver can be init for ls1088
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Use msleep() instead of stucking with long delay will be more efficient.
Signed-off-by: Karim Eshapa <karim.eshapa@gmail.com>
Acked-by: Scott Wood <oss@buserror.net>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
driver.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for identifying the R-Car V3M (R8A77970) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this driver
is needed for the clock driver to work.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull MIPS updates from Ralf Baechle:
"This is the main pull request for 4.14 for MIPS; below a summary of
the non-merge commits:
CM:
- Rename mips_cm_base to mips_gcr_base
- Specify register size when generating accessors
- Use BIT/GENMASK for register fields, order & drop shifts
- Add cluster & block args to mips_cm_lock_other()
CPC:
- Use common CPS accessor generation macros
- Use BIT/GENMASK for register fields, order & drop shifts
- Introduce register modify (set/clear/change) accessors
- Use change_*, set_* & clear_* where appropriate
- Add CM/CPC 3.5 register definitions
- Use GlobalNumber macros rather than magic numbers
- Have asm/mips-cps.h include CM & CPC headers
- Cluster support for topology functions
- Detect CPUs in secondary clusters
CPS:
- Read GIC_VL_IDENT directly, not via irqchip driver
DMA:
- Consolidate coherent and non-coherent dma_alloc code
- Don't use dma_cache_sync to implement fd_cacheflush
FPU emulation / FP assist code:
- Another series of 14 commits fixing corner cases such as NaN
propgagation and other special input values.
- Zero bits 32-63 of the result for a CLASS.D instruction.
- Enhanced statics via debugfs
- Do not use bools for arithmetic. GCC 7.1 moans about this.
- Correct user fault_addr type
Generic MIPS:
- Enhancement of stack backtraces
- Cleanup from non-existing options
- Handle non word sized instructions when examining frame
- Fix detection and decoding of ADDIUSP instruction
- Fix decoding of SWSP16 instruction
- Refactor handling of stack pointer in get_frame_info
- Remove unreachable code from force_fcr31_sig()
- Convert to using %pOF instead of full_name
- Remove the R6000 support.
- Move FP code from *_switch.S to *_fpu.S
- Remove unused ST_OFF from r2300_switch.S
- Allow platform to specify multiple its.S files
- Add #includes to various files to ensure code builds reliable and
without warning..
- Remove __invalidate_kernel_vmap_range
- Remove plat_timer_setup
- Declare various variables & functions static
- Abstract CPU core & VP(E) ID access through accessor functions
- Store core & VP IDs in GlobalNumber-style variable
- Unify checks for sibling CPUs
- Add CPU cluster number accessors
- Prevent direct use of generic_defconfig
- Make CONFIG_MIPS_MT_SMP default y
- Add __ioread64_copy
- Remove unnecessary inclusions of linux/irqchip/mips-gic.h
GIC:
- Introduce asm/mips-gic.h with accessor functions
- Use new GIC accessor functions in mips-gic-timer
- Remove counter access functions from irq-mips-gic.c
- Remove gic_read_local_vp_id() from irq-mips-gic.c
- Simplify shared interrupt pending/mask reads in irq-mips-gic.c
- Simplify gic_local_irq_domain_map() in irq-mips-gic.c
- Drop gic_(re)set_mask() functions in irq-mips-gic.c
- Remove gic_set_polarity(), gic_set_trigger(), gic_set_dual_edge(),
gic_map_to_pin() and gic_map_to_vpe() from irq-mips-gic.c.
- Convert remaining shared reg access, local int mask access and
remaining local reg access to new accessors
- Move GIC_LOCAL_INT_* to asm/mips-gic.h
- Remove GIC_CPU_INT* macros from irq-mips-gic.c
- Move various definitions to the driver
- Remove gic_get_usm_range()
- Remove __gic_irq_dispatch() forward declaration
- Remove gic_init()
- Use mips_gic_present() in place of gic_present and remove
gic_present
- Move gic_get_c0_*_int() to asm/mips-gic.h
- Remove linux/irqchip/mips-gic.h
- Inline __gic_init()
- Inline gic_basic_init()
- Make pcpu_masks a per-cpu variable
- Use pcpu_masks to avoid reading GIC_SH_MASK*
- Clean up mti, reserved-cpu-vectors handling
- Use cpumask_first_and() in gic_set_affinity()
- Let the core set struct irq_common_data affinity
microMIPS:
- Fix microMIPS stack unwinding on big endian systems
MIPS-GIC:
- SYNC after enabling GIC region
NUMA:
- Remove the unused parent_node() macro
R6:
- Constify r2_decoder_tables
- Add accessor & bit definitions for GlobalNumber
SMP:
- Constify smp ops
- Allow boot_secondary SMP op to return errors
VDSO:
- Drop gic_get_usm_range() usage
- Avoid use of linux/irqchip/mips-gic.h
Platform changes:
Alchemy:
- Add devboard machine type to cpuinfo
- update cpu feature overrides
- Threaded carddetect irqs for devboards
AR7:
- allow NULL clock for clk_get_rate
BCM63xx:
- Fix ENETDMA_6345_MAXBURST_REG offset
- Allow NULL clock for clk_get_rate
CI20:
- Enable GPIO and RTC drivers in defconfig
- Add ethernet and fixed-regulator nodes to DTS
Generic platform:
- Move Boston and NI 169445 FIT image source to their own files
- Include asm/bootinfo.h for plat_fdt_relocated()
- Include asm/time.h for get_c0_*_int()
- Include asm/bootinfo.h for plat_fdt_relocated()
- Include asm/time.h for get_c0_*_int()
- Allow filtering enabled boards by requirements
- Don't explicitly disable CONFIG_USB_SUPPORT
- Bump default NR_CPUS to 16
JZ4700:
- Probe the jz4740-rtc driver from devicetree
Lantiq:
- Drop check of boot select from the spi-falcon driver.
- Drop check of boot select from the lantiq-flash MTD driver.
- Access boot cause register in the watchdog driver through regmap
- Add device tree binding documentation for the watchdog driver
- Add docs for the RCU DT bindings.
- Convert the fpi bus driver to a platform_driver
- Remove ltq_reset_cause() and ltq_boot_select(
- Switch to a proper reset driver
- Switch to a new drivers/soc GPHY driver
- Add an USB PHY driver for the Lantiq SoCs using the RCU module
- Use of_platform_default_populate instead of __dt_register_buses
- Enable MFD_SYSCON to be able to use it for the RCU MFD
- Replace ltq_boot_select() with dummy implementation.
Loongson 2F:
- Allow NULL clock for clk_get_rate
Malta:
- Use new GIC accessor functions
NI 169445:
- Add support for NI 169445 board.
- Only include in 32r2el kernels
Octeon:
- Add support for watchdog of 78XX SOCs.
- Add support for watchdog of CN68XX SOCs.
- Expose support for mips32r1, mips32r2 and mips64r1
- Enable more drivers in config file
- Add support for accessing the boot vector.
- Remove old boot vector code from watchdog driver
- Define watchdog registers for 70xx, 73xx, 78xx, F75xx.
- Make CSR functions node aware.
- Allow access to CIU3 IRQ domains.
- Misc cleanups in the watchdog driver
Omega2+:
- New board, add support and defconfig
Pistachio:
- Enable Root FS on NFS in defconfig
Ralink:
- Add Mediatek MT7628A SoC
- Allow NULL clock for clk_get_rate
- Explicitly request exclusive reset control in the pci-mt7620 PCI driver.
SEAD3:
- Only include in 32 bit kernels by default
VoCore:
- Add VoCore as a vendor t0 dt-bindings
- Add defconfig file"
* '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (167 commits)
MIPS: Refactor handling of stack pointer in get_frame_info
MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems
MIPS: microMIPS: Fix decoding of swsp16 instruction
MIPS: microMIPS: Fix decoding of addiusp instruction
MIPS: microMIPS: Fix detection of addiusp instruction
MIPS: Handle non word sized instructions when examining frame
MIPS: ralink: allow NULL clock for clk_get_rate
MIPS: Loongson 2F: allow NULL clock for clk_get_rate
MIPS: BCM63XX: allow NULL clock for clk_get_rate
MIPS: AR7: allow NULL clock for clk_get_rate
MIPS: BCM63XX: fix ENETDMA_6345_MAXBURST_REG offset
mips: Save all registers when saving the frame
MIPS: Add DWARF unwinding to assembly
MIPS: Make SAVE_SOME more standard
MIPS: Fix issues in backtraces
MIPS: jz4780: DTS: Probe the jz4740-rtc driver from devicetree
MIPS: Ci20: Enable RTC driver
watchdog: octeon-wdt: Add support for 78XX SOCs.
watchdog: octeon-wdt: Add support for cn68XX SOCs.
watchdog: octeon-wdt: File cleaning.
...
This branch contains platform-related driver updates for ARM and ARM64.
Among them:
- Reset driver updates:
+ New API for dealing with arrays of resets
+ Make unimplemented {de,}assert return success on shared resets
+ MSDKv1 driver
+ Removal of obsolete Gemini reset driver
+ Misc updates for sunxi and Uniphier
- SoC drivers:
+ Platform SoC driver registration on Tegra
+ Shuffle of Qualcomm drivers into a submenu
+ Allwinner A64 support for SRAM
+ Renesas R-Car R3 support
+ Power domains for Rockchip RK3366
- Misc updates and smaller fixes for TEE and memory driver subsystems
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"This branch contains platform-related driver updates for ARM and ARM64.
Among them:
- Reset driver updates:
+ New API for dealing with arrays of resets
+ Make unimplemented {de,}assert return success on shared resets
+ MSDKv1 driver
+ Removal of obsolete Gemini reset driver
+ Misc updates for sunxi and Uniphier
- SoC drivers:
+ Platform SoC driver registration on Tegra
+ Shuffle of Qualcomm drivers into a submenu
+ Allwinner A64 support for SRAM
+ Renesas R-Car R3 support
+ Power domains for Rockchip RK3366
- Misc updates and smaller fixes for TEE and memory driver
subsystems"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
firmware: arm_scpi: fix endianness of dev_id in struct dev_pstate_set
soc/tegra: fuse: Add missing semi-colon
soc/tegra: Restrict SoC device registration to Tegra
drivers: soc: sunxi: add support for A64 and its SRAM C
drivers: soc: sunxi: add support for remapping func value to reg value
drivers: soc: sunxi: fix error processing on base address when claiming
dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C
bus: sunxi-rsb: Enable by default for ARM64
soc/tegra: Register SoC device
firmware: tegra: set drvdata earlier
memory: Convert to using %pOF instead of full_name
soc: Convert to using %pOF instead of full_name
bus: Convert to using %pOF instead of full_name
firmware: Convert to using %pOF instead of full_name
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC
reset: uniphier: add analog amplifiers reset control
reset: uniphier: add video input subsystem reset control
...
This branch contains platform updates for 32- and 64-bit ARM,
including defconfig updates to enable new options, drivers and
platforms. There are also a few fixes and cleanups for some existing vendors.
Some of the things worth highlighting here are:
- Enabling new crypt drivers on arm64 defconfig
- QCOM IPQ8074 clocks and pinctrl drivers on arm64 defconfig
- Debug support enabled for Renesas r8a7743
- Various config updates for Renesas platforms (sound, USB, other drivers)
- Platform support (including SMP) for TI dra762
- OMAP cleanups: Move to use generic 8250 debug_ll, removal of stale DMA code
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Merge tag 'armsoc-platforms' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM/arm64 SoC platform updates from Olof Johansson: "This branch
contains platform updates for 32- and 64-bit ARM, including defconfig
updates to enable new options, drivers and platforms. There are also a
few fixes and cleanups for some existing vendors.
Some of the things worth highlighting here are:
- Enabling new crypt drivers on arm64 defconfig
- QCOM IPQ8074 clocks and pinctrl drivers on arm64 defconfig
- Debug support enabled for Renesas r8a7743
- Various config updates for Renesas platforms (sound, USB, other
drivers)
- Platform support (including SMP) for TI dra762
- OMAP cleanups: Move to use generic 8250 debug_ll, removal of stale
DMA code"
* tag 'armsoc-platforms' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits)
ARM: multi_v7_defconfig: make eSDHC driver built-in
arm64: defconfig: enable rockchip graphics
MAINTAINERS: Update Cavium ThunderX2 entry
ARM: config: aspeed: Add I2C, VUART, LPC Snoop
ARM: configs: aspeed: Update Aspeed G4 with VMSPLIT_2G
ARM: s3c24xx: Fix NAND ECC mode for mini2440 board
ARM: davinci_all_defconfig: enable tinydrm and ST7586
arm64: defconfig: Enable QCOM IPQ8074 clock and pinctrl
ARM: defconfig: tegra: Enable ChipIdea UDC driver
ARM: configs: Add Tegra I2S interfaces to multi_v7_defconfig
ARM: tegra: Add Tegra I2S interfaces to defconfig
ARM: tegra: Update default configuration for v4.13-rc1
MAINTAINERS: update ARM/ZTE entry
soc: versatile: remove unnecessary static in realview_soc_probe()
ARM: Convert to using %pOF instead of full_name
ARM: hisi: Fix typo in comment
ARM: multi_v7_defconfig: add CONFIG_BRCMSTB_THERMAL
arm64: defconfig: add CONFIG_BRCMSTB_THERMAL
arm64: defconfig: add recently added crypto drivers as modules
arm64: defconfig: enable CONFIG_UNIPHIER_WATCHDOG
...
This adds and improves remoteproc support for TI DA8xx/OMAP-L13x DSP, TI
Keystone 66AK2G DSP and iMX6SX/7D Cortex M4 coprocessors. It introduces the
Qualcomm restart notifier and a few fixes.
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Merge tag 'rproc-v4.14' of git://github.com/andersson/remoteproc
Pull remoteproc updates from Bjorn Andersson:
"This adds and improves remoteproc support for TI DA8xx/OMAP-L13x DSP,
TI Keystone 66AK2G DSP and iMX6SX/7D Cortex M4 coprocessors. It
introduces the Qualcomm restart notifier and a few fixes"
* tag 'rproc-v4.14' of git://github.com/andersson/remoteproc:
remoteproc: Introduce rproc handle accessor for children
remoteproc: qcom: Make ssr_notifiers local
remoteproc: Stop subdevices in reverse order
remoteproc: imx_rproc: add a NXP/Freescale imx_rproc driver
remoteproc: dt: Provide bindings for iMX6SX/7D Remote Processor Controller driver
remoteproc: qcom: Use PTR_ERR_OR_ZERO
remoteproc: st: explicitly request exclusive reset control
remoteproc: qcom: explicitly request exclusive reset control
remoteproc/keystone: explicitly request exclusive reset control
remoteproc/keystone: Add support for Keystone 66AK2G SOCs
remoteproc/davinci: Add device tree support for OMAP-L138 DSP
dt-bindings: remoteproc: Add bindings for Davinci DSP processors
remoteproc/davinci: Add support to parse internal memories
remoteproc/davinci: Switch to platform_get_resource_byname()
remoteproc: make device_type const
soc: qcom: GLINK SSR notifier
remoteproc: qcom: Add support for SSR notifications
remoteproc: Merge __rproc_boot() with rproc_boot()
Compared to the old xrx200_phy_fw driver the new version has multiple
enhancements. The name of the firmware files does not have to be added
to all .dts files anymore - one now configures the GPHY mode (FE or GE)
instead. Each GPHY can now also boot separate firmware (thus mixing of
GE and FE GPHYs is now possible).
The new implementation is based on the RCU syscon-mfd and uses the
reeset_controller framework instead of raw RCU register reads/writes.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: john@phrozen.org
Cc: p.zabel@pengutronix.de
Cc: kishon@ti.com
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17128/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Conversion to kbasename from Rob Herring.
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Merge tag 'samsung-drivers-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Pull "Samsung soc drivers changes for v4.14" from Krzysztof Kozłowski:
Conversion to kbasename from Rob Herring.
* tag 'samsung-drivers-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: Use kbasename instead of open coding
Commit 8a46828e623c ("soc/tegra: Register SoC device") added a new
initcall, but forgot to terminate the line with a semi-colon. Some
recent versions of GCC seem to report this as an error.
Fixes: 8a46828e623c ("soc/tegra: Register SoC device")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit 8a46828e623c ("soc/tegra: Register SoC device") added an initcall
to register the SoC device on Tegra. However, that code is unrestricted
and will run on all platforms, causing unwanted warnings.
Fix this by first checking that we're running on hardware that supports
the fuses block that we use to provide SoC information.
Fixes: 8a46828e623c ("soc/tegra: Register SoC device")
Reported-by: Sudeep Holla <sudeep.holla@arm.com>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Usual driver changes:
- SUNXI_RSB bus driver enabled by default for ARM64
- Support for SRAM controller and SRAM C block on the A64 added
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Merge tag 'sunxi-drivers-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers
Pull "Allwinner driver changes for 4.14" from Chen-Yu Tsai:
Usual driver changes:
- SUNXI_RSB bus driver enabled by default for ARM64
- Support for SRAM controller and SRAM C block on the A64 added
* tag 'sunxi-drivers-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
drivers: soc: sunxi: add support for A64 and its SRAM C
drivers: soc: sunxi: add support for remapping func value to reg value
drivers: soc: sunxi: fix error processing on base address when claiming
dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C
bus: sunxi-rsb: Enable by default for ARM64
knav_pool_create is an exported function. In the event of a call
before knav_queue_probe, we encounter a NULL pointer dereference
in the following line. Hence return -EPROBE_DEFER to the caller till
the kdev pointer is non-NULL.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Contains a fix for unbalanced reference counting of device tree nodes in
the PMC-based generic power domains code.
A second change moves the SoC device registration code from its old
location in arch/arm/mach-tegra to drivers/soc/tegra so that it can be
shared between 32-bit and 64-bit ARM Tegra SoCs.
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Merge tag 'tegra-for-4.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Pull "soc/tegra: Changes for v4.14-rc1" from Thierry Reding:
Contains a fix for unbalanced reference counting of device tree nodes in
the PMC-based generic power domains code.
A second change moves the SoC device registration code from its old
location in arch/arm/mach-tegra to drivers/soc/tegra so that it can be
shared between 32-bit and 64-bit ARM Tegra SoCs.
* tag 'tegra-for-4.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: Register SoC device
soc/tegra: Fix bad of_node_put() in powergate init
Commit b6a1d093f9 ("PM / Domains: Extend generic power domain
debugfs") now creates a debugfs directory for each genpd based on the
name of the genpd. Currently no name is given to the genpd created by
ti_sci_pm_domains driver so because of this we see a NULL pointer
dereferences when it is accessed on boot when the debugfs entry creation
is attempted.
Give the genpd a name before registering it to avoid this.
Fixes: 52835d59fc ("soc: ti: Add ti_sci_pm_domains driver")
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allwinner A64's display engine claims the SRAM C section to work.
Add support for the A64 SRAM controller and the SRAM C section of it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
On some Allwinner SoCs, sometimes the value needed to write into the
register to claim SRAM is not equal to the value specified in the
device tree.
The device tree binding defines 0 as "mapped to CPU" and 1 as "mapped
to X device". This matches the value written to the configuration
register for the SRAM blocks currently supported. However, the not yet
supported VE SRAM block is claimed for the device by writing 0x7fffffff,
which is vastly different from the other blocks. On the A64, SRAM C is
claimed by the device by writing a 0, which is the opposite of the
current design.
Add a value remapping in sunxi_sram_func structure, and let the
sunxi_sram_of_parse function set the remapped register value.
This allows us to keep the convention currently used in the device tree
binding.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[wens@csie.org: Clarified commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
