Commit graph

7 commits

Author SHA1 Message Date
Max Filippov 99d5040ebc xtensa: keep a3 and excsave1 on entry to exception handlers
Based on the SMP patch by Joe Taylor and subsequent fixes.
Preserve exception table pointer (normally stored in excsave1 SR) as it
cannot be easily restored in SMP environment.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06 09:47:41 -07:00
Marc Gauthier 2d1c645cc5 xtensa: dispatch medium-priority interrupts
Add support for dispatching medium-priority interrupts, that is,
interrupts of priority levels 2 to EXCM_LEVEL. IRQ handling may be
preempted by higher priority IRQ.

Signed-off-by: Marc Gauthier <marc@tensilica.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23 19:12:52 -08:00
Chris Zankel c4c4594b00 xtensa: clean up files to make them code-style compliant
Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Max Filippov 00273125c3 xtensa: add s32c1i sanity check
Add a brief sanity test of S32C1I functionality.  This instruction
is needed by the kernel and userland as part of the base ABI
(including GCC atomic builtins, certain threading packages, future
atomic support in the C++ standard, etc).  However, correct operation
of this instruction requires some cooperation by hardware external to
the processor (such as bus bridge, bus fabric, or memory controller).
Minimally exercising this mechanism and reporting explicit status
early in the boot process is helpful to chip vendors using the Linux
kernel as a benchmark of correctness of hardware.

As it turns out, S32C1I is not exercised by the kernel and by uClibc
based userland as of early June 2008.  This is expected to change
soon as both incorporate more recent open source developments.

Signed-off-by: Marc Gauthier <marc@tensilica.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:22 -08:00
Max Filippov bc5378fcba xtensa: reorganize SR referencing
- reference SRs by names where possible, not by numbers;
- get rid of __stringify around SR names where possible;
- remove unneeded SR names from asm/regs.h;
- add SREG_ prefix to remaining SR names;

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-15 21:48:08 -07:00
Max Filippov eb9a63a1e5 xtensa: rename MISC SR definition to avoid name clashes
There are other special register that cause build warnings and may as
well need renaming as well.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-03 15:12:43 -07:00
Chris Zankel 367b8112fe xtensa: move headers files to arch/xtensa/include
Move all header files for xtensa to arch/xtensa/include and platform and
variant header files to the appropriate arch/xtensa/platforms/ and
arch/xtensa/variants/ directories.

Moving the files gets also rid of all uses of symlinks in the Makefile.

This has been completed already for the majority of the architectures
and xtensa is one out of six missing.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Chris Zankel <chris@zankel.net>
2008-11-06 10:25:09 -08:00
Renamed from include/asm-xtensa/regs.h (Browse further)