Commit graph

415512 commits

Author SHA1 Message Date
Ville Syrjälä afd58e79ff drm/i915: Clarify WaDisable4x2SubspanOptimization situation for VLV
WaDisable4x2SubspanOptimization isn't listed for VLV in the workaround
database, but BSpec says that the relevant bit must be set. Add a
comment to remind people of this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29 20:16:08 +01:00
Ville Syrjälä 46680e0a43 drm/i915: VLV wants WaVSThreadDispatchOverride too
Call gen7_setup_fixed_func_scheduler() on VLV as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29 20:15:58 +01:00
Ville Syrjälä e36ea7ff40 drm/i915: Don't apply WaVSThreadDispatchOverride on HSW
BSpec states that the thread override values set by
gen7_setup_fixed_func_scheduler() are invalid for HSW. So let's not
muck around with them.

Since gen7_setup_fixed_func_scheduler() now has two totally independent
parts, one for IVB and one for HSW, move the HSW part directly into
haswell_init_clock_gating().

Note tht there's another workaround by the name of
WaHSWVSRefCountFullforceMissDisable which basically claims that later
steppings don't need the fix, but since WaVSRefCountFullforceMissDisable
is listed to be needed for all steppings play it safe and keep applying
the workaround.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29 20:15:48 +01:00
Ville Syrjälä 3aad9059a4 drm/i915: gen7_setup_fixed_func_scheduler() actually implements WaVSThreadDispatchOverride
The current comments indicate that this function implements
WaVSRefCountFullforceMissDisable, which is only true for HSW.
The original purpose of the function is to implement
WaVSThreadDispatchOverride (and a bit more). Fix up the comments
to match reality.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29 20:15:36 +01:00
Ville Syrjälä a7f593c71b drm/i915: Drop WaDisableTDLUnitClockGating:vlv
WaDisableTDLUnitClockGating is only relevant for early steppings of VLV.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29 20:15:24 +01:00
Ville Syrjälä e95564051c drm/i915: Drop WaDisableVDSUtnitClockGating:vlv
WaDisableVDSUtnitClockGating was only relevant for early steepings of
VLV.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29 20:15:07 +01:00
Dave Airlie 45ab1e0780 drm/tegra: Changes for v3.14-rc1 (update)
These patches fix some issues caused by the DRM panel support from the
 previous pull request and add two more panels (for the Toshiba AC100 as
 well as the Seaboard and Ventana).
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABAgAGBQJS4TK6AAoJEN0jrNd/PrOhwXoP/i09xa9CKOnpy8Ewdmgi5gBt
 vnjzqjwmHzZRpNeWw2xvcqzv5kKgXkpPdMhNUjErlJTUC1S6uCf/Uj+ExppYYysW
 7uxNjPQQc6jgX+0342MabKITeZyTk9iEWPqTDtHDP5O2vXi4XSaQTMm9HpWGe1qZ
 1CTb0yJc1epXGJPutlqhJSZgKwzrs6Pm2Q/nsTdxpGPAoTQj9J0NebDaZwJmmFGi
 qNyfI4DVBp1sj8AgtUkQQn9x5oLDpdvHKLPHsAWgHnNTKqRxY8C0EL+S2TYGa812
 sx8jvZgjvBoPuwaOr4hcOx91OFdfOoKVap9D/corU+UjstF9lTd+PvAHzZMO5qte
 yQhWmYFn1gGr/I9b9K/mAB98s83W7lMmSs/7HtiawvLtogZ/t8xvSp94R7X8SGd1
 wYcw3NqzgDxrcpJjDOsLIw1Pa4PxXoChtV0SfiaEoVlGn5WSONS/8cKeNwbO6e9D
 gKkd/zvCMsYqHt7p8zDizcQKi4W+8zYiZySOfLohZzhf0qaoQnnD5yirfiIpljqA
 Ql40F4XP3OF3CliikcSwFhvrTUCLb08Ol0MV6FX1H1iMae0dgiFqtz7AihFTbKHZ
 PQeskMgEemxhIqKEsH0JcpV3+YxLRlWy/3I+OO7QczsL0xKD30FQ9Xhsu9EFx8gu
 jXVvMDldeefaVBuTdqCb
 =NfNj
 -----END PGP SIGNATURE-----

Merge tag 'drm/for-3.14-rc1-20140123' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.14-rc1 (update)

These patches fix some issues caused by the DRM panel support from the
previous pull request and add two more panels (for the Toshiba AC100 as
well as the Seaboard and Ventana).

* tag 'drm/for-3.14-rc1-20140123' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: Obtain head number from DT
  drm/panel: update EDID BLOB in panel_simple_get_modes()
  gpu: host1x: Remove unnecessary include
  drm/tegra: Use proper data type
  drm/tegra: Clarify how panel modes override others
  drm/tegra: Fix possible CRTC mask for RGB outputs
  drm/i915: Use drm_encoder_crtc_ok()
  drm: Move drm_encoder_crtc_ok() to core
  drm: provide a helper for the encoder possible_crtcs mask
  drm/tegra: Don't check resource with devm_ioremap_resource()
  drm/panel: Add support for Chunghwa CLAA101WA01A panel
  drm/panel: Add support for Samsung LTN101NT05 panel
2014-01-29 12:03:56 +10:00
Dave Airlie f4b4718b61 drm: ast,cirrus,mgag200: use drm_can_sleep
these 3 were checking in_interrupt but we have situations where
calling vunmap under this could cause a BUG to be hit in
smp_call_function_many. Use the drm_can_sleep macro instead,
which should stop this path from been taken in this case.

Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-01-29 10:51:52 +10:00
Dave Airlie 821b4db3b6 Merge tag 'drm-intel-fixes-2014-01-28' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
Pile of -fixes all over the place. Lot's of cc: stable.

Only big thing is that we've dropped the preliminary hw support tag for
bdw - it seems to work. Which also means that I'll shovel a few more bdw
patches through -fixes, there's 5 w/a patches from Ken already on
intel-gfx.

* tag 'drm-intel-fixes-2014-01-28' of git://people.freedesktop.org/~danvet/drm-intel:
  drm/i915: Fix the offset issue for the stolen GEM objects
  drm/i915: Decouple GPU error reporting from ring initialisation
  i915: remove pm_qos request on error
  Revert "drm/i915: Mask reserved bits in display/sprite address registers"
  drm/i915: VLV2 - Fix hotplug detect bits
  drm/i915: Allow reading the TIMESTAMP register on Gen8.
  drm/i915: Repeat evictions whilst pageflip completions are outstanding
  drm/i915: Wait for completion of pending flips when starved of fences
  drm/i915: don't disable DP port after a failed link training
  drm/i915: don't disable the DP port if the link is lost
  drm/i915: Eliminate lots of WARNs when there's no backlight present
  drm/i915: g4x/vlv: fix dp aux interrupt mask
  drm/i915/ppgtt: Defer request freeing on reset
  i915: send D1 opregion notification
  drm/i915/bdw: remove preliminary_hw_support flag from BDW
  drm/i915: Tune down reset_stat output from ERROR to debug
  drm/i915: Make semaphore modparam RO
  drm/i915: Fix disabled semaphores
  drm/i915: Clarify relocation errnos
  drm/i915: Spelling s/auxilliary/auxiliary/
2014-01-29 10:21:39 +10:00
Dave Airlie a5bd4f8ab0 Merge branch 'drm-armada-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox into drm-next
Just one-liner which corrects a select statement for DRM_KMS_FB_HELPER
which looks like it was missed in the initial merge.  Based on 3.13.

* 'drm-armada-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox: (55 commits)
  DRM: armada: fix missing DRM_KMS_FB_HELPER select
2014-01-29 09:38:32 +10:00
Dave Airlie dee13f12f6 omapdrm patches for 3.14
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJSzqPyAAoJEPo9qoy8lh715MoP/i/70QZKPT4LxObqu+sVwqwp
 YEksEOgPFJZoUeZSs/7d7jgN/52bM9LCrARakEJdN8q+VyNWymXyi84VYE+vZB/D
 fHdDX5fTWsB09ORN2f4hRRPVJLr7kunJcMtNb3E0KTZKbDh6XOjdQ/pN+y6C9Gvt
 TzLLW9uuqFeziG5UVwgFIUgA99Z8BQYe7EMqs0k44vygq5/SNRkh7dbfGTiXVCnr
 NaMM1sa1MD3LW1Ec42StQ3bZDDE553V+SKWW3Xv7/x7kPQZmIs+wP+MxRa1DZGd1
 a2acZvcDlbcp9Ea6UkErHxJKnWyW2ttqqTwljNvB88pJDFQ1RhNEslYMJCwDGDTn
 BYE9lhYfYZp9X4rP4OOazB1OGafoWguz+CzRidxsV17RloTHTVIgCZVQCcVOMmPK
 pPYUgVNHSJvo7kIaN0K/BEOSDYPyN92SAvdVlZMhE3blc2Zdu6R5l5uZ6TKmSlLs
 wFqagyLelM0k4JlvVwkwkPTSh1tLUO2UAnFUeiW7sPJlBxg5kV5jOwsisK69v5db
 arUkXXHO002L3P79LxCHqUIoRZG8FA73qRR6q2fqH4Yusq8GA0pWuNs31Ni5+Jha
 jjdGV+GMEXeula6q5H/JBRUvBUuWqxrR592DDuWE/C1M4ZHym6S04lN2h3bg2XRb
 4yK+RbzfyZh/D3pZg+98
 =/Uwk
 -----END PGP SIGNATURE-----

Merge tag 'omapdrm-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next

omapdrm patches for 3.14

* tag 'omapdrm-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux:
  drm/omap: Enable DT support for DMM
  drm/omap: fix: change dev_unload order
  drm/omap: fix: disable encoder before destroying it
  drm/omap: fix: disconnect devices when omapdrm module is removed
  drm/omap: fix: Defer probe if an omapdss device requests for it at connect
  drm/omap: fix (un)registering irqs inside an irq handler

Conflicts:
	drivers/gpu/drm/omapdrm/omap_drv.c
2014-01-29 09:37:47 +10:00
Dave Airlie 5a0abe30be Merge branch 'gma500-next' of git://github.com/patjak/drm-gma500 into drm-next
Only two patches this time around. One trivial and one locking fix.

* 'gma500-next' of git://github.com/patjak/drm-gma500:
  drm/gma500: Lock struct_mutex around cursor updates
  drivers: gpu: Mark function as static in cdv_intel_dp.c
2014-01-29 09:35:48 +10:00
Ville Syrjälä 369a13425d drm/i915: Add debugfs hooks for messign with watermark latencies
Add a few new debugfs files which allow changing the watermark memory
latency values during runtime. This can be used to determine the if the
original BIOS provided latency values are no good.

v2: Drop superfluous plane name from output
    Take modeset locks around the latency value read/write

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 20:13:18 +01:00
Ville Syrjälä 3c0edaebb9 drm/i915: Drop WaDisableRCPBUnitClockGating:vlv
Only early VLV steppings needed thist. Should no longer be relevant.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:29:49 +01:00
Ville Syrjälä d1561c291d drm/i915: Drop WaApplyL3ControlAndL3ChickenMode:hsw
WaApplyL3ControlAndL3ChickenMode is only relevant to early HSW
steppings..

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:29:38 +01:00
Ville Syrjälä dfdf1b4fac drm/i915: Drop WaDisableRCZUnitClockGating:hsw
WaDisableRCZUnitClockGating was needed with early HSW steppings only.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:26:30 +01:00
Ville Syrjälä 1b80a19aa1 drm/i915: Drop bogus comment about RCPB unit clock gating on IVB
Someone copy pasted the comment from the SNB code w/o reading it.
We never actually implemented the workaround to disable RCPB unit
clock gating on IVB. It would have been needed for early steppings,
but we don't care about those anymore, so just remove the stale
comment.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:25:09 +01:00
Ville Syrjälä 685eacfd80 drm/i915: WaDisableRHWOOptimizationForRenderHang isn't applicable to VLV
Can't find WaDisableRHWOOptimizationForRenderHang listed for VLV.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:21:28 +01:00
Ville Syrjälä 681432d9ca drm/i915: WaDisableRHWOOptimizationForRenderHang isn't applicable to HSW
Can't find WaDisableRHWOOptimizationForRenderHang listed for HSW.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:20:00 +01:00
Ville Syrjälä 50eb3cf23c drm/i915: WaDisableRCCUnitClockGating isn't applicaple to VLV
WaDisableRCCUnitClockGating is only relevant for SNB.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:19:50 +01:00
Ville Syrjälä 28acf3b20c drm/i915: WaDisableRCCUnitClockGating isn't applicable to IVB
WaDisableRCCUnitClockGating is only relevant for SNB.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:19:41 +01:00
Ville Syrjälä ef59318cb1 drm/i915: WaDisableVDSUnitClockGating isn't applicable to SNB
Can't find any mention of WaDisableVDSUnitClockGating ever being
relevant for SNB. Remove it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:19:20 +01:00
Ville Syrjälä 031994ee8d drm/i915: Implement WaIncreaseL3CreditsForVLVB0:vlv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 14:18:57 +01:00
Patrik Jakobsson 631794b44b drm/gma500: Lock struct_mutex around cursor updates
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=64361
Cc: <stable@vger.kernel.org>
Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
2014-01-28 12:57:20 +01:00
Ben Widawsky c5dc5cecf8 drm/i915: Create a USES_PPGTT macro
There are cases where we want to know if there is a full, or aliased
PPGTT. Currently, in fact the only distinction we ever need to make is
when we're using full PPGTT.

This patch is simply to promote readability and clarify for the
confusing existing usage where "aliasing" meant aliasing and full.

v2: Remove USES_ALIASING_PPGTT since there are currently no cases where
we need to check if we're using aliasing, but not full PPGTT. (Daniel)

Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 09:13:50 +01:00
Akash Goel ec14ba4779 drm/i915: Fix the offset issue for the stolen GEM objects
The 'offset' field of the 'scatterlist' structure was wrongly
programmed with the offset value from the base of stolen area,
whereas this field indicates the offset from where the interested
data starts within the first PAGE pointed to by 'scattterlist'
structure. As a result when a new GEM object allocated from stolen
area is mapped to GTT, it could lead to an overwrite of GTT entries
as the page count calculation will go wrong, refer the function
'sg_page_count'.

v2: Modified the commit message. (Chris)

Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71908
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69104
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-28 09:04:42 +01:00
Russell King bed86f15bd DRM: armada: fix missing DRM_KMS_FB_HELPER select
Commit 92b6f89f6b8f (drm: Add separate Kconfig option for fbdev helpers)
happened in parallel with the inclusion of Armada DRM into mainline,
and so missed this update.  Add the necessary select statement to avoid
build errors.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-01-27 23:47:14 +00:00
Jani Nikula 3adee7a797 drm/i915: drop i915_ prefix from enable_rc6, enable_fbc, enable_ppgtt parameters
Having to use i915.i915_foo is inconsistent and a bit on the verbose
side. Drop the prefix per Daniel's request, who also says this is not
ABI we need to maintain.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:24:03 +01:00
Daniel Vetter 6ba844b090 drm/i915: GEN7_MSG_CONTROL is ivb-only
At least I couldn't find it in the Haswell Bspec any more and we've
tried to test-boot a Haswell machine with num_pipes forced to 0 (i.e.
hit the PCH_NOP path) and the unclaimed register logic complained.

So restrict this dance to just ivb platforms.

v2: Art pointed out that the bits simply moved on hsw+

v3: Buy code terseneness with a notch of sublety as suggested by
Chris.

v4: Frob the right bit, spotted by Art.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Arthur Ranyan <arthur.j.runyan@intel.com>
Cc: Dave Airlie <airlied@gmail.com>
Reviewed-by: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:47 +01:00
Damien Lespiau d34ff9c66d drm/i915: Constify the drm_i915_private pointer a bit more
A lot of the WM functions are only reading from that structure and are
already using const. While converting the code to use dev_priv instead
of dev, I noticed a few places where we can give that hint.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:46 +01:00
Jani Nikula d330a9530c drm/i915: move module parameters into a struct, in a new file
With 20+ module parameters, I think referring to them via a struct
improves clarity over just having a bunch of globals. While at it, move
the parameter initialization and definitions into a new file
i915_params.c to reduce clutter in i915_drv.c.

Apart from the ill-named i915_enable_rc6, i915_enable_fbc and
i915_enable_ppgtt parameters, for which we lose the "i915_" prefix
internally, the module parameters now look the same both on the kernel
command line and in code. For example, "i915.modeset".

The downsides of the change are losing static on a couple of variables
and not having the initialization and module_param_named() right next to
each other. On the other hand, all module parameters are now defined in
one place at i915_params.c. Plus you can do this to find all module
parameter references:

$ git grep "i915\." -- drivers/gpu/drm/i915

v2:
- move the definitions into a new file
- s/i915_params/i915/
- make i915_try_reset i915.reset, for consistency

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:45 +01:00
Ville Syrjälä 2b7e8082b2 drm/i915: We implement WaMiSetContext_Hang
WaMiSetContext_Hang tells us that a MI_NOOP must follow MI_SET_CONTEXT.

The other thing WaMiSetContext_Hang seems to say is that URB_FENCE isn't
allowed to straddle two cachelines. But we don't issue those from the
kernel so we don't care.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:45 +01:00
Ville Syrjälä e81ca80768 drm/i915: We implement WaDisableRCCUnitClockGating:snb
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:44 +01:00
Ville Syrjälä 44dc46cd20 drm/i915: WaApplyL3ControlAndL3ChickenMode isn't applicable for VLV
WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in
W/A database and BSpec.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:43 +01:00
Ville Syrjälä d50764a951 drm/i915: We implement WaDisableL3CacheAging:vlv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:42 +01:00
Ville Syrjälä fad7d36e44 drm/i915: WaPsdDispatchEnable seems to be another name for WaDisablePSDDualDispatchEnable
The w/a database lists both WaPsdDispatchEnable and
WaDisablePSDDualDispatchEnable for VLV. They appear to be the same
thing, so list both names.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:42 +01:00
Ville Syrjälä 2b37c6160e drm/i915: We implement WaEnableVGAAccessThroughIOPort:ctg, elk, ilk, snb, ivb, vlv, hsw
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:41 +01:00
Ville Syrjälä c5c32cda59 drm/i915: We implement WaDisableL3Bank2xClockGate:vlv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:40 +01:00
Chris Wilson f3ce382139 drm/i915: Include HW status page in error capture
Many times in the past we have concluded that the cause of the GPU hang
has been that the hw status page was stale, usually because the GPU and
CPU disagreed over the address of the page. Having stumbled across yet
another issue that seems to be related to the HWSP, it is time to
include that information in the GPU error dump.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:40 +01:00
Chris Wilson 42c3b603da drm/i915: Always pin the default context
Through a twisty and circuituous path it is possible to currently trick
the code into creating a default context and forgetting to pin it
immediately into the GGTT. (This requires a system using contexts without
an aliasing ppgtt, which is currently restricted to Baytrails machines
manually specifying a module parameter to force enable contexts, or
on Sandybridge and later that manually disable the aliasing ppgtt.) The
consequence is that during module unload we attempt to unpin the default
context twice and encounter a BUG remonstrating that we attempt to unpin
an unbound object.

[  161.002869] Kernel BUG at f84861f8 [verbose debug info unavailable]
[  161.002875] invalid opcode: 0000 [#1] SMP
[  161.002882] Modules linked in: coretemp kvm_intel kvm crc32_pclmul aesni_intel aes_i586 xts lrw gf128mul ablk_helper cryptd hid_sensor_accel_3d hid_sensor_gyro_3d hid_sensor_magn_3d hid_sensor_trigger industrialio_triggered_buffer kfifo_buf industrialio hid_sensor_iio_common snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_intel snd_hda_codec snd_hwdep snd_pcm snd_page_alloc snd_seq_midi snd_seq_midi_event dm_multipath scsi_dh asix ppdev usbnet snd_rawmidi mii hid_sensor_hub microcode snd_seq rfcomm bnep snd_seq_device bluetooth snd_timer snd parport_pc binfmt_misc soundcore dw_dmac_pci dw_dmac_core mac_hid lp parport dm_mirror dm_region_hash dm_log hid_generic usbhid hid i915(O-) drm_kms_helper(O) igb dca ptp pps_core i2c_algo_bit drm(O) ahci libahci video
[  161.002991] CPU: 0 PID: 2114 Comm: rmmod Tainted: G        W  O 3.13.0-rc8+ #2
[  161.002997] Hardware name: NEXCOM VTC1010/Aptio CRB, BIOS 5.6.5 09/24/2013
[  161.003004] task: dbdd6800 ti: dbe0e000 task.ti: dbe0e000
[  161.003010] EIP: 0060:[<f84861f8>] EFLAGS: 00010246 CPU: 0
[  161.003044] EIP is at i915_gem_object_ggtt_unpin+0x88/0x90 [i915]
[  161.003050] EAX: dfce3840 EBX: 00000000 ECX: dfafd690 EDX: dfce3874
[  161.003056] ESI: c0086b40 EDI: df962e00 EBP: dbe0fe1c ESP: dbe0fe0c
[  161.003062]  DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068
[  161.003068] CR0: 8005003b CR2: b7718000 CR3: 1bec0000 CR4: 001007f0
[  161.003076] Stack:
[  161.003081]  00afc014 00000004 c0086b40 dfafc000 dbe0fe38 f8487e5a dfaa5400 c0086b40
[  161.003099]  dfafc000 dfaa5400 dfaa5414 dbe0fe58 f84741aa 00000000 f89c34b9 dfaa5414
[  161.003117]  dfaa5400 dfaa5400 f644b000 dbe0fe6c f89a5443 dfaa5400 f8505000 f644b000
[  161.003134] Call Trace:
[  161.003169]  [<f8487e5a>] i915_gem_context_fini+0xba/0x1c0 [i915]
[  161.003202]  [<f84741aa>] i915_driver_unload+0x1fa/0x2f0 [i915]
[  161.003232]  [<f89a5443>] drm_dev_unregister+0x23/0x90 [drm]
[  161.003259]  [<f89a54ed>] drm_put_dev+0x3d/0x70 [drm]
[  161.003294]  [<f8470615>] i915_pci_remove+0x15/0x20 [i915]
[  161.003306]  [<c1338a6f>] pci_device_remove+0x2f/0xa0
[  161.003317]  [<c140c871>] __device_release_driver+0x61/0xc0
[  161.003328]  [<c140d12f>] driver_detach+0x8f/0xa0
[  161.003341]  [<c140c54f>] bus_remove_driver+0x4f/0xc0
[  161.003353]  [<c140d708>] driver_unregister+0x28/0x60
[  161.003362]  [<c10cee42>] ? stop_cpus+0x32/0x40
[  161.003372]  [<c10bd510>] ? module_refcount+0x90/0x90
[  161.003383]  [<c13378c5>] pci_unregister_driver+0x15/0x60
[  161.003413]  [<f89a739f>] drm_pci_exit+0x9f/0xb0 [drm]
[  161.003458]  [<f84e624a>] i915_exit+0x1b/0x1d [i915]
[  161.003468]  [<c10bf8a8>] SyS_delete_module+0x158/0x1f0
[  161.003480]  [<c1173d5d>] ? ____fput+0xd/0x10
[  161.003488]  [<c106f0fe>] ? task_work_run+0x7e/0xb0
[  161.003499]  [<c165a68d>] sysenter_do_call+0x12/0x28
[  161.003505] Code: 0f b6 4d f3 8d 51 0f 83 e1 f0 83 e2 0f 09 d1 84 d2 88 48 54 75 07 80 a7 91 00 00 00 7f 83 c4 04 5b 5e 5f 5d c3 8d b6 00 00 00 00 <0f> 0b 8d b6 00 00 00 00 55 89 e5 57 56 53 83 ec 64 3e 8d 74 26
[  161.003586] EIP: [<f84861f8>] i915_gem_object_ggtt_unpin+0x88/0x90 [i915] SS:ESP 0068:dbe0fe0c

v2: Rename the local variable (is_default_ctx) to avoid confusion with
the function is_default_ctx(). And correct Jesse's email address.

Reported-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73985
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Tested-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
[danvet: Fix up the rebase fail from my first attempt, thankfully
pointed out by Ville.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:16:10 +01:00
Chris Wilson 372fbb8e39 drm/i915: Decouple GPU error reporting from ring initialisation
Currently we report through our error state only the rings that have
been initialised (as detected by ring->obj). This check is done after
the GPU reset and ring re-initialisation, which means that the software
state may not be the same as when we captured the hardware error and we
may not print out any of the vital information for debugging the hang.

This (and the implied object leak) is a regression from

commit 3d57e5bd12
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Mon Oct 14 10:01:36 2013 -0700

    drm/i915: Do a fuller init after reset

Note that we are already starting to get bug reports with incomplete
error states from 3.13, which also hampers debugging userspace driver
issues.

v2: Prevent a NULL dereference on 830gm/845g after a GPU reset where
    the scratch obj may be NULL.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
References: https://bugs.freedesktop.org/show_bug.cgi?id=74094
Cc: stable@vger.kernel.org # please don't delay since it's a
vital support/debug feature for the intel gfx stack in general
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Add a bit of fluff to make it clear we need this expedited in
stable.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 17:10:33 +01:00
Rodrigo Vivi d2e216d085 drm/i915: debugfs: Add support for probing DP sink CRC.
This debugfs interface will allow intel-gpu-tools test case
to verify if screen has been updated properly on cases like PSR.

v2: Accepted all Daniel's suggestions:
    * grab modeset lock
    * loop over connector and check DPMS on
    * return errors
    * use _eDP1 suffix for easy future extension
    * don't cache crc_supported neither latest crc
    * return crc as a full array and read it at once with aux.
    * use 0 to turn TEST_SINK off.
    * split the drm_helpers definitions in another patch.

v3: Accepted 2 Damien's suggestion: remove h from printf hexa
    and return ENODEV when eDP not present instead of EAGAIN.

v4: Accepted 2 Jani' s suggestion: 1 path for unlock and remove
    _retry from aux read.

v5: removing last missing useless _retry (by Damien)

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 09:55:46 +01:00
Rodrigo Vivi a25eebb0af drm: dp helper: Add DP test sink CRC definition.
This address will be used to verify panel CRC for test and
validation purposes.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
[danvet: Fix whitespace fail.]
Acked-by: Dave Airlie <airlied@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-27 09:55:23 +01:00
Ville Syrjälä f64f172659 drm/i915: Fix FBC_FENCE_OFF
Having a 4 byte register at 0x321b seems unlikely as that's not
4 byte aligned. Since later platforms have more or less the same FBC
registers with new names, assume that FBC_FENCE_OFF is at 0x3218 just
like DPFC_FENCE_YOFF.

This feels like a simple typo in BSpec. 321Bh looks a lot like 3218h
after all.

Should still be tested on real hardware of course. But I don't have
any mobile gen4 systems.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-25 21:17:31 +01:00
Ville Syrjälä 5cd5410e9a drm/i915: Fix FBC1 enable message
The debug message telling FBC1 has been enabled is missing a newline.
Add it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-25 21:17:04 +01:00
Ville Syrjälä 46f3dab92f drm/i915: Don't preserve DPFC_CONTROL bits ILK/SNB
On CTG and IVB+ we don't try to preserve any bits from the
DPFC_CONTROL register. Follow suit on ILK/SNB.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-25 21:17:04 +01:00
Ville Syrjälä 768cf7f440 drm/i915: Kill most of the FBC register save/restore
We will anyway re-enable FBC normally after resume, so trying to save
and restore the register makes little sense.

We do need to preserve the FBC1 interval bits in FBC_CONTROL since
we only initialize them during driver load, and try to preserve them
after that.

v2: s/I915_HAS_FBC/HAS_FBC/ and fix the check for gen4

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-25 21:17:03 +01:00
Ville Syrjälä fe74c1a54f drm/i915: Actually write the correct bits to DPFC_CONTROL on CTG
We set up all the bits for DPFC_CONTROL but forgot to actually
write them to the register. Oops.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-25 21:17:03 +01:00
Ville Syrjälä 3fa2e0eec7 drm/i915: Use 1/2 compression ratio limit for 16bpp on FBC2
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-25 21:17:02 +01:00
Ville Syrjälä 7f2cf220b8 drm/i915: Improve FBC plane defines a bit
Make the FBC plane macros take the plane as a parameter.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-25 21:17:02 +01:00