Commit graph

5216 commits

Author SHA1 Message Date
Andy Shevchenko b93a8b2c51 gpio: dln2: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips:

   "not an immutable chip, please consider fixing it!"

Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
helper functions and call the appropriate gpiolib functions.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-06-06 14:09:16 +03:00
Andy Shevchenko f1138dacb7 gpio: sch: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips:

   "not an immutable chip, please consider fixing it!"

Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
helper functions and call the appropriate gpiolib functions.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-06-06 14:09:16 +03:00
Andy Shevchenko a80fed9fb6 gpio: merrifield: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips:

   "not an immutable chip, please consider fixing it!"

Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
helper functions and call the appropriate gpiolib functions.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-06-06 14:09:16 +03:00
Andy Shevchenko 41a18c4918 gpio: wcove: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips:

   "not an immutable chip, please consider fixing it!"

Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
helper functions and call the appropriate gpiolib functions.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
2022-06-06 14:09:16 +03:00
Andy Shevchenko 68a12c19e1 gpio: crystalcove: Join function declarations and long lines
There is no more hard limit of 80 characters for long lines, so
join a few of them for better readability.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-06-06 14:09:16 +03:00
Andy Shevchenko b34d2ad73a gpio: crystalcove: Use specific type and API for IRQ number
Use specific type and API for IRQ number in the callbacks.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-06-06 14:09:15 +03:00
Andy Shevchenko 386cbe7f1b gpio: crystalcove: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips:

   "not an immutable chip, please consider fixing it!"

Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
helper functions and call the appropriate gpiolib functions.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-06-06 14:09:15 +03:00
Linus Torvalds 2981436374 hte: New subsystem for v5.19-rc1
This contains the new HTE subsystem that has been in the works for a
 couple of months now. The infrastructure provided allows for drivers to
 register as hardware timestamp providers, while consumers will be able
 to request events that they are interested in (such as GPIOs and IRQs)
 to be timestamped by the hardware providers.
 
 Note that this currently supports only one provider, but there seems to
 be enough interest in this functionality and we expect to see more
 drivers added once this is merged.
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Merge tag 'hte/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

Pull hardware timestamping subsystem from Thierry Reding:
 "This contains the new HTE (hardware timestamping engine) subsystem
  that has been in the works for a couple of months now.

  The infrastructure provided allows for drivers to register as hardware
  timestamp providers, while consumers will be able to request events
  that they are interested in (such as GPIOs and IRQs) to be timestamped
  by the hardware providers.

  Note that this currently supports only one provider, but there seems
  to be enough interest in this functionality and we expect to see more
  drivers added once this is merged"

[ Linus Walleij mentions the Intel PMC in the Elkhart and Tiger Lake
  platforms as another future timestamp provider ]

* tag 'hte/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: timestamp: Correct id path
  dt-bindings: Renamed hte directory to timestamp
  hte: Uninitialized variable in hte_ts_get()
  hte: Fix off by one in hte_push_ts_ns()
  hte: Fix possible use-after-free in tegra_hte_test_remove()
  hte: Remove unused including <linux/version.h>
  MAINTAINERS: Add HTE Subsystem
  hte: Add Tegra HTE test driver
  tools: gpio: Add new hardware clock type
  gpiolib: cdev: Add hardware timestamp clock type
  gpio: tegra186: Add HTE support
  gpiolib: Add HTE support
  dt-bindings: Add HTE bindings
  hte: Add Tegra194 HTE kernel provider
  drivers: Add hardware timestamp engine (HTE) subsystem
  Documentation: Add HTE subsystem guide
2022-06-05 09:12:28 -07:00
Linus Torvalds 032dcf09e2 gpio updates for v5.19-rc1
- use the correct register for regcache sync in gpio-pca953x
 - remove unused and potentially harmful code from gpio-adp5588
 - MAINTAINERS update
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Merge tag 'gpio-fixes-for-v5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio fixes from Bartosz Golaszewski:

 - use the correct register for regcache sync in gpio-pca953x

 - remove unused and potentially harmful code from gpio-adp5588

 - MAINTAINERS update

* tag 'gpio-fixes-for-v5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpio: adp5588: Remove support for platform setup and teardown callbacks
  gpio: pca953x: use the correct register address to do regcache sync
  MAINTAINERS: Update Intel GPIO (PMIC and PCH) to Supported
  MAINTAINERS: Update GPIO ACPI library to Supported
2022-06-03 20:01:25 -07:00
Uwe Kleine-König 7bb8a0cf49 gpio: adp5588: Remove support for platform setup and teardown callbacks
If the teardown callback failed in the gpio driver, it fails to free the
irq (if there is one). The device is removed anyhow. If later on the irq
triggers, all sorts of unpleasant things might happen (e.g. accessing
the struct adp5588_gpio which is already freed in the meantime or starting
i2c bus transfers for an unregistered device). Even before irq support was
added to this driver, exiting early was wrong; back then it failed to
unregister the gpiochip.

Fortunately these callbacks aren't used any more since at least blackfin
was removed in 2018. So just drop them.

Note that they are not removed from struct adp5588_gpio_platform_data
because the keyboard driver adp5588-keys.c also makes use of them.
(I didn't check if the callbacks might have been called twice, maybe there
is another reason hidden to better not call these functions.)

This patch is a preparation for making i2c remove callbacks return void.

Fixes: 80884094e3 ("gpio: adp5588-gpio: new driver for ADP5588 GPIO expanders")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-06-02 09:17:38 +02:00
Haibo Chen 43624eda86 gpio: pca953x: use the correct register address to do regcache sync
For regcache_sync_region, need to use pca953x_recalc_addr() to get
the real register address.

Fixes: b765743005 ("gpio: pca953x: Restore registers after suspend/resume cycle")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-06-01 19:20:27 +02:00
Linus Torvalds 907bb57aa7 Pin control bulk changes for the v5.19 series:
Core changes:
 
 - New helpers from Andy such as for_each_gpiochip_node() affecting both
   GPIO and pin control, improving a bunch of drivers in the process.
 
 - Pulled in Marc Zyngiers work to make IRQ chips immutable, and started
   to apply fixups on top.
 
 New drivers:
 
 - New driver for Marvell MVEBU 98DX2530.
 
 - New driver for Mediatek MT8195.
 
 - Support Qualcomm PMX65 and PM6125.
 
 - New driver for Qualcomm SC7280 LPASS pin control.
 
 - New driver for Rockchip RK3588.
 
 - New driver for NXP Freescale i.MXRT1170.
 
 - New driver for Mediatek MT6795 Helio X10.
 
 Improvements:
 
 - Several Aspeed G6 cleanups and non-critical fixes.
 
 - Thorought refactoring of some of the ever improving Renesas drivers.
 
 - Clean up Mediatek MT8192 bindings a bit.
 
 - PWM output and clock monitoring in the Ocelot LAN966x driver.
 
 - Thorough refactoring and cleanup of the Ralink drivers such as
   RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into proper
   sub-drivers.
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Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Pretty big this time. Mostly due to (nice) Renesas refactorings.

  Core changes:

   - New helpers from Andy such as for_each_gpiochip_node() affecting
     both GPIO and pin control, improving a bunch of drivers in the
     process.

   - Pulled in Marc Zyngiers work to make IRQ chips immutable, and
     started to apply fixups on top.

  New drivers:

   - New driver for Marvell MVEBU 98DX2530.

   - New driver for Mediatek MT8195.

   - Support Qualcomm PMX65 and PM6125.

   - New driver for Qualcomm SC7280 LPASS pin control.

   - New driver for Rockchip RK3588.

   - New driver for NXP Freescale i.MXRT1170.

   - New driver for Mediatek MT6795 Helio X10.

  Improvements:

   - Several Aspeed G6 cleanups and non-critical fixes.

   - Thorought refactoring of some of the ever improving Renesas
     drivers.

   - Clean up Mediatek MT8192 bindings a bit.

   - PWM output and clock monitoring in the Ocelot LAN966x driver.

   - Thorough refactoring and cleanup of the Ralink drivers such as
     RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into
     proper sub-drivers"

* tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits)
  pinctrl: apple: Use a raw spinlock for the regmap
  pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs
  pinctrl: intel: Fix kernel doc format, i.e. add return sections
  dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent'
  pinctrl: starfive: Make the irqchip immutable
  pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
  dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
  pinctrl: freescale: Add i.MXRT1170 pinctrl driver support
  dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation
  dt-bindings: pinctrl: rockchip: increase max amount of device functions
  dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'
  dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'
  dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names
  dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config
  dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU
  pinctrl: qcom: spmi-gpio: Add pm6125 compatible
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible
  pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl
  pinctrl: intel: make irq_chip immutable
  pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask()
  ...
2022-05-28 11:15:54 -07:00
Linus Torvalds 7182e89769 gpio updates for v5.19
- use ioread()/iowrite() interfaces instead of raw inb()/outb() in drivers
 - make irqchips immutable due to the new warning popping up when drivers try to
   modify the irqchip structures
 - add new compatibles to dt-bindings for realtek-otto, renesas-rcar and pca95xx
 - add support for new models to gpio-rcar, gpio-pca953x & gpio-realtek-otto
 - allow parsing of GPIO hogs represented as children nodes of gpio-uniphier
 - define a set of common GPIO consumer strings in dt-bindings
 - shrink code in gpio-ml-ioh by using more devres interfaces
 - pass arguments to devm_kcalloc() in correct order in gpio-sim
 - add new helpers for iterating over GPIO firmware nodes and descriptors to
   gpiolib core and use it in several drivers
 - drop unused syscon_regmap_lookup_by_compatible() function
 - correct format specifiers and signedness of variables in GPIO ACPI
 - drop unneeded error checks in gpio-ftgpio
 - stop using the deprecated of_gpio.h header in gpio-zevio
 - drop platform_data support in gpio-max732x
 - simplify Kconfig dependencies in gpio-vf610
 - use raw spinlocks where needed to make PREEMPT_RT happy
 - fix return values in board files using gpio-pcf857x
 - convert more drivers to using fwnode instead of of_node
 - minor fixes and improvements in gpiolib core
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Merge tag 'gpio-updates-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "We have lots of small changes all over the place, but no huge reworks
  or new drivers:

   - use ioread()/iowrite() interfaces instead of raw inb()/outb() in
     drivers

   - make irqchips immutable due to the new warning popping up when
     drivers try to modify the irqchip structures

   - add new compatibles to dt-bindings for realtek-otto, renesas-rcar
     and pca95xx

   - add support for new models to gpio-rcar, gpio-pca953x &
     gpio-realtek-otto

   - allow parsing of GPIO hogs represented as children nodes of
     gpio-uniphier

   - define a set of common GPIO consumer strings in dt-bindings

   - shrink code in gpio-ml-ioh by using more devres interfaces

   - pass arguments to devm_kcalloc() in correct order in gpio-sim

   - add new helpers for iterating over GPIO firmware nodes and
     descriptors to gpiolib core and use it in several drivers

   - drop unused syscon_regmap_lookup_by_compatible() function

   - correct format specifiers and signedness of variables in GPIO ACPI

   - drop unneeded error checks in gpio-ftgpio

   - stop using the deprecated of_gpio.h header in gpio-zevio

   - drop platform_data support in gpio-max732x

   - simplify Kconfig dependencies in gpio-vf610

   - use raw spinlocks where needed to make PREEMPT_RT happy

   - fix return values in board files using gpio-pcf857x

   - convert more drivers to using fwnode instead of of_node

   - minor fixes and improvements in gpiolib core"

* tag 'gpio-updates-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (55 commits)
  gpio: sifive: Make the irqchip immutable
  gpio: rcar: Make the irqchip immutable
  gpio: pcf857x: Make the irqchip immutable
  gpio: pca953x: Make the irqchip immutable
  gpio: dwapb: Make the irqchip immutable
  gpio: sim: Use correct order for the parameters of devm_kcalloc()
  gpio: ml-ioh: Convert to use managed functions pcim* and devm_*
  gpio: ftgpio: Remove unneeded ERROR check before clk_disable_unprepare
  gpio: ws16c48: Utilize iomap interface
  gpio: gpio-mm: Utilize iomap interface
  gpio: 104-idio-16: Utilize iomap interface
  gpio: 104-idi-48: Utilize iomap interface
  gpio: 104-dio-48e: Utilize iomap interface
  gpio: zevio: drop of_gpio.h header
  gpio: max77620: Make the irqchip immutable
  dt-bindings: gpio: pca95xx: add entry for pca6408
  gpio: pca953xx: Add support for pca6408
  gpio: max732x: Drop unused support for irq and setup code via platform data
  gpio: vf610: drop the SOC_VF610 dependency for GPIO_VF610
  gpio: syscon: Remove usage of syscon_regmap_lookup_by_compatible
  ...
2022-05-26 14:51:38 -07:00
Geert Uytterhoeven 5a7cb9f397 gpio: sifive: Make the irqchip immutable
Commit 6c846d026d ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the sifive driver:

    gpio gpiochip1: (38001000.gpio-controller): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the sifive driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-24 16:35:52 +02:00
Geert Uytterhoeven 718b972d32 gpio: rcar: Make the irqchip immutable
Commit 6c846d026d ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the gpio-rcar driver:

    gpio gpiochip0: (e6050000.gpio): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the gpio-rcar driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-24 16:35:49 +02:00
Geert Uytterhoeven 61550be779 gpio: pcf857x: Make the irqchip immutable
Commit 6c846d026d ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the pcf857x driver:

    gpio gpiochip1: (pcf8575): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the pcf857x driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-24 16:35:42 +02:00
Geert Uytterhoeven ac2f6f9385 gpio: pca953x: Make the irqchip immutable
Commit 6c846d026d ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the pca953x driver:

    gpio gpiochip7: (0-0020): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the pca953x driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-24 16:35:37 +02:00
Geert Uytterhoeven cfc2b00ebe gpio: dwapb: Make the irqchip immutable
Commit 6c846d026d ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the dwapb driver:

    gpio gpiochip0: (50200000.gpio): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the dwapb driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-24 16:35:26 +02:00
Linus Torvalds fcfde8a7cf Updates for interrupt core and drivers:
Core code:
 
     - Make the managed interrupts more robust by shutting them down in the
       core code when the assigned affinity mask does not contain online
       CPUs.
 
     - Make the irq simulator chip work on RT
 
     - A small set of cpumask and power manageent cleanups
 
   Drivers:
 
     - A set of changes which mark GPIO interrupt chips immutable to prevent
       the GPIO subsystem from modifying it under the hood. This provides
       the necessary infrastructure and converts a set of GPIO and pinctrl
       drivers over.
 
     - A set of changes to make the pseudo-NMI handling for GICv3 more
       robust: a missing barrier and consistent handling of the priority
       mask.
 
     - Another set of GICv3 improvements and fixes, but nothing outstanding
 
     - The usual set of improvements and cleanups all over the place
 
     - No new irqchip drivers and not even a new device tree binding!
       100+ interrupt chips are truly enough.
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Merge tag 'irq-core-2022-05-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull interrupt handling updates from Thomas Gleixner:
 "Core code:

   - Make the managed interrupts more robust by shutting them down in
     the core code when the assigned affinity mask does not contain
     online CPUs.

   - Make the irq simulator chip work on RT

   - A small set of cpumask and power manageent cleanups

  Drivers:

   - A set of changes which mark GPIO interrupt chips immutable to
     prevent the GPIO subsystem from modifying it under the hood. This
     provides the necessary infrastructure and converts a set of GPIO
     and pinctrl drivers over.

   - A set of changes to make the pseudo-NMI handling for GICv3 more
     robust: a missing barrier and consistent handling of the priority
     mask.

   - Another set of GICv3 improvements and fixes, but nothing
     outstanding

   - The usual set of improvements and cleanups all over the place

   - No new irqchip drivers and not even a new device tree binding!
     100+ interrupt chips are truly enough"

* tag 'irq-core-2022-05-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (39 commits)
  irqchip: Add Kconfig symbols for sunxi drivers
  irqchip/gic-v3: Fix priority mask handling
  irqchip/gic-v3: Refactor ISB + EOIR at ack time
  irqchip/gic-v3: Ensure pseudo-NMIs have an ISB between ack and handling
  genirq/irq_sim: Make the irq_work always run in hard irq context
  irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x
  irqchip/gic: Improved warning about incorrect type
  irqchip/csky: Return true/false (not 1/0) from bool functions
  irqchip/imx-irqsteer: Add runtime PM support
  irqchip/imx-irqsteer: Constify irq_chip struct
  irqchip/armada-370-xp: Enable MSI affinity configuration
  irqchip/aspeed-scu-ic: Fix irq_of_parse_and_map() return value
  irqchip/aspeed-i2c-ic: Fix irq_of_parse_and_map() return value
  irqchip/sun6i-r: Use NULL for chip_data
  irqchip/xtensa-mx: Fix initial IRQ affinity in non-SMP setup
  irqchip/exiu: Fix acknowledgment of edge triggered interrupts
  irqchip/gic-v3: Claim iomem resources
  dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit
  irqchip/gic-v3: Relax polling of GIC{R,D}_CTLR.RWP
  irqchip/gic-v3: Detect LPI invalidation MMIO registers
  ...
2022-05-23 16:58:49 -07:00
Christophe JAILLET c680c6a814 gpio: sim: Use correct order for the parameters of devm_kcalloc()
We should have 'n', then 'size', not the opposite.
This is harmless because the 2 values are just multiplied, but having
the correct order silence a (unpublished yet) smatch warning.

Fixes: cb8c474e79 ("gpio: sim: new testing module")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-22 22:09:50 +02:00
Zheyu Ma 7869b48102 gpio: ml-ioh: Convert to use managed functions pcim* and devm_*
When removing the module, we will get the following flaw:

[   14.204955] remove_proc_entry: removing non-empty directory 'irq/21', leaking at least 'gpio_ml_ioh'
[   14.205827] WARNING: CPU: 0 PID: 305 at fs/proc/generic.c:717 remove_proc_entry+0x389/0x3f0
...
[   14.220613]  ioh_gpio_remove+0xc5/0xe0 [gpio_ml_ioh]
[   14.221075]  pci_device_remove+0x92/0x240

Fix this by using managed functions, this makes the error handling more
simpler.

Fixes: e971ac9a56 ("gpio: ml-ioh: use resource management for irqs")
Signed-off-by: Zheyu Ma <zheyuma97@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-20 19:20:35 +02:00
Uwe Kleine-König 3ecb10175b gpio: mvebu/pwm: Refuse requests with inverted polarity
The driver doesn't take struct pwm_state::polarity into account when
configuring the hardware, so refuse requests for inverted polarity.

Fixes: 757642f9a5 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-20 16:46:56 +02:00
Haibo Chen 9bf3ac466f gpio: gpio-vf610: do not touch other bits when set the target bit
For gpio controller contain register PDDR, when set one target bit,
current logic will clear all other bits, this is wrong. Use operator
'|=' to fix it.

Fixes: 659d8a6231 ("gpio: vf610: add imx7ulp support")
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-20 16:46:56 +02:00
Wan Jiabing a998ec3d7b gpio: ftgpio: Remove unneeded ERROR check before clk_disable_unprepare
clk_disable_unprepare() already checks ERROR by using IS_ERR_OR_NULL.
Remove unneeded ERROR check for g->clk.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-16 22:16:13 +02:00
William Breathitt Gray 5561a2b086 gpio: ws16c48: Utilize iomap interface
This driver doesn't need to access I/O ports directly via inb()/outb()
and friends. This patch abstracts such access by calling ioport_map()
to enable the use of more typical ioread8()/iowrite8() I/O memory
accessor calls.

Suggested-by: David Laight <David.Laight@ACULAB.COM>
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-14 14:57:12 +02:00
William Breathitt Gray 54c8e25174 gpio: gpio-mm: Utilize iomap interface
This driver doesn't need to access I/O ports directly via inb()/outb()
and friends. This patch abstracts such access by calling ioport_map()
to enable the use of more typical ioread8()/iowrite8() I/O memory
accessor calls.

Suggested-by: David Laight <David.Laight@ACULAB.COM>
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-14 14:57:07 +02:00
William Breathitt Gray e0a574ef41 gpio: 104-idio-16: Utilize iomap interface
This driver doesn't need to access I/O ports directly via inb()/outb()
and friends. This patch abstracts such access by calling ioport_map()
to enable the use of more typical ioread8()/iowrite8() I/O memory
accessor calls.

Suggested-by: David Laight <David.Laight@ACULAB.COM>
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-14 14:57:03 +02:00
William Breathitt Gray bed5806990 gpio: 104-idi-48: Utilize iomap interface
This driver doesn't need to access I/O ports directly via inb()/outb()
and friends. This patch abstracts such access by calling ioport_map()
to enable the use of more typical ioread8()/iowrite8() I/O memory
accessor calls.

Suggested-by: David Laight <David.Laight@ACULAB.COM>
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-14 14:56:58 +02:00
William Breathitt Gray e993e23605 gpio: 104-dio-48e: Utilize iomap interface
This driver doesn't need to access I/O ports directly via inb()/outb()
and friends. This patch abstracts such access by calling ioport_map()
to enable the use of more typical ioread8()/iowrite8() I/O memory
accessor calls.

Suggested-by: David Laight <David.Laight@ACULAB.COM>
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-14 14:56:54 +02:00
Moses Christopher Bollavarapu cf8f4462e5 gpio: zevio: drop of_gpio.h header
Remove of_gpio.h header file, replace of_* functions and structs
with appropriate alternatives.

Signed-off-by: Moses Christopher Bollavarapu <mosescb.dev@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-14 14:41:21 +02:00
Puyou Lu dba7857985 gpio: pca953x: fix irq_stat not updated when irq is disabled (irq_mask not set)
When one port's input state get inverted (eg. from low to hight) after
pca953x_irq_setup but before setting irq_mask (by some other driver such as
"gpio-keys"), the next inversion of this port (eg. from hight to low) will not
be triggered any more (because irq_stat is not updated at the first time). Issue
should be fixed after this commit.

Fixes: 89ea8bbe9c ("gpio: pca953x.c: add interrupt handling capability")
Signed-off-by: Puyou Lu <puyou.lu@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-06 16:59:29 +02:00
Linus Walleij 160625856d Merge branch 'irq/gpio-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel 2022-05-05 16:50:14 +02:00
Bartosz Golaszewski 86bfb916df Merge branch 'irq/gpio-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into gpio/for-next
This pulls in changes improving the handling of immutable irqchips in core
gpiolib and several drivers.
2022-05-05 15:03:29 +02:00
Jon Hunter 7f42aa7b00 gpio: max77620: Make the irqchip immutable
Commit 6c846d026d ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips. Following this change the following warning is
now observed for the max77620 gpio driver ...

 WARNING KERN gpio gpiochip0: (max77620-gpio): not an immutable chip,
 	please consider fixing it!

Fix the above warning by making the max77620 gpio driver immutable.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-05 14:56:37 +02:00
Justin Chen a9e49635e2 gpio: pca953xx: Add support for pca6408
Add support for pca6408 which is the 8-bit version of the pca6416.

https://www.nxp.com/docs/en/data-sheet/PCA6408A.pdf

Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-05 14:52:39 +02:00
Nobuhiro Iwamatsu 171865dab0 gpio: visconti: Fix fwnode of GPIO IRQ
The fwnode of GPIO IRQ must be set to its own fwnode, not the fwnode of the
parent IRQ. Therefore, this sets own fwnode instead of the parent IRQ fwnode to
GPIO IRQ's.

Fixes: 2ad74f40da ("gpio: visconti: Add Toshiba Visconti GPIO support")
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-05 14:39:02 +02:00
Uwe Kleine-König 6d5f220744 gpio: max732x: Drop unused support for irq and setup code via platform data
The only user of max732x_platform_data is arch/arm/mach-pxa/littleton.c
and it only uses .gpio_base. So drop the other members from the data struct
and simplify the driver accordingly.

The motivating side effect of this change is that the .remove() callback
cannot return a nonzero error code any more which prepares making i2c
remove callbacks return void.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-05 14:37:17 +02:00
Dipen Patel 2068339a6c gpiolib: cdev: Add hardware timestamp clock type
This patch adds new clock type for the GPIO controller which can
timestamp gpio lines in using hardware means. To expose such
functionalities to the userspace, code has been added where
during line create or set config API calls, it checks for new
clock type and if requested, calls HTE API. During line change
event, the HTE subsystem pushes timestamp data to userspace
through gpiolib-cdev.

Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04 11:06:13 +02:00
Dipen Patel 10e4afd6cc gpio: tegra186: Add HTE support
Tegra194 AON GPIO controller with the use of its internal hardware
timestamping engine (HTE), also known as GTE, can timestamp GPIO lines
through system counter. This patch implements enable/disable callbacks
for the GPIO controller. In enable call, it will set timestamp function
bit and GPIO line rising/falling edges in the config register. In
disable call, it restores the state.

Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04 11:06:13 +02:00
Dipen Patel 42112dd77b gpiolib: Add HTE support
Some GPIO chip can provide hardware timestamp support on its GPIO lines
, in order to support that, additional API needs to be added which
can talk to both GPIO chip and HTE (hardware timestamping engine)
providers if there is any dependencies. This patch introduces optional
hooks to enable and disable hardware timestamping related features
in the GPIO controller chip.

Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04 11:06:13 +02:00
Peng Fan 30a35c07d9 gpio: vf610: drop the SOC_VF610 dependency for GPIO_VF610
i.MX7ULP, i.MX8 and i.MX9 use this driver, so drop
the SOC_VF610 dependcy to make the driver could be built
for i.MX platform.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-02 14:12:30 +02:00
Bartosz Golaszewski c85b2f15f5 intel-gpio for v5.19-1
* Introduce helpers to iterate over GPIO chip nodes and covert some drivers
 
 The following is an automated git shortlog grouped by driver:
 
 gpiolib:
  -  Introduce a helper to get first GPIO controller node
  -  Introduce gpiochip_node_count() helper
  -  Introduce for_each_gpiochip_node() loop helper
 
 pinctrl:
  -  meson: Replace custom code by gpiochip_node_count() call
  -  meson: Enable COMPILE_TEST
  -  meson: Rename REG_* to MESON_REG_*
  -  armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register()
  -  armada-37xx: Switch to use fwnode instead of of_node
  -  samsung: Switch to use for_each_gpiochip_node() helper
  -  samsung: Drop redundant node parameter in samsung_banks_of_node_get()
  -  npcm7xx: Switch to use for_each_gpiochip_node() helper
  -  renesas: rza1: Switch to use for_each_gpiochip_node() helper
  -  renesas: rza1: Replace custom code by gpiochip_node_count() call
  -  stm32: Switch to use for_each_gpiochip_node() helper
  -  stm32: Replace custom code by gpiochip_node_count() call
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Merge tag 'intel-gpio-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-next

intel-gpio for v5.19-1

* Introduce helpers to iterate over GPIO chip nodes and covert some drivers

gpiolib:
 -  Introduce a helper to get first GPIO controller node
 -  Introduce gpiochip_node_count() helper
 -  Introduce for_each_gpiochip_node() loop helper

pinctrl:
 -  meson: Replace custom code by gpiochip_node_count() call
 -  meson: Enable COMPILE_TEST
 -  meson: Rename REG_* to MESON_REG_*
 -  armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register()
 -  armada-37xx: Switch to use fwnode instead of of_node
 -  samsung: Switch to use for_each_gpiochip_node() helper
 -  samsung: Drop redundant node parameter in samsung_banks_of_node_get()
 -  npcm7xx: Switch to use for_each_gpiochip_node() helper
 -  renesas: rza1: Switch to use for_each_gpiochip_node() helper
 -  renesas: rza1: Replace custom code by gpiochip_node_count() call
 -  stm32: Switch to use for_each_gpiochip_node() helper
 -  stm32: Replace custom code by gpiochip_node_count() call
2022-05-02 11:44:02 +02:00
Baruch Siach e5f6e5d554 gpio: mvebu: drop pwm base assignment
pwmchip_add() unconditionally assigns the base ID dynamically. Commit
f9a8ee8c8b ("pwm: Always allocate PWM chip base ID dynamically")
dropped all base assignment from drivers under drivers/pwm/. It missed
this driver. Fix that.

Fixes: f9a8ee8c8b ("pwm: Always allocate PWM chip base ID dynamically")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-02 11:27:57 +02:00
Andrei Lalaev e75f88efac gpiolib: of: fix bounds check for 'gpio-reserved-ranges'
Gpiolib interprets the elements of "gpio-reserved-ranges" as "start,size"
because it clears "size" bits starting from the "start" bit in the according
bitmap. So it has to use "greater" instead of "greater or equal" when performs
bounds check to make sure that GPIOs are in the available range.
Previous implementation skipped ranges that include the last GPIO in
the range.

I wrote the mail to the maintainers
(https://lore.kernel.org/linux-gpio/20220412115554.159435-1-andrei.lalaev@emlid.com/T/#u)
of the questioned DTSes (because I couldn't understand how the maintainers
interpreted this property), but I haven't received a response.
Since the questioned DTSes use "gpio-reserved-ranges = <0 4>"
(i.e., the beginning of the range), this patch doesn't affect these DTSes at all.
TBH this patch doesn't break any existing DTSes because none of them
reserve gpios at the end of range.

Fixes: 726cb3ba49 ("gpiolib: Support 'gpio-reserved-ranges' property")
Signed-off-by: Andrei Lalaev <andrei.lalaev@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-02 11:27:57 +02:00
Alexander Shiyan 2e9cf8458d gpio: syscon: Remove usage of syscon_regmap_lookup_by_compatible
Since version 5.13, the standard syscon bindings have been added
to all clps711x DT nodes, so we can now use the more general
syscon_regmap_lookup_by_phandle function to get the syscon pointer.

This patch removes the usage of the syscon_regmap_lookup_by_compatible
function as it is no longer used in the driver.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-05-02 10:41:33 +02:00
Linus Walleij f930b69a89 Linux 5.18-rc5
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Merge tag 'v5.18-rc5' into devel

Merge in Linux 5.18-rc5 since new code to the STM32 driver
depend in a non-trivial way on the fixes merged in -rc5.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-01 23:25:10 +02:00
Uwe Kleine-König fae74fb5d5 gpio: pcf857x: Make teardown callback return void
All teardown functions return 0. Also there is little sense in returning
a negative error code from an i2c remove function as this only results in
emitting an error message but the device is removed nevertheless.

This patch is a preparation for making i2c remove callbacks return void.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-25 20:55:39 +02:00
Linus Walleij c83227a5d0 irq/gpio: ixp4xx: Drop boardfile probe path
The boardfiles for IXP4xx have been deleted. Delete all the
quirks and code dealing with that boot path and rely solely on
device tree boot.

Fix some missing static keywords that the kernel test robot
was complaining about while we're at it.

Cc: Bartosz Golaszewski <brgl@bgdev.pl>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-25 20:53:18 +02:00
Schspa Shi 3c938cc5ce gpio: use raw spinlock for gpio chip shadowed data
In case of PREEMPT_RT, there is a raw_spinlock -> spinlock dependency
as the lockdep report shows.

__irq_set_handler
  irq_get_desc_buslock
    __irq_get_desc_lock
      raw_spin_lock_irqsave(&desc->lock, *flags);  // raw spinlock get here
  __irq_do_set_handler
    mask_ack_irq
      dwapb_irq_ack
        spin_lock_irqsave(&gc->bgpio_lock, flags); // sleep able spinlock
  irq_put_desc_busunlock

Replace with a raw lock to avoid BUGs. This lock is only used to access
registers, and It's safe to replace with the raw lock without bad
influence.

[   15.090359][    T1] =============================
[   15.090365][    T1] [ BUG: Invalid wait context ]
[   15.090373][    T1] 5.10.59-rt52-00983-g186a6841c682-dirty #3 Not tainted
[   15.090386][    T1] -----------------------------
[   15.090392][    T1] swapper/0/1 is trying to lock:
[   15.090402][    T1] 70ff00018507c188 (&gc->bgpio_lock){....}-{3:3}, at: _raw_spin_lock_irqsave+0x1c/0x28
[   15.090470][    T1] other info that might help us debug this:
[   15.090477][    T1] context-{5:5}
[   15.090485][    T1] 3 locks held by swapper/0/1:
[   15.090497][    T1]  #0: c2ff0001816de1a0 (&dev->mutex){....}-{4:4}, at: __device_driver_lock+0x98/0x104
[   15.090553][    T1]  #1: ffff90001485b4b8 (irq_domain_mutex){+.+.}-{4:4}, at: irq_domain_associate+0xbc/0x6d4
[   15.090606][    T1]  #2: 4bff000185d7a8e0 (lock_class){....}-{2:2}, at: _raw_spin_lock_irqsave+0x1c/0x28
[   15.090654][    T1] stack backtrace:
[   15.090661][    T1] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 5.10.59-rt52-00983-g186a6841c682-dirty #3
[   15.090682][    T1] Hardware name: Horizon Robotics Journey 5 DVB (DT)
[   15.090692][    T1] Call trace:
......
[   15.090811][    T1]  _raw_spin_lock_irqsave+0x1c/0x28
[   15.090828][    T1]  dwapb_irq_ack+0xb4/0x300
[   15.090846][    T1]  __irq_do_set_handler+0x494/0xb2c
[   15.090864][    T1]  __irq_set_handler+0x74/0x114
[   15.090881][    T1]  irq_set_chip_and_handler_name+0x44/0x58
[   15.090900][    T1]  gpiochip_irq_map+0x210/0x644

Signed-off-by: Schspa Shi <schspa@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Doug Berger <opendmb@gmail.com>
Acked-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-25 12:10:02 +02:00
Mario Limonciello 06fb4ecfea gpio: Request interrupts after IRQ is initialized
Commit 5467801f1f ("gpio: Restrict usage of GPIO chip irq members
before initialization") attempted to fix a race condition that lead to a
NULL pointer, but in the process caused a regression for _AEI/_EVT
declared GPIOs.

This manifests in messages showing deferred probing while trying to
allocate IRQs like so:

  amd_gpio AMDI0030:00: Failed to translate GPIO pin 0x0000 to IRQ, err -517
  amd_gpio AMDI0030:00: Failed to translate GPIO pin 0x002C to IRQ, err -517
  amd_gpio AMDI0030:00: Failed to translate GPIO pin 0x003D to IRQ, err -517
  [ .. more of the same .. ]

The code for walking _AEI doesn't handle deferred probing and so this
leads to non-functional GPIO interrupts.

Fix this issue by moving the call to `acpi_gpiochip_request_interrupts`
to occur after gc->irc.initialized is set.

Fixes: 5467801f1f ("gpio: Restrict usage of GPIO chip irq members before initialization")
Link: https://lore.kernel.org/linux-gpio/BL1PR12MB51577A77F000A008AA694675E2EF9@BL1PR12MB5157.namprd12.prod.outlook.com/
Link: https://bugzilla.suse.com/show_bug.cgi?id=1198697
Link: https://bugzilla.kernel.org/show_bug.cgi?id=215850
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1979
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1976
Reported-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Shreeya Patel <shreeya.patel@collabora.com>
Tested-By: Samuel Čavoj <samuel@cavoj.net>
Tested-By: lukeluk498@gmail.com Link:
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-and-tested-by: Takashi Iwai <tiwai@suse.de>
Cc: Shreeya Patel <shreeya.patel@collabora.com>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2022-04-22 13:59:19 -07:00
Caleb Connolly 7ff1135781 gpio/rockchip: handle deferring input-enable pinconfs
Add support for deferred PIN_CONFIG_INPUT_ENABLE handling.

Signed-off-by: Caleb Connolly <kc@postmarketos.org>
Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
Link: https://lore.kernel.org/r/20220328005005.72492-4-kc@postmarketos.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-22 22:56:46 +02:00
Caleb Connolly 8ce5ef6454 pinctrl/rockchip: support deferring other gpio params
Add support for deferring other params like PIN_CONFIG_INPUT_ENABLE.
This will be used to add support for PIN_CONFIG_INPUT_ENABLE to the
driver.

Fixes: e7165b1dff ("pinctrl/rockchip: add a queue for deferred pin output settings on probe")
Fixes: 59dd178e1d ("gpio/rockchip: fetch deferred output settings on probe")
Signed-off-by: Caleb Connolly <kc@postmarketos.org>
Link: https://lore.kernel.org/r/20220328005005.72492-2-kc@postmarketos.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-22 22:55:41 +02:00
Stefan Wahren 3550bba25d gpiolib: of: Introduce hook for missing gpio-ranges
Since commit 2ab73c6d83 ("gpio: Support GPIO controllers without pin-ranges")
the device tree nodes of GPIO controller need the gpio-ranges property to
handle gpio-hogs. Unfortunately it's impossible to guarantee that every new
kernel is shipped with an updated device tree binary.

In order to provide backward compatibility with those older DTB, we need a
callback within of_gpiochip_add_pin_range() so the relevant platform driver
can handle this case.

Fixes: 2ab73c6d83 ("gpio: Support GPIO controllers without pin-ranges")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
Link: https://lore.kernel.org/r/20220409095129.45786-2-stefan.wahren@i2se.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-21 16:12:07 +02:00
Marc Zyngier 4bde53ab33 Merge branch irq/gpio-immutable into irq/irqchip-next
* irq/gpio-immutable:
  : .
  : First try at preventing the GPIO subsystem from abusing irq_chip
  : data structures. The general idea is to have an irq_chip flag
  : to tell the GPIO subsystem that these structures are immutable,
  : and to convert drivers one by one.
  : .
  Documentation: Update the recommended pattern for GPIO irqchips
  gpio: Update TODO to mention immutable irq_chip structures
  pinctrl: amd: Make the irqchip immutable
  pinctrl: msmgpio: Make the irqchip immutable
  pinctrl: apple-gpio: Make the irqchip immutable
  gpio: pl061: Make the irqchip immutable
  gpio: tegra186: Make the irqchip immutable
  gpio: Add helpers to ease the transition towards immutable irq_chip
  gpio: Expose the gpiochip_irq_re[ql]res helpers
  gpio: Don't fiddle with irqchips marked as immutable

Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-04-19 15:23:14 +01:00
Marc Zyngier afefc32662 gpio: Update TODO to mention immutable irq_chip structures
5 drivers are converted, a few hundred to go. Definitely worth of
a TODO entry, in the hope that someone will notice it and do
a bulk update.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220419141846.598305-10-maz@kernel.org
2022-04-19 15:22:26 +01:00
Marc Zyngier 15d8c14ac8 gpio: pl061: Make the irqchip immutable
Prevent gpiolib from messing with the irqchip by advertising
the irq_chip structure as immutable, making it const, and adding
the various calls that gpiolib relies upon.

Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220419141846.598305-6-maz@kernel.org
2022-04-19 15:22:26 +01:00
Marc Zyngier bba00555ed gpio: tegra186: Make the irqchip immutable
Prevent gpiolib from messing with the irqchip by advertising
the irq_chip structure as immutable, making it const, and adding
the various calls that gpiolib relies upon.

Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220419141846.598305-5-maz@kernel.org
2022-04-19 15:22:26 +01:00
Marc Zyngier 704f08753b gpio: Expose the gpiochip_irq_re[ql]res helpers
The GPIO subsystem has a couple of internal helpers to manage
resources on behalf of the irqchip. Expose them so that GPIO
drivers can use them directly.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220419141846.598305-3-maz@kernel.org
2022-04-19 15:22:25 +01:00
Marc Zyngier 6c846d026d gpio: Don't fiddle with irqchips marked as immutable
In order to move away from gpiolib messing with the internals of
unsuspecting irqchips, add a flag by which irqchips advertise
that they are not to be messed with, and do solemnly swear that
they correctly call into the gpiolib helpers when required.

Also nudge the users into converting their drivers to the
new model.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220419141846.598305-2-maz@kernel.org
2022-04-19 15:22:25 +01:00
Linus Walleij 4f3e79b36d gpio: ixp4xx: Detect special machines by compatible
There are some special clock amendments for two machines
formerly detected by their machine_is() boardfile macro.

They are now migrated to device tree so use
of_machine_is_compatible() instead.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-18 21:42:05 +02:00
Bartosz Golaszewski 0ebb4fbe31 intel-gpio for v5.18-2
* Couple of fixes related to handling unsigned value of the pin from ACPI
 
 The following is an automated git shortlog grouped by driver:
 
 gpiolib:
  -  acpi: Convert type for pin to be unsigned
  -  acpi: use correct format characters
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Merge tag 'intel-gpio-v5.18-2' of gitolite.kernel.org:pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-current

intel-gpio for v5.18-2

* Couple of fixes related to handling unsigned value of the pin from ACPI

gpiolib:
 -  acpi: Convert type for pin to be unsigned
 -  acpi: use correct format characters
2022-04-16 21:57:00 +02:00
Bartosz Golaszewski 3836c73e6a gpio: sim: fix setting and getting multiple lines
We need to take mask into account in the set/get_multiple() callbacks.
Use bitmap_replace() instead of bitmap_copy().

Fixes: cb8c474e79 ("gpio: sim: new testing module")
Cc: stable@vger.kernel.org
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-04-14 10:29:20 +02:00
Sander Vanheule d3bf3dc4bb gpio: realtek-otto: Add RTL931x support
The RTL931x SoC series has support for 32 GPIOs, although not all lines
may be broken out to a physical pad.

The GPIO bank's parent interrupt can be routed to either or both of the
SoC's CPU cores by the GIC. Line-by-line IRQ balancing is not possible
on these SoCs.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-11 14:30:31 +02:00
Sander Vanheule deaf1cecde gpio: realtek-otto: Add RTL930x support
The RTL930x SoC series has support for 24 GPIOs, with the port order
reversed compared to RTL838x and RTL839x. The RTL930x series also has
two CPUs (VPEs) and can distribute individual GPIO interrupts between
them.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-11 14:29:57 +02:00
Sander Vanheule 95fa6dbe58 gpio: realtek-otto: Support per-cpu interrupts
On SoCs with multiple cores, it is possible that the GPIO interrupt
controller supports assigning specific pins to one or more cores.

IRQ balancing can be performed on a line-by-line basis if the parent
interrupt is routed to all available cores, which is the default upon
initialisation.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-11 14:27:58 +02:00
Sander Vanheule 512c5be352 gpio: realtek-otto: Support reversed port layouts
The GPIO port layout on the RTL930x SoC series is reversed compared to
the RTL838x and RTL839x SoC series. Add new port offset calculator
functions to ensure the correct order is used when reading port IRQ
data, and ensure bgpio uses the right byte ordering.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-11 12:58:07 +02:00
Andy Shevchenko 234c52097c gpiolib: Extract gpio_chip_get_value() wrapper
In couple of cases we are using the same code to wrap ->get() callback.
Extract that code into a helper for the sake of better maintenance.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-09 22:39:03 +02:00
Andy Shevchenko 3de69ae1c4 gpiolib: Refactor gpiolib_dbg_show() with help of for_each_gpio_desc()
Use for_each_gpio_desc() and since we would need to touch the entire
conditionals, do the following:
- rename last occurrence of gdesc to desc
- use short ternary operator ?:
- join two seq_printf() calls into single one
- fix indentation of the seq_printf() parameters

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-09 22:38:43 +02:00
Andy Shevchenko 66f46e370a gpiolib: Split out for_each_gpio_desc() macro
In some cases we want to traverse all GPIO descriptors for given
chip, let's split out for_each_gpio_desc() macro for such cases.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-09 22:38:17 +02:00
Andy Shevchenko 57017edd46 gpiolib: Embed iterator variable into for_each_gpio_desc_with_flag()
The iterator loop is used exclusively to get a descriptor, which in its
turn is what is being used by the caller. Embed the iterator variable
into the loop in the for_each_gpio_desc_with_flag() macro helper.

Suggested-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-09 22:37:48 +02:00
Andy Shevchenko 24a9dbb1c1 gpiolib: Move error message out of a spinlock
An error path is a slow path, no need to block other CPUs
when printing error messages.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-09 22:36:03 +02:00
Andy Shevchenko 0c2cae09a7 gpiolib: acpi: Convert type for pin to be unsigned
A pin that comes from ACPI tables is of unsigned type. This also applies
to the internal APIs which use unsigned int to store the pin. Convert
type for pin to be unsigned in the places where it's not yet true.

While at it, add a stub for acpi_get_and_request_gpiod() for the sake
of consistency in the APIs.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-04-08 15:13:22 +03:00
Linus Torvalds 213d266ebf gpiolib: acpi: use correct format characters
When compiling with -Wformat, clang emits the following warning:

  gpiolib-acpi.c:393:4: warning: format specifies type 'unsigned char' but the argument has type 'int' [-Wformat]
                        pin);
                        ^~~

So warning that '%hhX' is paired with an 'int' is all just completely
mindless and wrong. Sadly, I can see a different bogus warning reason
why people would want to use '%02hhX'.

Again, the *sane* thing from a human perspective is to use '%02X. But
if the compiler doesn't do any range analysis at all, it could decide
that "Oh, that print format could need up to 8 bytes of space in the
result". Using '%02hhX' would cut that down to two.

And since we use

        char ev_name[5];

and currently use "_%c%02hhX" as the format string, even a compiler
that doesn't notice that "pin <= 255" test that guards this all will
go "OK, that's at most 4 bytes and the final NUL termination, so it's
fine".

While a compiler - like gcc - that only sees that the original source
of the 'pin' value is a 'unsigned short' array, and then doesn't take
the "pin <= 255" into account, will warn like this:

  gpiolib-acpi.c: In function 'acpi_gpiochip_request_interrupt':
  gpiolib-acpi.c:206:24: warning: '%02X' directive writing between 2 and 4 bytes into a region of size 3 [-Wformat-overflow=]
       sprintf(ev_name, "_%c%02X",
                            ^~~~
  gpiolib-acpi.c:206:20: note: directive argument in the range [0, 65535]

because gcc isn't being very good at that argument range analysis either.

In other words, the original use of 'hhx' was bogus to begin with, and
due to *another* compiler warning being bad, and we had that bad code
being written back in 2016 to work around _that_ compiler warning
(commit e40a3ae1f7: "gpio: acpi: work around false-positive
-Wstring-overflow warning").

Sadly, two different bad compiler warnings together does not make for
one good one.

It just makes for even more pain.

End result: I think the simplest and cleanest option is simply the
proposed change which undoes that '%hhX' change for gcc, and replaces
it with just using a slightly bigger stack allocation. It's not like
a 5-byte allocation is in any way likely to have saved any actual stack,
since all the other variables in that function are 'int' or bigger.

False-positive compiler warnings really do make people write worse
code, and that's a problem. But on a scale of bad code, I feel that
extending the buffer trivially is better than adding a pointless cast
that literally makes no sense.

At least in this case the end result isn't unreadable or buggy. We've
had several cases of bad compiler warnings that caused changes that
were actually horrendously wrong.

Fixes: e40a3ae1f7 ("gpio: acpi: work around false-positive -Wstring-overflow warning")
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-04-08 15:11:44 +03:00
Geert Uytterhoeven 43ebbb92e4 gpio: rcar: Add R-Car Gen4 support
R-Car V3U (R8A779A0) was the first member of the R-Car Gen4 family.
Generalize the support for R-Car V3U to other SoCs in the R-Car Gen4
family by adding a family-specific compatible value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-05 15:10:00 +02:00
Andy Shevchenko 1cef8b5019 gpiolib: Get rid of redundant 'else'
In the snippets like the following

	if (...)
		return / goto / break / continue ...;
	else
		...

the 'else' is redundant. Get rid of it. In case of IOCTLs use
switch-case pattern that seems the usual in such cases.

While at it, clarify necessity of else in gpiod_direction_output()
by attaching else if to the closing curly brace on a previous line.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-05 14:20:07 +02:00
Shreeya Patel 5467801f1f gpio: Restrict usage of GPIO chip irq members before initialization
GPIO chip irq members are exposed before they could be completely
initialized and this leads to race conditions.

One such issue was observed for the gc->irq.domain variable which
was accessed through the I2C interface in gpiochip_to_irq() before
it could be initialized by gpiochip_add_irqchip(). This resulted in
Kernel NULL pointer dereference.

Following are the logs for reference :-

kernel: Call Trace:
kernel:  gpiod_to_irq+0x53/0x70
kernel:  acpi_dev_gpio_irq_get_by+0x113/0x1f0
kernel:  i2c_acpi_get_irq+0xc0/0xd0
kernel:  i2c_device_probe+0x28a/0x2a0
kernel:  really_probe+0xf2/0x460
kernel: RIP: 0010:gpiochip_to_irq+0x47/0xc0

To avoid such scenarios, restrict usage of GPIO chip irq members before
they are completely initialized.

Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
Cc: stable@vger.kernel.org
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-04 14:41:34 +02:00
Linus Torvalds 26803bac2b gpio fixes for v5.18-rc1
- grammar and formatting fixes in comments for gpio-ts4900
 - correct links in gpio-ts5500
 - fix a warning in doc generation for the core GPIO documentation
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Merge tag 'gpio-fixes-for-v5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio fixes from Bartosz Golaszewski:

 - grammar and formatting fixes in comments for gpio-ts4900

 - correct links in gpio-ts5500

 - fix a warning in doc generation for the core GPIO documentation

* tag 'gpio-fixes-for-v5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpio: ts5500: Fix Links to Technologic Systems web resources
  gpio: Properly document parent data union
  gpio: ts4900: Fix comment formatting and grammar
2022-04-01 10:26:09 -07:00
Kris Bahnsen 24f71ae544 gpio: ts5500: Fix Links to Technologic Systems web resources
Technologic Systems has rebranded as embeddedTS with the current
domain eventually going offline. Update web/doc URLs to correct
resource locations.

Signed-off-by: Kris Bahnsen <kris@embeddedTS.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-31 16:44:57 +02:00
Kris Bahnsen 576892a84f gpio: ts4900: Fix comment formatting and grammar
The issues were pointed out after the prior commit was applied.

Signed-off-by: Kris Bahnsen <kris@embeddedTS.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-31 16:24:03 +02:00
Linus Torvalds 02e2af20f4 Char/Misc and other driver updates for 5.18-rc1
Here is the big set of char/misc and other small driver subsystem
 updates for 5.18-rc1.
 
 Included in here are merges from driver subsystems which contain:
 	- iio driver updates and new drivers
 	- fsi driver updates
 	- fpga driver updates
 	- habanalabs driver updates and support for new hardware
 	- soundwire driver updates and new drivers
 	- phy driver updates and new drivers
 	- coresight driver updates
 	- icc driver updates
 
 Individual changes include:
 	- mei driver updates
 	- interconnect driver updates
 	- new PECI driver subsystem added
 	- vmci driver updates
 	- lots of tiny misc/char driver updates
 
 There will be two merge conflicts with your tree, one in MAINTAINERS
 which is obvious to fix up, and one in drivers/phy/freescale/Kconfig
 which also should be easy to resolve.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  updates for 5.18-rc1.

  Included in here are merges from driver subsystems which contain:

   - iio driver updates and new drivers

   - fsi driver updates

   - fpga driver updates

   - habanalabs driver updates and support for new hardware

   - soundwire driver updates and new drivers

   - phy driver updates and new drivers

   - coresight driver updates

   - icc driver updates

  Individual changes include:

   - mei driver updates

   - interconnect driver updates

   - new PECI driver subsystem added

   - vmci driver updates

   - lots of tiny misc/char driver updates

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits)
  firmware: google: Properly state IOMEM dependency
  kgdbts: fix return value of __setup handler
  firmware: sysfb: fix platform-device leak in error path
  firmware: stratix10-svc: add missing callback parameter on RSU
  arm64: dts: qcom: add non-secure domain property to fastrpc nodes
  misc: fastrpc: Add dma handle implementation
  misc: fastrpc: Add fdlist implementation
  misc: fastrpc: Add helper function to get list and page
  misc: fastrpc: Add support to secure memory map
  dt-bindings: misc: add fastrpc domain vmid property
  misc: fastrpc: check before loading process to the DSP
  misc: fastrpc: add secure domain support
  dt-bindings: misc: add property to support non-secure DSP
  misc: fastrpc: Add support to get DSP capabilities
  misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP
  misc: fastrpc: separate fastrpc device from channel context
  dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells
  dt-bindings: nvmem: make "reg" property optional
  nvmem: brcm_nvram: parse NVRAM content into NVMEM cells
  nvmem: dt-bindings: Fix the error of dt-bindings check
  ...
2022-03-28 12:27:35 -07:00
Linus Torvalds ebcb577aee gpio updates for v5.18-rc1
- new driver: gpio-en7523
 - dt-bindings: convertion of faraday,ftgpio010 to YAML, new compatible string
   in gpio-vf610 and a bugfix in an example
 - gpiolib core: several improvements and some code shrink
 - documentation: convert all public docs into kerneldoc format
 - set IRQ bus token in gpio-crystalcove (addresses a debugfs issue)
 - add a missing return value check for kstrdup() in gpio-merrifield
 - allow gpio-tps68470 to be built as module
 - more work on limiting usage of of_node in GPIO drivers
 - several sysfs interface improvements
 - use SDPX in gpio-ts4900
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Merge tag 'gpio-updates-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "Relatively few updates for this release cycle. We have a single new
  driver and some minor changes in drivers, more work on limiting the
  usage of of_node in drivers and DT updates:

   - new driver: gpio-en7523

   - dt-bindings: convertion of faraday,ftgpio010 to YAML, new
     compatible string in gpio-vf610 and a bugfix in an example

   - gpiolib core: several improvements and some code shrink

   - documentation: convert all public docs into kerneldoc format

   - set IRQ bus token in gpio-crystalcove (addresses a debugfs issue)

   - add a missing return value check for kstrdup() in gpio-merrifield

   - allow gpio-tps68470 to be built as module

   - more work on limiting usage of of_node in GPIO drivers

   - several sysfs interface improvements

   - use SDPX in gpio-ts4900"

* tag 'gpio-updates-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpio: ts4900: Use SPDX header
  gpiolib: Use list_first_entry()/list_last_entry()
  gpiolib: sysfs: Simplify edge handling in the code
  gpiolib: sysfs: Move kstrtox() calls outside of the mutex lock
  gpiolib: sysfs: Move sysfs_emit() calls outside of the mutex lock
  gpiolib: make struct comments into real kernel docs
  dt-bindings: gpio: convert faraday,ftgpio01 to yaml
  dt-bindings: gpio: gpio-vf610: Add imx93 compatible string
  gpiolib: Simplify error path in gpiod_get_index() when requesting GPIO
  gpiolib: Use short form of ternary operator in gpiod_get_index()
  gpiolib: Introduce for_each_gpio_desc_with_flag() macro
  gpio: Add support for Airoha EN7523 GPIO controller
  dt-bindings: arm: airoha: Add binding for Airoha GPIO controller
  dt-bindings: gpio: fix gpio-hog example
  gpio: tps68470: Allow building as module
  gpio: tegra: Get rid of duplicate of_node assignment
  gpio: altera-a10sr: Switch to use fwnode instead of of_node
  gpio: merrifield: check the return value of devm_kstrdup()
  gpio: crystalcove: Set IRQ domain bus token to DOMAIN_BUS_WIRED
2022-03-25 12:28:23 -07:00
Linus Torvalds ad9c6ee642 spi: Updates for v5.18
The overwhelming bulk of this pull request is a change from Uwe
 Kleine-König which changes the return type of the remove() function to
 void as part of some wider work he's doing to do this for all bus types,
 causing updates to most SPI device drivers.  The branch with that on has
 been cross merged with a couple of other trees which added new SPI
 drivers this cycle, I'm not expecting any build issues resulting from
 the change.
 
 Otherwise it's been a relatively quiet release with some new device
 support, a few minor features and the welcome completion of the
 conversion of the subsystem to use GPIO descriptors rather than numbers:
 
  - Change return type of remove() to void.
  - Completion of the conversion of SPI controller drivers to use GPIO
    descriptors rather than numbers.
  - Quite a few DT schema conversions.
  - Support for multiple SPI devices on a bus in ACPI systems.
  - Big overhaul of the PXA2xx SPI driver.
  - Support for AMD AMDI0062, Intel Raptor Lake, Mediatek MT7986 and
    MT8186, nVidia Tegra210 and Tegra234, Renesas RZ/V2L, Tesla FSD and
    Sunplus SP7021.
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Merge tag 'spi-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "The overwhelming bulk of this pull request is a change from Uwe
  Kleine-König which changes the return type of the remove() function to
  void as part of some wider work he's doing to do this for all bus
  types, causing updates to most SPI device drivers. The branch with
  that on has been cross merged with a couple of other trees which added
  new SPI drivers this cycle, I'm not expecting any build issues
  resulting from the change.

  Otherwise it's been a relatively quiet release with some new device
  support, a few minor features and the welcome completion of the
  conversion of the subsystem to use GPIO descriptors rather than
  numbers:

   - Change return type of remove() to void.

   - Completion of the conversion of SPI controller drivers to use GPIO
     descriptors rather than numbers.

   - Quite a few DT schema conversions.

   - Support for multiple SPI devices on a bus in ACPI systems.

   - Big overhaul of the PXA2xx SPI driver.

   - Support for AMD AMDI0062, Intel Raptor Lake, Mediatek MT7986 and
     MT8186, nVidia Tegra210 and Tegra234, Renesas RZ/V2L, Tesla FSD and
     Sunplus SP7021"

[ And this is obviously where that spi change that snuck into the
  regulator tree _should_ have been :^]

* tag 'spi-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (124 commits)
  spi: fsi: Implement a timeout for polling status
  spi: Fix erroneous sgs value with min_t()
  spi: tegra20: Use of_device_get_match_data()
  spi: mediatek: add ipm design support for MT7986
  spi: Add compatible for MT7986
  spi: sun4i: fix typos in comments
  spi: mediatek: support tick_delay without enhance_timing
  spi: Update clock-names property for arm pl022
  spi: rockchip-sfc: fix platform_get_irq.cocci warning
  spi: s3c64xx: Add spi port configuration for Tesla FSD SoC
  spi: dt-bindings: samsung: Add fsd spi compatible
  spi: topcliff-pch: Prevent usage of potentially stale DMA device
  spi: tegra210-quad: combined sequence mode
  spi: tegra210-quad: add acpi support
  spi: npcm-fiu: Fix typo ("npxm")
  spi: Fix Tegra QSPI example
  spi: qup: replace spin_lock_irqsave by spin_lock in hard IRQ
  spi: cadence: fix platform_get_irq.cocci warning
  spi: Update NXP Flexspi maintainer details
  dt-bindings: mfd: maxim,max77802: Convert to dtschema
  ...
2022-03-21 18:33:57 -07:00
Linus Torvalds 93287e28bc Updates for the interrupt subsystem:
Core code:
 
    - Provide generic_handle_irq_safe() which can be invoked from any
      context (hard interrupt or threaded). This allows to remove ugly
      workarounds in drivers all over the place.
 
    - Use generic_handle_irq_safe() in the affected drivers.
 
    - The usual cleanups and improvements.
 
  Interrupt chip drivers:
 
    - Support for new interrupt chips or not yet supported variants:
      STM32MP14, Meson GPIO, Apple M1 PMU, Apple M1 AICv2, Qualcomm MPM
 
    - Convert the Xilinx driver to generic interrupt domains
 
    - Cleanup the irq_chip::name handling
 
    - The usual cleanups and improvements all over the place
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Merge tag 'irq-core-2022-03-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull interrupt updates from Thomas Gleixner:
 "Core code:

   - Provide generic_handle_irq_safe() which can be invoked from any
     context (hard interrupt or threaded). This allows to remove ugly
     workarounds in drivers all over the place.

   - Use generic_handle_irq_safe() in the affected drivers.

   - The usual cleanups and improvements.

  Interrupt chip drivers:

   - Support for new interrupt chips or not yet supported variants:
     STM32MP14, Meson GPIO, Apple M1 PMU, Apple M1 AICv2, Qualcomm MPM

   - Convert the Xilinx driver to generic interrupt domains

   - Cleanup the irq_chip::name handling

   - The usual cleanups and improvements all over the place"

* tag 'irq-core-2022-03-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (52 commits)
  irqchip: Add Qualcomm MPM controller driver
  dt-bindings: interrupt-controller: Add Qualcomm MPM support
  irqchip/apple-aic: Add support for AICv2
  irqchip/apple-aic: Support multiple dies
  irqchip/apple-aic: Dynamically compute register offsets
  irqchip/apple-aic: Switch to irq_domain_create_tree and sparse hwirqs
  irqchip/apple-aic: Add Fast IPI support
  dt-bindings: interrupt-controller: apple,aic2: New binding for AICv2
  PCI: apple: Change MSI handling to handle 4-cell AIC fwspec form
  irqchip/apple-aic: Fix cpumask allocation for FIQs
  irqchip/meson-gpio: Add support for meson s4 SoCs
  irqchip/meson-gpio: add select trigger type callback
  irqchip/meson-gpio: support more than 8 channels gpio irq
  dt-bindings: interrupt-controller: New binding for Meson-S4 SoCs
  irqchip/xilinx: Switch to GENERIC_IRQ_MULTI_HANDLER
  staging: greybus: gpio: Use generic_handle_irq_safe().
  net: usb: lan78xx: Use generic_handle_irq_safe().
  mfd: ezx-pcap: Use generic_handle_irq_safe().
  misc: hi6421-spmi-pmic: Use generic_handle_irq_safe().
  irqchip/sifive-plic: Disable S-mode IRQs if running in M-mode
  ...
2022-03-21 13:03:00 -07:00
Bartosz Golaszewski 56e337f2cf Revert "gpio: Revert regression in sysfs-gpio (gpiolib.c)"
This reverts commit fc328a7d1f.

This commit - while attempting to fix a regression - has caused a number
of other problems. As the fallout from it is more significant than the
initial problem itself, revert it for now before we find a correct
solution.

Link: https://lore.kernel.org/all/20220314192522.GA3031157@roeck-us.net/
Link: https://lore.kernel.org/stable/20220314155509.552218-1-michael@walle.cc/
Link: https://lore.kernel.org/all/20211217153555.9413-1-marcelo.jimenez@gmail.com/
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reported-and-bisected-by: Guenter Roeck <linux@roeck-us.net>
Reported-by: Michael Walle <michael@walle.cc>
Cc: Thorsten Leemhuis <linux@leemhuis.info>
Cc: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2022-03-15 09:59:08 -07:00
Ingo Molnar 411472ae5b Linux 5.17-rc8
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Merge tag 'v5.17-rc8' into irq/core, to fix conflicts

Conflicts:
	drivers/pinctrl/pinctrl-starfive.c

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2022-03-14 18:53:00 +01:00
Thomas Gleixner f0fae8a0ed irqchip updates for 5.18
- Add support for the STM32MP13 variant
 
 - Move parent device away from struct irq_chip
 
 - Remove all instances of non-const strings assigned to
   struct irq_chip::name, enabling a nice cleanup for VIC and GIC)
 
 - Simplify the Qualcomm PDC driver
 
 - A bunch of SiFive PLIC cleanups
 
 - Add support for a new variant of the Meson GPIO block
 
 - Add support for the irqchip side of the Apple M1 PMU
 
 - Add support for the Apple M1 Pro/Max AICv2 irqchip
 
 - Add support for the Qualcomm MPM wakeup gadget
 
 - Move the Xilinx driver over to the generic irqdomain handling
 
 - Tiny speedup for IPIs on GICv3 systems
 
 - The usual odd cleanups
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Merge tag 'irqchip-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates from Marc Zyngier:

  - Add support for the STM32MP13 variant

  - Move parent device away from struct irq_chip

  - Remove all instances of non-const strings assigned to
    struct irq_chip::name, enabling a nice cleanup for VIC and GIC)

  - Simplify the Qualcomm PDC driver

  - A bunch of SiFive PLIC cleanups

  - Add support for a new variant of the Meson GPIO block

  - Add support for the irqchip side of the Apple M1 PMU

  - Add support for the Apple M1 Pro/Max AICv2 irqchip

  - Add support for the Qualcomm MPM wakeup gadget

  - Move the Xilinx driver over to the generic irqdomain handling

  - Tiny speedup for IPIs on GICv3 systems

  - The usual odd cleanups

Link: https://lore.kernel.org/all/20220313105142.704579-1-maz@kernel.org
2022-03-14 10:23:22 +01:00
Kris Bahnsen 87ba5badc5 gpio: ts4900: Use SPDX header
Remove boilerplate, use the SPDX license identifier.

Signed-off-by: Kris Bahnsen <kris@embeddedTS.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-10 10:05:39 +01:00
Bartosz Golaszewski 55d01c98a8 gpio: sim: fix a typo
Just noticed this when applying Andy's patch. s/childred/children/

Fixes: cb8c474e79 ("gpio: sim: new testing module")
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-03-10 10:02:19 +01:00
Mark Featherston 03fe003547 gpio: ts4900: Do not set DAT and OE together
This works around an issue with the hardware where both OE and
DAT are exposed in the same register. If both are updated
simultaneously, the harware makes no guarantees that OE or DAT
will actually change in any given order and may result in a
glitch of a few ns on a GPIO pin when changing direction and value
in a single write.

Setting direction to input now only affects OE bit. Setting
direction to output updates DAT first, then OE.

Fixes: 9c6686322d ("gpio: add Technologic I2C-FPGA gpio support")
Signed-off-by: Mark Featherston <mark@embeddedTS.com>
Signed-off-by: Kris Bahnsen <kris@embeddedTS.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-10 10:00:27 +01:00
Andy Shevchenko 243cfa6a67 gpiolib: Use list_first_entry()/list_last_entry()
Use list_first_entry()/list_last_entry() instead of open coded variants.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-08 09:52:57 +01:00
Andy Shevchenko a9a5b720dc gpio: sim: Declare gpio_sim_hog_config_item_ops static
Compiler is not happy:

  warning: symbol 'gpio_sim_hog_config_item_ops' was not declared. Should it be static?

Fixes: cb8c474e79 ("gpio: sim: new testing module")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-08 09:41:21 +01:00
Andy Shevchenko 660c619b9d gpiolib: acpi: Convert ACPI value of debounce to microseconds
It appears that GPIO ACPI library uses ACPI debounce values directly.
However, the GPIO library APIs expect the debounce timeout to be in
microseconds.

Convert ACPI value of debounce to microseconds.

While at it, document this detail where it is appropriate.

BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=215664
Reported-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Fixes: 8dcb7a15a5 ("gpiolib: acpi: Take into account debounce settings")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-07 15:25:27 +01:00
Marcelo Roberto Jimenez fc328a7d1f gpio: Revert regression in sysfs-gpio (gpiolib.c)
Some GPIO lines have stopped working after the patch
commit 2ab73c6d83 ("gpio: Support GPIO controllers without pin-ranges")

And this has supposedly been fixed in the following patches
commit 89ad556b7f ("gpio: Avoid using pin ranges with !PINCTRL")
commit 6dbbf84603 ("gpiolib: Don't free if pin ranges are not defined")

But an erratic behavior where some GPIO lines work while others do not work
has been introduced.

This patch reverts those changes so that the sysfs-gpio interface works
properly again.

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-07 15:25:27 +01:00
Akhil R 5f84e73f9a gpio: tegra186: Add IRQ per bank for Tegra241
Add the number of interrupts per bank for Tegra241 (Grace) to
fix the probe failure.

Fixes: d1056b771d ("gpio: tegra186: Add support for Tegra241")
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-07 15:25:27 +01:00
Bartosz Golaszewski 37db988c36 intel-gpio for v5.18-1
* Set IRQ bus token in gpio-crystalcove to avoid debugfs error
 * Check return value of kstrdup() in gpio-merrifield to error out earlier
 * Clean up couple of drivers from unneeded of_node usage
 * Allow gpio-tps68470 to be built as module to reduce memory foot print
 
 The following is an automated git shortlog grouped by driver:
 
 altera-a10sr:
  -  Switch to use fwnode instead of of_node
 
 crystalcove:
  -  Set IRQ domain bus token to DOMAIN_BUS_WIRED
 
 merrifield:
  -  check the return value of devm_kstrdup()
 
 tegra:
  -  Get rid of duplicate of_node assignment
 
 tps68470:
  -  Allow building as module
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Merge tag 'intel-gpio-v5.18-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-next

intel-gpio for v5.18-1

* Set IRQ bus token in gpio-crystalcove to avoid debugfs error
* Check return value of kstrdup() in gpio-merrifield to error out earlier
* Clean up couple of drivers from unneeded of_node usage
* Allow gpio-tps68470 to be built as module to reduce memory foot print
2022-03-01 16:52:26 +01:00
Greg Kroah-Hartman 085686fb84 Merge 5.17-rc6 into char-misc-next
We need the char-misc fixes in here.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-28 07:30:32 +01:00
Linus Torvalds 6676ba2a6d Pin control fixes for the v5.17 series:
- Fix some drive strength and pull-up code in the K210 driver.
 
 - Add the Alder Lake-M ACPI ID so it starts to work properly.
 
 - Use a static name for the StarFive GPIO irq_chip, forestalling
   an upcoming fixes series from Marc Zyngier.
 
 - Fix an ages old bug in the Tegra 186 driver where we were
   indexing at random into struct and being lucky getting the
   right member.
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Merge tag 'pinctrl-v5-17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:

 - Fix some drive strength and pull-up code in the K210 driver.

 - Add the Alder Lake-M ACPI ID so it starts to work properly.

 - Use a static name for the StarFive GPIO irq_chip, forestalling an
   upcoming fixes series from Marc Zyngier.

 - Fix an ages old bug in the Tegra 186 driver where we were indexing at
   random into struct and being lucky getting the right member.

* tag 'pinctrl-v5-17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  gpio: tegra186: Fix chip_data type confusion
  pinctrl: starfive: Use a static name for the GPIO irq_chip
  pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID"
  pinctrl: k210: Fix bias-pull-up
  pinctrl: fix loop in k210_pinconf_get_drive()
2022-02-27 12:30:54 -08:00
Robert Marko b3dcb5de62 gpio: Add Delta TN48M CPLD GPIO driver
Delta TN48M switch has an onboard Lattice CPLD that is used as a GPIO
expander.

The CPLD provides 12 pins in total on the TN48M, but on more advanced
switch models it provides up to 192 pins, so the driver is extendable
to support more switches.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20220131133049.77780-3-robert.marko@sartura.hr
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-25 09:59:35 +01:00
Shreeya Patel ae42f92888 gpio: Return EPROBE_DEFER if gc->to_irq is NULL
We are racing the registering of .to_irq when probing the
i2c driver. This results in random failure of touchscreen
devices.

Following explains the race condition better.

[gpio driver] gpio driver registers gpio chip
[gpio consumer] gpio is acquired
[gpio consumer] gpiod_to_irq() fails with -ENXIO
[gpio driver] gpio driver registers irqchip
gpiod_to_irq works at this point, but -ENXIO is fatal

We could see the following errors in dmesg logs when gc->to_irq is NULL

[2.101857] i2c_hid i2c-FTS3528:00: HID over i2c has not been provided an Int IRQ
[2.101953] i2c_hid: probe of i2c-FTS3528:00 failed with error -22

To avoid this situation, defer probing until to_irq is registered.
Returning -EPROBE_DEFER would be the first step towards avoiding
the failure of devices due to the race in registration of .to_irq.
Final solution to this issue would be to avoid using gc irq members
until they are fully initialized.

This issue has been reported many times in past and people have been
using workarounds like changing the pinctrl_amd to built-in instead
of loading it as a module or by adding a softdep for pinctrl_amd into
the config file.

BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=209413
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-02-23 22:30:56 +01:00
Marc Zyngier d1e972ace4 gpio: tegra186: Fix chip_data type confusion
The tegra186 GPIO driver makes the assumption that the pointer
returned by irq_data_get_irq_chip_data() is a pointer to a
tegra_gpio structure. Unfortunately, it is actually a pointer
to the inner gpio_chip structure, as mandated by the gpiolib
infrastructure. Nice try.

The saving grace is that the gpio_chip is the first member of
tegra_gpio, so the bug has gone undetected since... forever.

Fix it by performing a container_of() on the pointer. This results
in no additional code, and makes it possible to understand how
the whole thing works.

Fixes: 5b2b135a87 ("gpio: Add Tegra186 support")
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Link: https://lore.kernel.org/r/20220211093904.1112679-1-maz@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-19 01:51:24 +01:00