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net: altera: tse: convert to phylink
Convert the Altera Triple Speed Ethernet Controller to phylink. This controller supports MII, GMII and RGMII with its MAC, and SGMII + 1000BaseX through a small embedded PCS. The PCS itself has a register set very similar to what is found in a typical 802.3 ethernet PHY, but this register set memory-mapped instead of lying on an mdio bus. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Maxime Chevallier
David S. Miller
parent
4a502cf4d7
commit
fef2998203
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@ -3,6 +3,8 @@ config ALTERA_TSE
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tristate "Altera Triple-Speed Ethernet MAC support"
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depends on HAS_DMA
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select PHYLIB
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select PHYLINK
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select PCS_ALTERA_TSE
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help
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This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
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@ -27,6 +27,7 @@
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#include <linux/list.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <linux/phylink.h>
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#define ALTERA_TSE_SW_RESET_WATCHDOG_CNTR 10000
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#define ALTERA_TSE_MAC_FIFO_WIDTH 4 /* TX/RX FIFO width in
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@ -109,17 +110,6 @@
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#define MAC_CMDCFG_DISABLE_READ_TIMEOUT_GET(v) GET_BIT_VALUE(v, 27)
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#define MAC_CMDCFG_CNT_RESET_GET(v) GET_BIT_VALUE(v, 31)
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/* SGMII PCS register addresses
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*/
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#define SGMII_PCS_SCRATCH 0x10
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#define SGMII_PCS_REV 0x11
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#define SGMII_PCS_LINK_TIMER_0 0x12
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#define SGMII_PCS_LINK_TIMER_1 0x13
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#define SGMII_PCS_IF_MODE 0x14
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#define SGMII_PCS_DIS_READ_TO 0x15
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#define SGMII_PCS_READ_TO 0x16
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#define SGMII_PCS_SW_RESET_TIMEOUT 100 /* usecs */
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/* MDIO registers within MAC register Space
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*/
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struct altera_tse_mdio {
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@ -423,6 +413,9 @@ struct altera_tse_private {
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void __iomem *tx_dma_csr;
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void __iomem *tx_dma_desc;
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/* SGMII PCS address space */
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void __iomem *pcs_base;
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/* Rx buffers queue */
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struct tse_buffer *rx_ring;
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u32 rx_cons;
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@ -480,6 +473,10 @@ struct altera_tse_private {
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u32 msg_enable;
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struct altera_dmaops *dmaops;
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struct phylink *phylink;
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struct phylink_config phylink_config;
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struct phylink_pcs *pcs;
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};
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/* Function prototypes
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@ -221,6 +221,22 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs,
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buf[i] = csrrd32(priv->mac_dev, i * 4);
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}
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static int tse_ethtool_set_link_ksettings(struct net_device *dev,
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const struct ethtool_link_ksettings *cmd)
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{
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struct altera_tse_private *priv = netdev_priv(dev);
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return phylink_ethtool_ksettings_set(priv->phylink, cmd);
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}
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static int tse_ethtool_get_link_ksettings(struct net_device *dev,
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struct ethtool_link_ksettings *cmd)
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{
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struct altera_tse_private *priv = netdev_priv(dev);
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return phylink_ethtool_ksettings_get(priv->phylink, cmd);
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}
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static const struct ethtool_ops tse_ethtool_ops = {
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.get_drvinfo = tse_get_drvinfo,
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.get_regs_len = tse_reglen,
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@ -231,8 +247,8 @@ static const struct ethtool_ops tse_ethtool_ops = {
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.get_ethtool_stats = tse_fill_stats,
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.get_msglevel = tse_get_msglevel,
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.set_msglevel = tse_set_msglevel,
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.get_link_ksettings = phy_ethtool_get_link_ksettings,
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.set_link_ksettings = phy_ethtool_set_link_ksettings,
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.get_link_ksettings = tse_ethtool_get_link_ksettings,
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.set_link_ksettings = tse_ethtool_set_link_ksettings,
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.get_ts_info = ethtool_op_get_ts_info,
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};
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@ -32,6 +32,7 @@
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include <linux/of_platform.h>
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#include <linux/pcs-altera-tse.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/skbuff.h>
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@ -86,27 +87,6 @@ static inline u32 tse_tx_avail(struct altera_tse_private *priv)
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return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1;
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}
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/* PCS Register read/write functions
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*/
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static u16 sgmii_pcs_read(struct altera_tse_private *priv, int regnum)
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{
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return csrrd32(priv->mac_dev,
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tse_csroffs(mdio_phy0) + regnum * 4) & 0xffff;
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}
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static void sgmii_pcs_write(struct altera_tse_private *priv, int regnum,
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u16 value)
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{
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csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4);
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}
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/* Check PCS scratch memory */
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static int sgmii_pcs_scratch_test(struct altera_tse_private *priv, u16 value)
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{
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sgmii_pcs_write(priv, SGMII_PCS_SCRATCH, value);
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return (sgmii_pcs_read(priv, SGMII_PCS_SCRATCH) == value);
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}
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/* MDIO specific functions
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*/
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static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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@ -620,117 +600,6 @@ static netdev_tx_t tse_start_xmit(struct sk_buff *skb, struct net_device *dev)
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return ret;
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}
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/* Called every time the controller might need to be made
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* aware of new link state. The PHY code conveys this
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* information through variables in the phydev structure, and this
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* function converts those variables into the appropriate
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* register values, and can bring down the device if needed.
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*/
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static void altera_tse_adjust_link(struct net_device *dev)
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{
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struct altera_tse_private *priv = netdev_priv(dev);
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struct phy_device *phydev = dev->phydev;
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int new_state = 0;
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/* only change config if there is a link */
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spin_lock(&priv->mac_cfg_lock);
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if (phydev->link) {
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/* Read old config */
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u32 cfg_reg = ioread32(&priv->mac_dev->command_config);
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/* Check duplex */
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if (phydev->duplex != priv->oldduplex) {
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new_state = 1;
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if (!(phydev->duplex))
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cfg_reg |= MAC_CMDCFG_HD_ENA;
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else
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cfg_reg &= ~MAC_CMDCFG_HD_ENA;
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netdev_dbg(priv->dev, "%s: Link duplex = 0x%x\n",
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dev->name, phydev->duplex);
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priv->oldduplex = phydev->duplex;
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}
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/* Check speed */
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if (phydev->speed != priv->oldspeed) {
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new_state = 1;
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switch (phydev->speed) {
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case 1000:
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cfg_reg |= MAC_CMDCFG_ETH_SPEED;
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cfg_reg &= ~MAC_CMDCFG_ENA_10;
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break;
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case 100:
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cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
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cfg_reg &= ~MAC_CMDCFG_ENA_10;
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break;
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case 10:
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cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
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cfg_reg |= MAC_CMDCFG_ENA_10;
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break;
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default:
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if (netif_msg_link(priv))
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netdev_warn(dev, "Speed (%d) is not 10/100/1000!\n",
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phydev->speed);
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break;
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}
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priv->oldspeed = phydev->speed;
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}
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iowrite32(cfg_reg, &priv->mac_dev->command_config);
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if (!priv->oldlink) {
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new_state = 1;
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priv->oldlink = 1;
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}
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} else if (priv->oldlink) {
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new_state = 1;
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priv->oldlink = 0;
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priv->oldspeed = 0;
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priv->oldduplex = -1;
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}
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if (new_state && netif_msg_link(priv))
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phy_print_status(phydev);
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spin_unlock(&priv->mac_cfg_lock);
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}
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static struct phy_device *connect_local_phy(struct net_device *dev)
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{
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struct altera_tse_private *priv = netdev_priv(dev);
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char phy_id_fmt[MII_BUS_ID_SIZE + 3];
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struct phy_device *phydev = NULL;
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if (priv->phy_addr != POLL_PHY) {
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snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
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priv->mdio->id, priv->phy_addr);
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netdev_dbg(dev, "trying to attach to %s\n", phy_id_fmt);
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phydev = phy_connect(dev, phy_id_fmt, &altera_tse_adjust_link,
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priv->phy_iface);
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if (IS_ERR(phydev)) {
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netdev_err(dev, "Could not attach to PHY\n");
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phydev = NULL;
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}
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} else {
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int ret;
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phydev = phy_find_first(priv->mdio);
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if (phydev == NULL) {
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netdev_err(dev, "No PHY found\n");
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return phydev;
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}
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ret = phy_connect_direct(dev, phydev, &altera_tse_adjust_link,
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priv->phy_iface);
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if (ret != 0) {
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netdev_err(dev, "Could not attach to PHY\n");
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phydev = NULL;
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}
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}
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return phydev;
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}
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static int altera_tse_phy_get_addr_mdio_create(struct net_device *dev)
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{
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struct altera_tse_private *priv = netdev_priv(dev);
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@ -769,91 +638,6 @@ static int altera_tse_phy_get_addr_mdio_create(struct net_device *dev)
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return 0;
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}
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/* Initialize driver's PHY state, and attach to the PHY
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*/
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static int init_phy(struct net_device *dev)
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{
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struct altera_tse_private *priv = netdev_priv(dev);
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struct device_node *phynode;
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struct phy_device *phydev;
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bool fixed_link = false;
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int rc = 0;
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/* Avoid init phy in case of no phy present */
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if (!priv->phy_iface)
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return 0;
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priv->oldlink = 0;
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priv->oldspeed = 0;
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priv->oldduplex = -1;
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phynode = of_parse_phandle(priv->device->of_node, "phy-handle", 0);
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if (!phynode) {
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/* check if a fixed-link is defined in device-tree */
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if (of_phy_is_fixed_link(priv->device->of_node)) {
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rc = of_phy_register_fixed_link(priv->device->of_node);
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if (rc < 0) {
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netdev_err(dev, "cannot register fixed PHY\n");
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return rc;
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}
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/* In the case of a fixed PHY, the DT node associated
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* to the PHY is the Ethernet MAC DT node.
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*/
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phynode = of_node_get(priv->device->of_node);
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fixed_link = true;
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netdev_dbg(dev, "fixed-link detected\n");
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phydev = of_phy_connect(dev, phynode,
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&altera_tse_adjust_link,
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0, priv->phy_iface);
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} else {
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netdev_dbg(dev, "no phy-handle found\n");
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if (!priv->mdio) {
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netdev_err(dev, "No phy-handle nor local mdio specified\n");
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return -ENODEV;
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}
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phydev = connect_local_phy(dev);
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}
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} else {
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netdev_dbg(dev, "phy-handle found\n");
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phydev = of_phy_connect(dev, phynode,
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&altera_tse_adjust_link, 0, priv->phy_iface);
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}
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of_node_put(phynode);
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if (!phydev) {
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netdev_err(dev, "Could not find the PHY\n");
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if (fixed_link)
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of_phy_deregister_fixed_link(priv->device->of_node);
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return -ENODEV;
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}
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/* Stop Advertising 1000BASE Capability if interface is not GMII
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*/
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if ((priv->phy_iface == PHY_INTERFACE_MODE_MII) ||
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(priv->phy_iface == PHY_INTERFACE_MODE_RMII))
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phy_set_max_speed(phydev, SPEED_100);
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/* Broken HW is sometimes missing the pull-up resistor on the
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* MDIO line, which results in reads to non-existent devices returning
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* 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
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* device as well. If a fixed-link is used the phy_id is always 0.
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* Note: phydev->phy_id is the result of reading the UID PHY registers.
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*/
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if ((phydev->phy_id == 0) && !fixed_link) {
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netdev_err(dev, "Bad PHY UID 0x%08x\n", phydev->phy_id);
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phy_disconnect(phydev);
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return -ENODEV;
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}
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netdev_dbg(dev, "attached to PHY %d UID 0x%08x Link = %d\n",
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phydev->mdio.addr, phydev->phy_id, phydev->link);
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return 0;
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}
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static void tse_update_mac_addr(struct altera_tse_private *priv, const u8 *addr)
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{
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u32 msb;
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@ -1088,66 +872,6 @@ static void tse_set_rx_mode(struct net_device *dev)
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spin_unlock(&priv->mac_cfg_lock);
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}
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/* Initialise (if necessary) the SGMII PCS component
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*/
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static int init_sgmii_pcs(struct net_device *dev)
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{
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struct altera_tse_private *priv = netdev_priv(dev);
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int n;
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unsigned int tmp_reg = 0;
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if (priv->phy_iface != PHY_INTERFACE_MODE_SGMII)
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return 0; /* Nothing to do, not in SGMII mode */
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/* The TSE SGMII PCS block looks a little like a PHY, it is
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* mapped into the zeroth MDIO space of the MAC and it has
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* ID registers like a PHY would. Sadly this is often
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* configured to zeroes, so don't be surprised if it does
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* show 0x00000000.
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*/
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if (sgmii_pcs_scratch_test(priv, 0x0000) &&
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sgmii_pcs_scratch_test(priv, 0xffff) &&
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sgmii_pcs_scratch_test(priv, 0xa5a5) &&
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sgmii_pcs_scratch_test(priv, 0x5a5a)) {
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netdev_info(dev, "PCS PHY ID: 0x%04x%04x\n",
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sgmii_pcs_read(priv, MII_PHYSID1),
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sgmii_pcs_read(priv, MII_PHYSID2));
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} else {
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netdev_err(dev, "SGMII PCS Scratch memory test failed.\n");
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return -ENOMEM;
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}
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/* Starting on page 5-29 of the MegaCore Function User Guide
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* Set SGMII Link timer to 1.6ms
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*/
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sgmii_pcs_write(priv, SGMII_PCS_LINK_TIMER_0, 0x0D40);
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sgmii_pcs_write(priv, SGMII_PCS_LINK_TIMER_1, 0x03);
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/* Enable SGMII Interface and Enable SGMII Auto Negotiation */
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sgmii_pcs_write(priv, SGMII_PCS_IF_MODE, 0x3);
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/* Enable Autonegotiation */
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tmp_reg = sgmii_pcs_read(priv, MII_BMCR);
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tmp_reg |= (BMCR_SPEED1000 | BMCR_FULLDPLX | BMCR_ANENABLE);
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sgmii_pcs_write(priv, MII_BMCR, tmp_reg);
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/* Reset PCS block */
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tmp_reg |= BMCR_RESET;
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sgmii_pcs_write(priv, MII_BMCR, tmp_reg);
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for (n = 0; n < SGMII_PCS_SW_RESET_TIMEOUT; n++) {
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if (!(sgmii_pcs_read(priv, MII_BMCR) & BMCR_RESET)) {
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netdev_info(dev, "SGMII PCS block initialised OK\n");
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return 0;
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}
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udelay(1);
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}
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/* We failed to reset the block, return a timeout */
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netdev_err(dev, "SGMII PCS block reset failed.\n");
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return -ETIMEDOUT;
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}
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/* Open and initialize the interface
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*/
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static int tse_open(struct net_device *dev)
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@ -1172,14 +896,6 @@ static int tse_open(struct net_device *dev)
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netdev_warn(dev, "TSE revision %x\n", priv->revision);
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spin_lock(&priv->mac_cfg_lock);
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/* no-op if MAC not operating in SGMII mode*/
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ret = init_sgmii_pcs(dev);
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if (ret) {
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netdev_err(dev,
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"Cannot init the SGMII PCS (error: %d)\n", ret);
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spin_unlock(&priv->mac_cfg_lock);
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goto phy_error;
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}
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ret = reset_mac(priv);
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/* Note that reset_mac will fail if the clocks are gated by the PHY
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|
|
@ -1237,8 +953,12 @@ static int tse_open(struct net_device *dev)
|
|||
|
||||
spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
|
||||
|
||||
if (dev->phydev)
|
||||
phy_start(dev->phydev);
|
||||
ret = phylink_of_phy_connect(priv->phylink, priv->device->of_node, 0);
|
||||
if (ret) {
|
||||
netdev_err(dev, "could not connect phylink (%d)\n", ret);
|
||||
goto tx_request_irq_error;
|
||||
}
|
||||
phylink_start(priv->phylink);
|
||||
|
||||
napi_enable(&priv->napi);
|
||||
netif_start_queue(dev);
|
||||
|
|
@ -1269,10 +989,7 @@ static int tse_shutdown(struct net_device *dev)
|
|||
unsigned long int flags;
|
||||
int ret;
|
||||
|
||||
/* Stop the PHY */
|
||||
if (dev->phydev)
|
||||
phy_stop(dev->phydev);
|
||||
|
||||
phylink_stop(priv->phylink);
|
||||
netif_stop_queue(dev);
|
||||
napi_disable(&priv->napi);
|
||||
|
||||
|
|
@ -1318,6 +1035,74 @@ static struct net_device_ops altera_tse_netdev_ops = {
|
|||
.ndo_validate_addr = eth_validate_addr,
|
||||
};
|
||||
|
||||
static void alt_tse_mac_an_restart(struct phylink_config *config)
|
||||
{
|
||||
}
|
||||
|
||||
static void alt_tse_mac_config(struct phylink_config *config, unsigned int mode,
|
||||
const struct phylink_link_state *state)
|
||||
{
|
||||
struct net_device *ndev = to_net_dev(config->dev);
|
||||
struct altera_tse_private *priv = netdev_priv(ndev);
|
||||
|
||||
spin_lock(&priv->mac_cfg_lock);
|
||||
reset_mac(priv);
|
||||
tse_set_mac(priv, true);
|
||||
spin_unlock(&priv->mac_cfg_lock);
|
||||
}
|
||||
|
||||
static void alt_tse_mac_link_down(struct phylink_config *config,
|
||||
unsigned int mode, phy_interface_t interface)
|
||||
{
|
||||
}
|
||||
|
||||
static void alt_tse_mac_link_up(struct phylink_config *config,
|
||||
struct phy_device *phy, unsigned int mode,
|
||||
phy_interface_t interface, int speed,
|
||||
int duplex, bool tx_pause, bool rx_pause)
|
||||
{
|
||||
struct net_device *ndev = to_net_dev(config->dev);
|
||||
struct altera_tse_private *priv = netdev_priv(ndev);
|
||||
u32 ctrl;
|
||||
|
||||
ctrl = csrrd32(priv->mac_dev, tse_csroffs(command_config));
|
||||
ctrl &= ~(MAC_CMDCFG_ENA_10 | MAC_CMDCFG_ETH_SPEED | MAC_CMDCFG_HD_ENA);
|
||||
|
||||
if (duplex == DUPLEX_HALF)
|
||||
ctrl |= MAC_CMDCFG_HD_ENA;
|
||||
|
||||
if (speed == SPEED_1000)
|
||||
ctrl |= MAC_CMDCFG_ETH_SPEED;
|
||||
else if (speed == SPEED_10)
|
||||
ctrl |= MAC_CMDCFG_ENA_10;
|
||||
|
||||
spin_lock(&priv->mac_cfg_lock);
|
||||
csrwr32(ctrl, priv->mac_dev, tse_csroffs(command_config));
|
||||
spin_unlock(&priv->mac_cfg_lock);
|
||||
}
|
||||
|
||||
static struct phylink_pcs *alt_tse_select_pcs(struct phylink_config *config,
|
||||
phy_interface_t interface)
|
||||
{
|
||||
struct net_device *ndev = to_net_dev(config->dev);
|
||||
struct altera_tse_private *priv = netdev_priv(ndev);
|
||||
|
||||
if (interface == PHY_INTERFACE_MODE_SGMII ||
|
||||
interface == PHY_INTERFACE_MODE_1000BASEX)
|
||||
return priv->pcs;
|
||||
else
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static const struct phylink_mac_ops alt_tse_phylink_ops = {
|
||||
.validate = phylink_generic_validate,
|
||||
.mac_an_restart = alt_tse_mac_an_restart,
|
||||
.mac_config = alt_tse_mac_config,
|
||||
.mac_link_down = alt_tse_mac_link_down,
|
||||
.mac_link_up = alt_tse_mac_link_up,
|
||||
.mac_select_pcs = alt_tse_select_pcs,
|
||||
};
|
||||
|
||||
static int request_and_map(struct platform_device *pdev, const char *name,
|
||||
struct resource **res, void __iomem **ptr)
|
||||
{
|
||||
|
|
@ -1355,8 +1140,10 @@ static int altera_tse_probe(struct platform_device *pdev)
|
|||
struct altera_tse_private *priv;
|
||||
struct resource *control_port;
|
||||
struct resource *dma_res;
|
||||
struct resource *pcs_res;
|
||||
struct net_device *ndev;
|
||||
void __iomem *descmap;
|
||||
int pcs_reg_width = 2;
|
||||
int ret = -ENODEV;
|
||||
|
||||
ndev = alloc_etherdev(sizeof(struct altera_tse_private));
|
||||
|
|
@ -1468,6 +1255,17 @@ static int altera_tse_probe(struct platform_device *pdev)
|
|||
if (ret)
|
||||
goto err_free_netdev;
|
||||
|
||||
/* SGMII PCS address space. The location can vary depending on how the
|
||||
* IP is integrated. We can have a resource dedicated to it at a specific
|
||||
* address space, but if it's not the case, we fallback to the mdiophy0
|
||||
* from the MAC's address space
|
||||
*/
|
||||
ret = request_and_map(pdev, "pcs", &pcs_res,
|
||||
&priv->pcs_base);
|
||||
if (ret) {
|
||||
priv->pcs_base = priv->mac_dev + tse_csroffs(mdio_phy0);
|
||||
pcs_reg_width = 4;
|
||||
}
|
||||
|
||||
/* Rx IRQ */
|
||||
priv->rx_irq = platform_get_irq_byname(pdev, "rx_irq");
|
||||
|
|
@ -1591,11 +1389,31 @@ static int altera_tse_probe(struct platform_device *pdev)
|
|||
(unsigned long) control_port->start, priv->rx_irq,
|
||||
priv->tx_irq);
|
||||
|
||||
ret = init_phy(ndev);
|
||||
if (ret != 0) {
|
||||
netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);
|
||||
priv->pcs = alt_tse_pcs_create(ndev, priv->pcs_base, pcs_reg_width);
|
||||
|
||||
priv->phylink_config.dev = &ndev->dev;
|
||||
priv->phylink_config.type = PHYLINK_NETDEV;
|
||||
priv->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 |
|
||||
MAC_100 | MAC_1000FD;
|
||||
|
||||
phy_interface_set_rgmii(priv->phylink_config.supported_interfaces);
|
||||
__set_bit(PHY_INTERFACE_MODE_MII,
|
||||
priv->phylink_config.supported_interfaces);
|
||||
__set_bit(PHY_INTERFACE_MODE_GMII,
|
||||
priv->phylink_config.supported_interfaces);
|
||||
__set_bit(PHY_INTERFACE_MODE_SGMII,
|
||||
priv->phylink_config.supported_interfaces);
|
||||
__set_bit(PHY_INTERFACE_MODE_1000BASEX,
|
||||
priv->phylink_config.supported_interfaces);
|
||||
|
||||
priv->phylink = phylink_create(&priv->phylink_config,
|
||||
of_fwnode_handle(priv->device->of_node),
|
||||
priv->phy_iface, &alt_tse_phylink_ops);
|
||||
if (IS_ERR(priv->phylink)) {
|
||||
dev_err(&pdev->dev, "failed to create phylink\n");
|
||||
goto err_init_phy;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_init_phy:
|
||||
|
|
@ -1615,16 +1433,10 @@ static int altera_tse_remove(struct platform_device *pdev)
|
|||
struct net_device *ndev = platform_get_drvdata(pdev);
|
||||
struct altera_tse_private *priv = netdev_priv(ndev);
|
||||
|
||||
if (ndev->phydev) {
|
||||
phy_disconnect(ndev->phydev);
|
||||
|
||||
if (of_phy_is_fixed_link(priv->device->of_node))
|
||||
of_phy_deregister_fixed_link(priv->device->of_node);
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
altera_tse_mdio_destroy(ndev);
|
||||
unregister_netdev(ndev);
|
||||
phylink_destroy(priv->phylink);
|
||||
free_netdev(ndev);
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
Loading…
Reference in a new issue