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ath6kl: Fix missing gpio pin 9 configuration

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GPIO pin 9 also needs to be configured along with other gpio
pins to avoid sdio crc errors. I've not experienced any issue
with missing this particular gpio pin configuration, found dunring
code review. This can potentially improve rx performance.

Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
Vasanthakumar Thiagarajan 2012-05-22 12:52:48 +05:30 committed by Kalle Valo
parent 33a6664a6e
commit fa338be062
2 changed files with 7 additions and 0 deletions
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6
drivers/net/wireless/ath/ath6kl/init.c
View file

@ -1392,6 +1392,12 @@ static int ath6kl_init_upload(struct ath6kl *ar)
ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
ath6kl_err("temporary war to avoid sdio crc error\n");
param = 0x28;
address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
status = ath6kl_bmi_reg_write(ar, address, param);
if (status)
return status;
param = 0x20;
address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;

1
drivers/net/wireless/ath/ath6kl/target.h
View file

@ -45,6 +45,7 @@
#define LPO_CAL_ENABLE_S 20
#define LPO_CAL_ENABLE 0x00100000
#define GPIO_PIN9_ADDRESS 0x0000004c
#define GPIO_PIN10_ADDRESS 0x00000050
#define GPIO_PIN11_ADDRESS 0x00000054
#define GPIO_PIN12_ADDRESS 0x00000058