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Documentation/memory-barriers.txt: Fix ACCESS_ONCE thinko
In commit 2ecf810121
("Documentation/memory-barriers.txt: Add
needed ACCESS_ONCE() calls to memory-barriers.txt") the statement
"Q = P" was converted to "ACCESS_ONCE(Q) = P". This should have
been "Q = ACCESS_ONCE(P)". It later became "WRITE_ONCE(Q, P)".
This doesn't match the following text, which is "Q = LOAD P".
Change the statement to be "Q = READ_ONCE(P)".
Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
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1 changed files with 4 additions and 4 deletions
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@ -194,7 +194,7 @@ There are some minimal guarantees that may be expected of a CPU:
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(*) On any given CPU, dependent memory accesses will be issued in order, with
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respect to itself. This means that for:
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WRITE_ONCE(Q, P); smp_read_barrier_depends(); D = READ_ONCE(*Q);
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Q = READ_ONCE(P); smp_read_barrier_depends(); D = READ_ONCE(*Q);
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the CPU will issue the following memory operations:
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@ -202,9 +202,9 @@ There are some minimal guarantees that may be expected of a CPU:
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and always in that order. On most systems, smp_read_barrier_depends()
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does nothing, but it is required for DEC Alpha. The READ_ONCE()
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and WRITE_ONCE() are required to prevent compiler mischief. Please
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note that you should normally use something like rcu_dereference()
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instead of open-coding smp_read_barrier_depends().
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is required to prevent compiler mischief. Please note that you
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should normally use something like rcu_dereference() instead of
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open-coding smp_read_barrier_depends().
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(*) Overlapping loads and stores within a particular CPU will appear to be
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ordered within that CPU. This means that for:
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