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MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes
Commit 934c79231c1b("MIPS: asm: r4kcache: Add MIPS R6 cache unroll
functions") added support for MIPS R6 cache flushes but it used the
wrong base address register to perform the flushes so the same lines
were flushed over and over. Moreover, replace the "addiu" instructions
with LONG_ADDIU so the correct base address is calculated for 64-bit
cores.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Fixes: 934c79231c1b("MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions")
Cc: linux-mips@linux-mips.org
Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/9384/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Markos Chandras
Ralf Baechle
parent
07edf0d46c
commit
f6b39ae6f4
1 changed files with 45 additions and 44 deletions
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@ -12,6 +12,8 @@
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#ifndef _ASM_R4KCACHE_H
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#define _ASM_R4KCACHE_H
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#include <linux/stringify.h>
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#include <asm/asm.h>
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#include <asm/cacheops.h>
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#include <asm/compiler.h>
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@ -344,7 +346,7 @@ static inline void invalidate_tcache_page(unsigned long addr)
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" cache %1, 0x0a0(%0); cache %1, 0x0b0(%0)\n" \
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" cache %1, 0x0c0(%0); cache %1, 0x0d0(%0)\n" \
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" cache %1, 0x0e0(%0); cache %1, 0x0f0(%0)\n" \
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" addiu $1, $0, 0x100 \n" \
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" "__stringify(LONG_ADDIU)" $1, %0, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x010($1)\n" \
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" cache %1, 0x020($1); cache %1, 0x030($1)\n" \
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" cache %1, 0x040($1); cache %1, 0x050($1)\n" \
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@ -368,17 +370,17 @@ static inline void invalidate_tcache_page(unsigned long addr)
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" cache %1, 0x040(%0); cache %1, 0x060(%0)\n" \
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" cache %1, 0x080(%0); cache %1, 0x0a0(%0)\n" \
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" cache %1, 0x0c0(%0); cache %1, 0x0e0(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, %0, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x020($1)\n" \
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" cache %1, 0x040($1); cache %1, 0x060($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
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" cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
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" addiu $1, $1, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x020($1)\n" \
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" cache %1, 0x040($1); cache %1, 0x060($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
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" cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
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" addiu $1, $1, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100\n" \
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" cache %1, 0x000($1); cache %1, 0x020($1)\n" \
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" cache %1, 0x040($1); cache %1, 0x060($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
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@ -396,25 +398,25 @@ static inline void invalidate_tcache_page(unsigned long addr)
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" .set noat\n" \
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" cache %1, 0x000(%0); cache %1, 0x040(%0)\n" \
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" cache %1, 0x080(%0); cache %1, 0x0c0(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, %0, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x040($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x040($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x040($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x040($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x040($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x040($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x040($1)\n" \
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" cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
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" .set pop\n" \
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@ -429,39 +431,38 @@ static inline void invalidate_tcache_page(unsigned long addr)
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" .set mips64r6\n" \
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" .set noat\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
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" addiu $1, %0, 0x100\n" \
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" "__stringify(LONG_ADDIU)" $1, %0, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" "__stringify(LONG_ADDIU)" $1, $1, 0x100 \n" \
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" cache %1, 0x000($1); cache %1, 0x080($1)\n" \
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" .set pop\n" \
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: \
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: "r" (base), \
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