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Two OMAP hwmod patches for early v3.16-rc kernels.
There's one OMAP SoC integration fix for the AM43xx SoC, without which, IP blocks can't be placed into hard-reset. There is also one OMAP5 SoC data addition patch that should have gone in for v3.16. Normally I wouldn't send this as part of an -rc series, since it's not technically a fix. But I'd like to make an exception in this case because: - it's intended to go in very early in the v3.16-rc series (or even pre-rc1); - it's a fairly small change; - the impact is limited to a single SoC and a single device; - the only reason that it didn't go in earlier is because it "slipped through the cracks," rather than for any technical reason. Basic build, boot, and PM test logs are available here: http://www.pwsan.com/omap/testlogs/hwmod-a-v3.16-rc/20140615201307/ -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTnlwIAAoJEMePsQ0LvSpLfbcP/RRFvT/AbpGaOBXJgfwH79EF BG1nX7MIWPbpzKYUeeVpD3lO9ICOZ1pzJlXeuNwVbXJ/Ip+r/1hMMnpIYSGAwXBk pCfTXozz04f4p9RIs7S//sm1tYEQfEa2NGPaYkHjv796p91sNXrLqnflItn+bbcP reyREn3UcstkYuHAsnsMkqVQUIVH6sz4cDpU5VamGhJrcVdim7NsyIObQXB6RePE FwLNx1EuoRckQwQgq6fVjGpvznhrX+xuqat/QBRU4OLuzfRCQS7PHq5HhdiNueyJ Adn08/2yfJzOdBfNnErFNLLkJFzpg/QiyujnY2y455Y2F1m6CmPLQIFj6Xx5y1V/ 46AFfrkXTGJA99pfAbo+AANf2XGKZ3A7i6xfeZz5faiEFE8h6F51ENIm0ZLuycyQ 0inXY4OWIqKiWe8AOMyEMOPY9dkbeBfc87SeWOPjsFhtRmToIQrCGzSL70FIYIjZ 9cEfU50jD50NjDKCJJWjgVSy3IuDWGT6twRRvBfMPrCxKDkFh0NvmDWvjMm47FKF 2h4dK3I5qZ6MRX/DIaRdopoeaf+fm8H8XY6tG7T2w6nxPLSKeU3lOLF4hR9VzZ/l yPQg89LNzm0OSoE4QFxCzvy7FrdnqHnobTW4lNNiy8Rc197q/wtGVJbBW6iy6fpK P1nUv6dvc2jVa1jZ/8r9 =SZpA -----END PGP SIGNATURE----- Merge tag 'for-v3.16-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.16/fixes Two OMAP hwmod patches for early v3.16-rc kernels. There's one OMAP SoC integration fix for the AM43xx SoC, without which, IP blocks can't be placed into hard-reset. There is also one OMAP5 SoC data addition patch that should have gone in for v3.16. Normally I wouldn't send this as part of an -rc series, since it's not technically a fix. But I'd like to make an exception in this case because: - it's intended to go in very early in the v3.16-rc series (or even pre-rc1); - it's a fairly small change; - the impact is limited to a single SoC and a single device; - the only reason that it didn't go in earlier is because it "slipped through the cracks," rather than for any technical reason. Basic build, boot, and PM test logs are available here: http://www.pwsan.com/omap/testlogs/hwmod-a-v3.16-rc/20140615201307/
This commit is contained in:
Tony Lindgren
commit
f5467da80b
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@ -110,14 +110,16 @@ obj-y += prm_common.o cm_common.o
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obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
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obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
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obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
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obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o
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omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
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prcm_mpu44xx.o prminst44xx.o \
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vc44xx_data.o vp44xx_data.o
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obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
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obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
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obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common)
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obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common)
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am33xx-43xx-prcm-common += prm33xx.o cm33xx.o
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obj-$(CONFIG_SOC_AM33XX) += $(am33xx-43xx-prcm-common)
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obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) \
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$(am33xx-43xx-prcm-common)
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# OMAP voltage domains
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voltagedomain-common := voltage.o vc.o vp.o
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@ -380,7 +380,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
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void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
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void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
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#ifdef CONFIG_SOC_AM33XX
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#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
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extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
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u16 clkctrl_offs);
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extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
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@ -4251,9 +4251,9 @@ void __init omap_hwmod_init(void)
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soc_ops.enable_module = _omap4_enable_module;
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soc_ops.disable_module = _omap4_disable_module;
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soc_ops.wait_target_ready = _omap4_wait_target_ready;
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soc_ops.assert_hardreset = _omap4_assert_hardreset;
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soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
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soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
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soc_ops.assert_hardreset = _am33xx_assert_hardreset;
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soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
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soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
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soc_ops.init_clkdm = _init_clkdm;
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} else if (soc_is_am33xx()) {
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soc_ops.enable_module = _am33xx_enable_module;
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@ -2020,6 +2020,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
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},
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};
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/*
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* 'ocp2scp' class
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* bridge to transform ocp interface protocol to scp (serial control port)
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* protocol
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*/
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/* ocp2scp3 */
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static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
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/* l4_cfg -> ocp2scp3 */
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static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
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.master = &omap54xx_l4_cfg_hwmod,
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.slave = &omap54xx_ocp2scp3_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
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.name = "ocp2scp3",
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.class = &omap54xx_ocp2scp_hwmod_class,
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.clkdm_name = "l3init_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_HWCTRL,
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},
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},
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};
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/*
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* 'sata' class
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* sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
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*/
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static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
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.sysc_offs = 0x0000,
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.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
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MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
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.sysc_fields = &omap_hwmod_sysc_type2,
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};
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static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
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.name = "sata",
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.sysc = &omap54xx_sata_sysc,
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};
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/* sata */
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static struct omap_hwmod omap54xx_sata_hwmod = {
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.name = "sata",
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.class = &omap54xx_sata_hwmod_class,
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.clkdm_name = "l3init_clkdm",
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.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
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.main_clk = "func_48m_fclk",
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.mpu_rt_idx = 1,
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* l4_cfg -> sata */
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static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
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.master = &omap54xx_l4_cfg_hwmod,
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.slave = &omap54xx_sata_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/*
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* Interfaces
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@ -2765,6 +2836,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
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&omap54xx_l4_cfg__usb_tll_hs,
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&omap54xx_l4_cfg__usb_otg_ss,
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&omap54xx_l4_wkup__wd_timer2,
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&omap54xx_l4_cfg__ocp2scp3,
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&omap54xx_l4_cfg__sata,
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NULL,
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};
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