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EDAC, altera: Rename device trigger to common name
The L2 and OCRAM devices have different ecc trigger names than the other EDAC devices (FIFO peripherals). Make them all the same and remove the character array from the device structure. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1471622666-15197-2-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
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6fa06b0d9e
commit
f399f34bdb
2 changed files with 1 additions and 13 deletions
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@ -680,7 +680,7 @@ static void altr_create_edacdev_dbgfs(struct edac_device_ctl_info *edac_dci,
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if (!drvdata->debugfs_dir)
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return;
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if (!edac_debugfs_create_file(priv->dbgfs_name, S_IWUSR,
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if (!edac_debugfs_create_file("altr_trigger", S_IWUSR,
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drvdata->debugfs_dir, edac_dci,
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priv->inject_fops))
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debugfs_remove_recursive(drvdata->debugfs_dir);
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@ -1108,7 +1108,6 @@ static const struct edac_device_prv_data ocramecc_data = {
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.setup = altr_check_ecc_deps,
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.ce_clear_mask = (ALTR_OCR_ECC_EN | ALTR_OCR_ECC_SERR),
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.ue_clear_mask = (ALTR_OCR_ECC_EN | ALTR_OCR_ECC_DERR),
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.dbgfs_name = "altr_ocram_trigger",
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.alloc_mem = ocram_alloc_mem,
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.free_mem = ocram_free_mem,
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.ecc_enable_mask = ALTR_OCR_ECC_EN,
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@ -1125,7 +1124,6 @@ static const struct edac_device_prv_data a10_ocramecc_data = {
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.irq_status_mask = A10_SYSMGR_ECC_INTSTAT_OCRAM,
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.dbgfs_name = "altr_ocram_trigger",
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.ecc_enable_mask = ALTR_A10_OCRAM_ECC_EN_CTL,
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.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
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.ce_set_mask = ALTR_A10_ECC_TSERRA,
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@ -1228,7 +1226,6 @@ static const struct edac_device_prv_data l2ecc_data = {
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.setup = altr_l2_check_deps,
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.ce_clear_mask = 0,
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.ue_clear_mask = 0,
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.dbgfs_name = "altr_l2_trigger",
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.alloc_mem = l2_alloc_mem,
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.free_mem = l2_free_mem,
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.ecc_enable_mask = ALTR_L2_ECC_EN,
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@ -1244,7 +1241,6 @@ static const struct edac_device_prv_data a10_l2ecc_data = {
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.ce_clear_mask = ALTR_A10_L2_ECC_SERR_CLR,
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.ue_clear_mask = ALTR_A10_L2_ECC_MERR_CLR,
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.irq_status_mask = A10_SYSMGR_ECC_INTSTAT_L2,
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.dbgfs_name = "altr_l2_trigger",
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.alloc_mem = l2_alloc_mem,
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.free_mem = l2_free_mem,
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.ecc_enable_mask = ALTR_A10_L2_ECC_EN_CTL,
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@ -1266,7 +1262,6 @@ static const struct edac_device_prv_data a10_enetecc_data = {
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.setup = altr_check_ecc_deps,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.dbgfs_name = "altr_trigger",
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
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.ce_set_mask = ALTR_A10_ECC_TSERRA,
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@ -1293,7 +1288,6 @@ static const struct edac_device_prv_data a10_nandecc_data = {
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.setup = altr_check_ecc_deps,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.dbgfs_name = "altr_trigger",
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
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.ce_set_mask = ALTR_A10_ECC_TSERRA,
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@ -1320,7 +1314,6 @@ static const struct edac_device_prv_data a10_dmaecc_data = {
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.setup = altr_check_ecc_deps,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.dbgfs_name = "altr_trigger",
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
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.ce_set_mask = ALTR_A10_ECC_TSERRA,
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@ -1347,7 +1340,6 @@ static const struct edac_device_prv_data a10_usbecc_data = {
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.setup = altr_check_ecc_deps,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.dbgfs_name = "altr_trigger",
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
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.ce_set_mask = ALTR_A10_ECC_TSERRA,
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@ -1374,7 +1366,6 @@ static const struct edac_device_prv_data a10_qspiecc_data = {
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.setup = altr_check_ecc_deps,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.dbgfs_name = "altr_trigger",
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
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.ce_set_mask = ALTR_A10_ECC_TSERRA,
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@ -1524,7 +1515,6 @@ static const struct edac_device_prv_data a10_sdmmcecca_data = {
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.setup = altr_portb_setup,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.dbgfs_name = "altr_trigger",
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
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.ce_set_mask = ALTR_A10_ECC_SERRPENA,
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@ -1538,7 +1528,6 @@ static const struct edac_device_prv_data a10_sdmmceccb_data = {
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.setup = altr_portb_setup,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENB,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENB,
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.dbgfs_name = "altr_trigger",
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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.ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
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.ce_set_mask = ALTR_A10_ECC_TSERRB,
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@ -303,7 +303,6 @@ struct edac_device_prv_data {
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int ce_clear_mask;
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int ue_clear_mask;
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int irq_status_mask;
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char dbgfs_name[20];
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void * (*alloc_mem)(size_t size, void **other);
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void (*free_mem)(void *p, size_t size, void *other);
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int ecc_enable_mask;
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