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iwlwifi: yoyo: add support for parsing SHARED_MEM_ALLOC version 4
The new version adds the information for RX2C FIFO addresses. Use the new addresses to parse the FIFO info when dumping. Signed-off-by: Mordechay Goodstein <mordechay.goodstein@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20200424182643.97cc25d96b53.I65fd0400d80f505bd6d7eed442f12db24b25bbe3@changeid
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382d8296c5
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ebfa7f8ae1
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@ -5,10 +5,9 @@
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*
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*
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* GPL LICENSE SUMMARY
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* GPL LICENSE SUMMARY
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*
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*
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* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright (C) 2018 - 2019 Intel Corporation
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* Copyright(c) 2007 - 2014, 2018 - 2020 Intel Corporation
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* it under the terms of version 2 of the GNU General Public License as
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@ -28,10 +27,9 @@
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*
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*
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* BSD LICENSE
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* BSD LICENSE
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*
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*
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* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright (C) 2018 - 2019 Intel Corporation
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* Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation
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* All rights reserved.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@ -218,6 +216,8 @@ struct iwl_shared_mem_lmac_cfg {
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* @page_buff_size: size of %page_buff_addr
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* @page_buff_size: size of %page_buff_addr
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* @lmac_num: number of LMACs (1 or 2)
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* @lmac_num: number of LMACs (1 or 2)
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* @lmac_smem: per - LMAC smem data
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* @lmac_smem: per - LMAC smem data
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* @rxfifo2_control_addr: start addr of RXF2C
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* @rxfifo2_control_size: size of RXF2C
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*/
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*/
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struct iwl_shared_mem_cfg {
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struct iwl_shared_mem_cfg {
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__le32 shared_mem_addr;
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__le32 shared_mem_addr;
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@ -229,8 +229,10 @@ struct iwl_shared_mem_cfg {
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__le32 page_buff_addr;
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__le32 page_buff_addr;
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__le32 page_buff_size;
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__le32 page_buff_size;
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__le32 lmac_num;
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__le32 lmac_num;
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struct iwl_shared_mem_lmac_cfg lmac_smem[2];
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struct iwl_shared_mem_lmac_cfg lmac_smem[3];
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} __packed; /* SHARED_MEM_ALLOC_API_S_VER_3 */
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__le32 rxfifo2_control_addr;
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__le32 rxfifo2_control_size;
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} __packed; /* SHARED_MEM_ALLOC_API_S_VER_4 */
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/**
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/**
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* struct iwl_mfuart_load_notif - mfuart image version & status
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* struct iwl_mfuart_load_notif - mfuart image version & status
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@ -1386,13 +1386,36 @@ static void iwl_ini_get_rxf_data(struct iwl_fw_runtime *fwrt,
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}
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}
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fifo_idx = ffs(fid2) - 1;
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fifo_idx = ffs(fid2) - 1;
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if (fid2 && !WARN_ON_ONCE(fifo_idx != 0)) {
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if (fid2 && !WARN_ON_ONCE(~BIT(fifo_idx) & fid2)) {
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data->size = fwrt->smem_cfg.rxfifo2_size;
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u8 max_idx;
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data->offset = RXF_DIFF_FROM_PREV;
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if (iwl_fw_lookup_notif_ver(fwrt->fw, SYSTEM_GROUP,
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SHARED_MEM_CFG_CMD, 0) <= 3)
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max_idx = 0;
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else
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max_idx = 1;
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if (WARN_ONCE(fifo_idx > max_idx,
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"invalid umac fifo idx %d", fifo_idx))
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return;
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/* use bit 31 to distinguish between umac and lmac rxf while
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/* use bit 31 to distinguish between umac and lmac rxf while
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* parsing the dump
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* parsing the dump
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*/
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*/
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data->fifo_num = fifo_idx | IWL_RXF_UMAC_BIT;
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data->fifo_num = fifo_idx | IWL_RXF_UMAC_BIT;
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switch (fifo_idx) {
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case 0:
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data->size = fwrt->smem_cfg.rxfifo2_size;
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data->offset = iwl_umac_prph(fwrt->trans,
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RXF_DIFF_FROM_PREV);
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break;
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case 1:
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data->size = fwrt->smem_cfg.rxfifo2_control_size;
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data->offset = iwl_umac_prph(fwrt->trans,
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RXF2C_DIFF_FROM_PREV);
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break;
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}
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return;
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return;
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}
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}
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}
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}
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@ -6,7 +6,7 @@
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* GPL LICENSE SUMMARY
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* GPL LICENSE SUMMARY
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*
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*
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* Copyright(c) 2017 Intel Deutschland GmbH
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* Copyright(c) 2017 Intel Deutschland GmbH
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* Copyright (C) 2018-2019 Intel Corporation
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* Copyright (C) 2018-2020 Intel Corporation
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* it under the terms of version 2 of the GNU General Public License as
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@ -27,7 +27,7 @@
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* BSD LICENSE
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* BSD LICENSE
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*
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*
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* Copyright(c) 2017 Intel Deutschland GmbH
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* Copyright(c) 2017 Intel Deutschland GmbH
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* Copyright (C) 2018-2019 Intel Corporation
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* Copyright (C) 2018-2020 Intel Corporation
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* All rights reserved.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@ -86,6 +86,7 @@ struct iwl_fwrt_shared_mem_cfg {
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u32 rxfifo1_size;
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u32 rxfifo1_size;
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} lmac[MAX_NUM_LMAC];
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} lmac[MAX_NUM_LMAC];
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u32 rxfifo2_size;
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u32 rxfifo2_size;
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u32 rxfifo2_control_size;
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u32 internal_txfifo_addr;
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u32 internal_txfifo_addr;
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u32 internal_txfifo_size[TX_FIFO_INTERNAL_MAX_NUM];
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u32 internal_txfifo_size[TX_FIFO_INTERNAL_MAX_NUM];
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};
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};
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@ -5,10 +5,9 @@
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*
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*
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* GPL LICENSE SUMMARY
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* GPL LICENSE SUMMARY
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*
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*
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* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright(c) 2018 - 2019 Intel Corporation
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* Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* it under the terms of version 2 of the GNU General Public License as
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@ -28,10 +27,9 @@
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*
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*
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* BSD LICENSE
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* BSD LICENSE
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*
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*
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* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright(c) 2018 - 2019 Intel Corporation
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* Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation
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* All rights reserved.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@ -71,6 +69,8 @@ static void iwl_parse_shared_mem_22000(struct iwl_fw_runtime *fwrt,
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struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data;
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struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data;
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int i, lmac;
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int i, lmac;
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int lmac_num = le32_to_cpu(mem_cfg->lmac_num);
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int lmac_num = le32_to_cpu(mem_cfg->lmac_num);
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u8 api_ver = iwl_fw_lookup_notif_ver(fwrt->fw, SYSTEM_GROUP,
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SHARED_MEM_CFG_CMD, 0);
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if (WARN_ON(lmac_num > ARRAY_SIZE(mem_cfg->lmac_smem)))
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if (WARN_ON(lmac_num > ARRAY_SIZE(mem_cfg->lmac_smem)))
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return;
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return;
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@ -80,6 +80,12 @@ static void iwl_parse_shared_mem_22000(struct iwl_fw_runtime *fwrt,
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ARRAY_SIZE(mem_cfg->lmac_smem[0].txfifo_size);
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ARRAY_SIZE(mem_cfg->lmac_smem[0].txfifo_size);
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fwrt->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo2_size);
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fwrt->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo2_size);
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if (api_ver >= 4 &&
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!WARN_ON_ONCE(iwl_rx_packet_payload_len(pkt) < sizeof(*mem_cfg))) {
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fwrt->smem_cfg.rxfifo2_control_size =
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le32_to_cpu(mem_cfg->rxfifo2_control_size);
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}
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for (lmac = 0; lmac < lmac_num; lmac++) {
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for (lmac = 0; lmac < lmac_num; lmac++) {
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struct iwl_shared_mem_lmac_cfg *lmac_cfg =
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struct iwl_shared_mem_lmac_cfg *lmac_cfg =
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&mem_cfg->lmac_smem[lmac];
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&mem_cfg->lmac_smem[lmac];
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@ -5,10 +5,9 @@
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*
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*
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* GPL LICENSE SUMMARY
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* GPL LICENSE SUMMARY
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*
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*
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* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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* Copyright(c) 2016 Intel Deutschland GmbH
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* Copyright(c) 2016 Intel Deutschland GmbH
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* Copyright (C) 2018 - 2019 Intel Corporation
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* Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* it under the terms of version 2 of the GNU General Public License as
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@ -28,10 +27,9 @@
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*
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*
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* BSD LICENSE
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* BSD LICENSE
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*
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*
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* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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* Copyright(c) 2016 Intel Deutschland GmbH
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* Copyright(c) 2016 Intel Deutschland GmbH
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* Copyright (C) 2018 - 2019 Intel Corporation
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* Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation
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* All rights reserved.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@ -326,6 +324,7 @@
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#define RXF_SIZE_BYTE_CND_POS (7)
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#define RXF_SIZE_BYTE_CND_POS (7)
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#define RXF_SIZE_BYTE_CNT_MSK (0x3ff << RXF_SIZE_BYTE_CND_POS)
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#define RXF_SIZE_BYTE_CNT_MSK (0x3ff << RXF_SIZE_BYTE_CND_POS)
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#define RXF_DIFF_FROM_PREV (0x200)
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#define RXF_DIFF_FROM_PREV (0x200)
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#define RXF2C_DIFF_FROM_PREV (0x4e00)
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#define RXF_LD_FENCE_OFFSET_ADDR (0xa00c10)
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#define RXF_LD_FENCE_OFFSET_ADDR (0xa00c10)
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#define RXF_FIFO_RD_FENCE_ADDR (0xa00c0c)
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#define RXF_FIFO_RD_FENCE_ADDR (0xa00c0c)
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