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bnx2x: Clean previous IGU status before ack
When enabling interrupts, acknowledge the interrupt only after configuring the IGU to the correct interrupt mode (otherwise it would dirty selftests) Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com> Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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2 changed files with 11 additions and 7 deletions
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@ -1681,7 +1681,6 @@ static int bnx2x_setup_irqs(struct bnx2x *bp)
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if (rc)
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return rc;
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} else {
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bnx2x_ack_int(bp);
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rc = bnx2x_req_irq(bp);
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if (rc) {
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BNX2X_ERR("IRQ request failed rc %d, aborting\n", rc);
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@ -1539,26 +1539,31 @@ static void bnx2x_igu_int_enable(struct bnx2x *bp)
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if (msix) {
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val &= ~(IGU_PF_CONF_INT_LINE_EN |
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IGU_PF_CONF_SINGLE_ISR_EN);
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val |= (IGU_PF_CONF_FUNC_EN |
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IGU_PF_CONF_MSI_MSIX_EN |
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val |= (IGU_PF_CONF_MSI_MSIX_EN |
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IGU_PF_CONF_ATTN_BIT_EN);
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if (single_msix)
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val |= IGU_PF_CONF_SINGLE_ISR_EN;
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} else if (msi) {
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val &= ~IGU_PF_CONF_INT_LINE_EN;
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val |= (IGU_PF_CONF_FUNC_EN |
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IGU_PF_CONF_MSI_MSIX_EN |
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val |= (IGU_PF_CONF_MSI_MSIX_EN |
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IGU_PF_CONF_ATTN_BIT_EN |
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IGU_PF_CONF_SINGLE_ISR_EN);
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} else {
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val &= ~IGU_PF_CONF_MSI_MSIX_EN;
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val |= (IGU_PF_CONF_FUNC_EN |
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IGU_PF_CONF_INT_LINE_EN |
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val |= (IGU_PF_CONF_INT_LINE_EN |
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IGU_PF_CONF_ATTN_BIT_EN |
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IGU_PF_CONF_SINGLE_ISR_EN);
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}
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/* Clean previous status - need to configure igu prior to ack*/
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if ((!msix) || single_msix) {
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REG_WR(bp, IGU_REG_PF_CONFIGURATION, val);
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bnx2x_ack_int(bp);
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}
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val |= IGU_PF_CONF_FUNC_EN;
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DP(NETIF_MSG_IFUP, "write 0x%x to IGU mode %s\n",
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val, (msix ? "MSI-X" : (msi ? "MSI" : "INTx")));
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