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[ARM] MXC: remove _clk suffix from clock names

Browse source 
The context makes it clear already that these are clocks, so there's
no need for such a suffix. This patch only changes the clocks actually
used in the tree. The remaining clocks are renamed in the subsequent
architecture specific patches.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2009-02-16 14:29:10 +01:00
parent 30c730f8f9
commit e65fb0099f
7 changed files with 22 additions and 22 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/arm/mach-mx1/clock.c
View file

@ -462,7 +462,7 @@ static struct clk clko_clk = {
};
static struct clk dma_clk = {
.name = "dma_clk",
.name = "dma",
.parent = &hclk,
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
@ -513,7 +513,7 @@ static struct clk gpt_clk = {
};
static struct clk uart_clk = {
.name = "uart_clk",
.name = "uart",
.parent = &perclk[0],
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,

18
arch/arm/mach-mx2/clock_imx27.c
View file

@ -685,7 +685,7 @@ static struct clk per_clk[] = {
struct clk uart1_clk[] = {
{
.name = "uart_clk",
.name = "uart",
.id = 0,
.parent = &per_clk[0],
.secondary = &uart1_clk[1],
@ -702,7 +702,7 @@ struct clk uart1_clk[] = {
struct clk uart2_clk[] = {
{
.name = "uart_clk",
.name = "uart",
.id = 1,
.parent = &per_clk[0],
.secondary = &uart2_clk[1],
@ -719,7 +719,7 @@ struct clk uart2_clk[] = {
struct clk uart3_clk[] = {
{
.name = "uart_clk",
.name = "uart",
.id = 2,
.parent = &per_clk[0],
.secondary = &uart3_clk[1],
@ -736,7 +736,7 @@ struct clk uart3_clk[] = {
struct clk uart4_clk[] = {
{
.name = "uart_clk",
.name = "uart",
.id = 3,
.parent = &per_clk[0],
.secondary = &uart4_clk[1],
@ -753,7 +753,7 @@ struct clk uart4_clk[] = {
struct clk uart5_clk[] = {
{
.name = "uart_clk",
.name = "uart",
.id = 4,
.parent = &per_clk[0],
.secondary = &uart5_clk[1],
@ -770,7 +770,7 @@ struct clk uart5_clk[] = {
struct clk uart6_clk[] = {
{
.name = "uart_clk",
.name = "uart",
.id = 5,
.parent = &per_clk[0],
.secondary = &uart6_clk[1],
@ -1110,7 +1110,7 @@ static struct clk ssi2_clk[] = {
};
static struct clk nfc_clk = {
.name = "nfc_clk",
.name = "nfc",
.parent = &cpu_clk,
.get_rate = _clk_nfc_recalc,
.enable = _clk_enable,
@ -1128,7 +1128,7 @@ static struct clk vpu_clk = {
};
static struct clk dma_clk = {
.name = "dma_clk",
.name = "dma",
.parent = &ahb_clk,
.enable = _clk_dma_enable,
.disable = _clk_dma_disable,
@ -1260,7 +1260,7 @@ static struct clk kpp_clk = {
};
static struct clk owire_clk = {
.name = "owire_clk",
.name = "owire",
.parent = &ipg_clk,
.enable = _clk_enable,
.enable_reg = CCM_PCCR0,

14
arch/arm/mach-mx3/clock.c
View file

@ -593,7 +593,7 @@ static struct clk epit_clk[] = {
};
static struct clk nfc_clk = {
.name = "nfc_clk",
.name = "nfc",
.parent = &ahb_clk,
.get_rate = _clk_nfc_get_rate,
};
@ -667,7 +667,7 @@ static struct clk csi_clk = {
static struct clk uart_clk[] = {
{
.name = "uart_clk",
.name = "uart",
.id = 0,
.parent = &perclk_clk,
.enable = _clk_enable,
@ -675,7 +675,7 @@ static struct clk uart_clk[] = {
.enable_shift = MXC_CCM_CGR0_UART1_OFFSET,
.disable = _clk_disable,},
{
.name = "uart_clk",
.name = "uart",
.id = 1,
.parent = &perclk_clk,
.enable = _clk_enable,
@ -683,7 +683,7 @@ static struct clk uart_clk[] = {
.enable_shift = MXC_CCM_CGR0_UART2_OFFSET,
.disable = _clk_disable,},
{
.name = "uart_clk",
.name = "uart",
.id = 2,
.parent = &perclk_clk,
.enable = _clk_enable,
@ -691,7 +691,7 @@ static struct clk uart_clk[] = {
.enable_shift = MXC_CCM_CGR1_UART3_OFFSET,
.disable = _clk_disable,},
{
.name = "uart_clk",
.name = "uart",
.id = 3,
.parent = &perclk_clk,
.enable = _clk_enable,
@ -699,7 +699,7 @@ static struct clk uart_clk[] = {
.enable_shift = MXC_CCM_CGR1_UART4_OFFSET,
.disable = _clk_disable,},
{
.name = "uart_clk",
.name = "uart",
.id = 4,
.parent = &perclk_clk,
.enable = _clk_enable,
@ -736,7 +736,7 @@ static struct clk i2c_clk[] = {
};
static struct clk owire_clk = {
.name = "owire_clk",
.name = "owire",
.parent = &perclk_clk,
.enable_reg = MXC_CCM_CGR1,
.enable_shift = MXC_CCM_CGR1_OWIRE_OFFSET,

2
arch/arm/plat-mxc/dma-mx1-mx2.c
View file

@ -802,7 +802,7 @@ static int __init imx_dma_init(void)
int ret = 0;
int i;
dma_clk = clk_get(NULL, "dma_clk");
dma_clk = clk_get(NULL, "dma");
clk_enable(dma_clk);
/* reset DMA module */

2
drivers/mtd/nand/mxc_nand.c
View file

@ -880,7 +880,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
this->read_buf = mxc_nand_read_buf;
this->verify_buf = mxc_nand_verify_buf;
host->clk = clk_get(&pdev->dev, "nfc_clk");
host->clk = clk_get(&pdev->dev, "nfc");
if (IS_ERR(host->clk))
goto eclk;

2
drivers/serial/imx.c
View file

@ -1129,7 +1129,7 @@ static int serial_imx_probe(struct platform_device *pdev)
sport->timer.function = imx_timeout;
sport->timer.data = (unsigned long)sport;
sport->clk = clk_get(&pdev->dev, "uart_clk");
sport->clk = clk_get(&pdev->dev, "uart");
if (IS_ERR(sport->clk)) {
ret = PTR_ERR(sport->clk);
goto unmap;

2
drivers/w1/masters/mxc_w1.c
View file

@ -116,7 +116,7 @@ static int __init mxc_w1_probe(struct platform_device *pdev)
if (!mdev)
return -ENOMEM;
mdev->clk = clk_get(&pdev->dev, "owire_clk");
mdev->clk = clk_get(&pdev->dev, "owire");
if (!mdev->clk) {
err = -ENODEV;
goto failed_clk;