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arm64: dts: renesas: r9a07g043: Fillup the OSTM{0,1,2} stub nodes
Fillup the OSTM{0,1,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220425170530.200921-6-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -704,18 +704,36 @@ wdt2: watchdog@12800400 {
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};
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ostm0: timer@12801000 {
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compatible = "renesas,r9a07g043-ostm",
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"renesas,ostm";
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reg = <0x0 0x12801000 0x0 0x400>;
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/* place holder */
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interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
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clocks = <&cpg CPG_MOD R9A07G043_OSTM0_PCLK>;
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resets = <&cpg R9A07G043_OSTM0_PRESETZ>;
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power-domains = <&cpg>;
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status = "disabled";
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};
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ostm1: timer@12801400 {
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compatible = "renesas,r9a07g043-ostm",
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"renesas,ostm";
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reg = <0x0 0x12801400 0x0 0x400>;
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/* place holder */
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interrupts = <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
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clocks = <&cpg CPG_MOD R9A07G043_OSTM1_PCLK>;
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resets = <&cpg R9A07G043_OSTM1_PRESETZ>;
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power-domains = <&cpg>;
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status = "disabled";
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};
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ostm2: timer@12801800 {
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compatible = "renesas,r9a07g043-ostm",
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"renesas,ostm";
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reg = <0x0 0x12801800 0x0 0x400>;
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/* place holder */
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interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
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clocks = <&cpg CPG_MOD R9A07G043_OSTM2_PCLK>;
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resets = <&cpg R9A07G043_OSTM2_PRESETZ>;
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power-domains = <&cpg>;
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status = "disabled";
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};
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};
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