soundwire: intel/cadence: set ip_offset at run-time

Select relevant ip-offset depending on hardware version. This offset
is used to access MCP_ or IP_MCP_ registers with a fixed offset.

For existing platforms, the offset is exactly zero. Starting with
LunarLake, the offset is 0x4000.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20230515071042.2038-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Pierre-Louis Bossart 2023-05-15 15:10:21 +08:00 committed by Vinod Koul
parent 6ab915b9c3
commit e40e0e11fe
4 changed files with 7 additions and 0 deletions

View file

@ -14,6 +14,8 @@
*/
#define CDNS_MCP_IP_MAX_CMD_LEN 32
#define SDW_CADENCE_MCP_IP_OFFSET 0x4000
/**
* struct sdw_cdns_pdi: PDI (Physical Data Interface) instance
*

View file

@ -10,6 +10,7 @@
* @hw_ops: platform-specific ops
* @mmio_base: mmio base of SoundWire registers
* @registers: Link IO registers base
* @ip_offset: offset for MCP_IP registers
* @shim: Audio shim pointer
* @shim_vs: Audio vendor-specific shim pointer
* @alh: ALH (Audio Link Hub) pointer
@ -28,6 +29,7 @@ struct sdw_intel_link_res {
void __iomem *mmio_base; /* not strictly needed, useful for debug */
void __iomem *registers;
u32 ip_offset;
void __iomem *shim;
void __iomem *shim_vs;
void __iomem *alh;

View file

@ -144,6 +144,7 @@ static int intel_link_probe(struct auxiliary_device *auxdev,
sdw->link_res = &ldev->link_res;
cdns->dev = dev;
cdns->registers = sdw->link_res->registers;
cdns->ip_offset = sdw->link_res->ip_offset;
cdns->instance = sdw->instance;
cdns->msg_count = 0;

View file

@ -66,10 +66,12 @@ static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res *
if (!res->ext) {
link->registers = res->mmio_base + SDW_LINK_BASE
+ (SDW_LINK_SIZE * link_id);
link->ip_offset = 0;
link->shim = res->mmio_base + res->shim_base;
link->alh = res->mmio_base + res->alh_base;
} else {
link->registers = res->mmio_base + SDW_IP_BASE(link_id);
link->ip_offset = SDW_CADENCE_MCP_IP_OFFSET;
link->shim = res->mmio_base + SDW_SHIM2_GENERIC_BASE(link_id);
link->shim_vs = res->mmio_base + SDW_SHIM2_VS_BASE(link_id);
}