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spi: dw-mid: convert value of dma_width to enum dma_slave_buswidth
DMAEngine has a specific type to be used for bus width. This patch converts the code to use the values of the specific type when configure DMA transfer. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -100,6 +100,15 @@ static void mid_spi_dma_exit(struct dw_spi *dws)
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dma_release_channel(dws->rxchan);
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dma_release_channel(dws->rxchan);
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}
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}
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static enum dma_slave_buswidth convert_dma_width(u32 dma_width) {
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if (dma_width == 1)
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return DMA_SLAVE_BUSWIDTH_1_BYTE;
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else if (dma_width == 2)
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return DMA_SLAVE_BUSWIDTH_2_BYTES;
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return DMA_SLAVE_BUSWIDTH_UNDEFINED;
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}
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/*
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/*
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* dws->dma_chan_busy is set before the dma transfer starts, callback for tx
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* dws->dma_chan_busy is set before the dma transfer starts, callback for tx
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* channel will clear a corresponding bit.
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* channel will clear a corresponding bit.
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@ -126,7 +135,7 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws)
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txconf.dst_addr = dws->dma_addr;
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txconf.dst_addr = dws->dma_addr;
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txconf.dst_maxburst = LNW_DMA_MSIZE_16;
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txconf.dst_maxburst = LNW_DMA_MSIZE_16;
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txconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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txconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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txconf.dst_addr_width = dws->dma_width;
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txconf.dst_addr_width = convert_dma_width(dws->dma_width);
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txconf.device_fc = false;
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txconf.device_fc = false;
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dmaengine_slave_config(dws->txchan, &txconf);
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dmaengine_slave_config(dws->txchan, &txconf);
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@ -175,7 +184,7 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws)
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rxconf.src_addr = dws->dma_addr;
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rxconf.src_addr = dws->dma_addr;
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rxconf.src_maxburst = LNW_DMA_MSIZE_16;
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rxconf.src_maxburst = LNW_DMA_MSIZE_16;
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rxconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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rxconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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rxconf.src_addr_width = dws->dma_width;
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rxconf.src_addr_width = convert_dma_width(dws->dma_width);
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rxconf.device_fc = false;
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rxconf.device_fc = false;
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dmaengine_slave_config(dws->rxchan, &rxconf);
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dmaengine_slave_config(dws->rxchan, &rxconf);
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@ -315,7 +315,6 @@ static int dw_spi_transfer_one(struct spi_master *master,
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{
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{
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struct dw_spi *dws = spi_master_get_devdata(master);
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struct dw_spi *dws = spi_master_get_devdata(master);
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struct chip_data *chip = spi_get_ctldata(spi);
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struct chip_data *chip = spi_get_ctldata(spi);
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u8 bits = 0;
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u8 imask = 0;
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u8 imask = 0;
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u8 cs_change = 0;
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u8 cs_change = 0;
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u16 txlevel = 0;
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u16 txlevel = 0;
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@ -357,9 +356,14 @@ static int dw_spi_transfer_one(struct spi_master *master,
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}
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}
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}
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}
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if (transfer->bits_per_word) {
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if (transfer->bits_per_word) {
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bits = transfer->bits_per_word;
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if (transfer->bits_per_word == 8) {
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dws->n_bytes = dws->dma_width = bits >> 3;
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dws->n_bytes = 1;
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cr0 = (bits - 1)
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dws->dma_width = 1;
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} else if (transfer->bits_per_word == 16) {
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dws->n_bytes = 2;
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dws->dma_width = 2;
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}
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cr0 = (transfer->bits_per_word - 1)
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| (chip->type << SPI_FRF_OFFSET)
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| (chip->type << SPI_FRF_OFFSET)
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| (spi->mode << SPI_MODE_OFFSET)
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| (spi->mode << SPI_MODE_OFFSET)
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| (chip->tmode << SPI_TMOD_OFFSET);
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| (chip->tmode << SPI_TMOD_OFFSET);
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