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arm64: dts: imx8mn: Enable cpu-idle driver

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Enable i.MX8MN cpu-idle using generic ARM cpu-idle driver, 2 states
are supported, details as below:

root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state0/name
WFI
root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state0/usage
3098
root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state1/name
cpu-pd-wait
root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state1/usage
3078

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Anson Huang 2019-09-10 11:25:18 -04:00 committed by Shawn Guo
parent c4a212695c
commit df844a9a94
1 changed files with 17 additions and 0 deletions
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17
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View file

@ -43,6 +43,19 @@ cpus {
#address-cells = <1>;
#size-cells = <0>;
idle-states {
entry-method = "psci";
cpu_pd_wait: cpu-pd-wait {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010033>;
local-timer-stop;
entry-latency-us = <1000>;
exit-latency-us = <700>;
min-residency-us = <2700>;
};
};
A53_0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
@ -54,6 +67,7 @@ A53_0: cpu@0 {
operating-points-v2 = <&a53_opp_table>;
nvmem-cells = <&cpu_speed_grade>;
nvmem-cell-names = "speed_grade";
cpu-idle-states = <&cpu_pd_wait>;
};
A53_1: cpu@1 {
@ -65,6 +79,7 @@ A53_1: cpu@1 {
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_pd_wait>;
};
A53_2: cpu@2 {
@ -76,6 +91,7 @@ A53_2: cpu@2 {
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_pd_wait>;
};
A53_3: cpu@3 {
@ -87,6 +103,7 @@ A53_3: cpu@3 {
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_pd_wait>;
};
A53_L2: l2-cache0 {