pci-v5.11-fixes-2

-----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmAce3sUHGJoZWxnYWFz
 QGdvb2dsZS5jb20ACgkQWYigwDrT+vyzpg/9GZ/uOhUwqgRAmG0hxAWR2nCD2OJC
 B6tSX8JPaFIvVaBOS3YpmEBbf12s//XM8VPwRcTRka3bXAojjGutsxo2ZB6zAPga
 tS+3xdsuote3WjpZ0wAUtorWiRJX2DnMFDBdXJaQQJuNQudNDet1tW5ByYnP6EZm
 1V/9ATW+df8c/Q8vDSEj621DdSI2cw5jf0gmj7PR6dyOsy6YyAhjQYd/IK9TFVgV
 e8/VGMV6qFKUo66g++fPSiWC8+wldYlujDYZS6xbpxyUHOSwzZAvyXiIgJ5qmqbA
 HheRTq+D762TrVyh2RzeepXi6rpJ2jO2d4wscwXQSonKs+dVhc3LnB/gW91ecTs+
 Zas5v9FWg07FRuffd2yKzfEPZudvcIHXzPX6njXfy5PReuzqJFTBq7jW0Sgx8n9e
 g0GHTqeuAOfTZx92H5ie5aDy3AXcFY1/tePmdWLSo87QeVG6K83y8O0nUYspk4Ac
 PMd5Dprz0ifID8sErhNKHpBkUncnGUxwD/MdNiOEKrjA7ppg2YWhacPhtBBV+6Eb
 GHJnpiyMXHmc31lNZXMUs8yPr4l/pDoQQjlY8PKh2zXhSmzHexj11DrVDNd6mYUr
 FlVjjoQyTxfzSFqQtY+N6Wdjusx9qXvOmB1xGOJRDH6NxSP21D0OAOdwkUFrY1pa
 d4rkoOFLnSIvKoo=
 =CzDS
 -----END PGP SIGNATURE-----

Merge tag 'pci-v5.11-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI fix from Bjorn Helgaas:
 "Revert ASPM suspend/resume fix that regressed NVMe devices (Bjorn
  Helgaas)"

* tag 'pci-v5.11-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  Revert "PCI/ASPM: Save/restore L1SS Capability for suspend/resume"
This commit is contained in:
Linus Torvalds 2021-02-04 16:05:40 -08:00
commit dd86e7fa07
3 changed files with 0 additions and 55 deletions

View file

@ -1558,7 +1558,6 @@ int pci_save_state(struct pci_dev *dev)
return i;
pci_save_ltr_state(dev);
pci_save_aspm_l1ss_state(dev);
pci_save_dpc_state(dev);
pci_save_aer_state(dev);
pci_save_ptm_state(dev);
@ -1665,7 +1664,6 @@ void pci_restore_state(struct pci_dev *dev)
* LTR itself (in the PCIe capability).
*/
pci_restore_ltr_state(dev);
pci_restore_aspm_l1ss_state(dev);
pci_restore_pcie_state(dev);
pci_restore_pasid_state(dev);
@ -3353,11 +3351,6 @@ void pci_allocate_cap_save_buffers(struct pci_dev *dev)
if (error)
pci_err(dev, "unable to allocate suspend buffer for LTR\n");
error = pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_L1SS,
2 * sizeof(u32));
if (error)
pci_err(dev, "unable to allocate suspend buffer for ASPM-L1SS\n");
pci_allocate_vc_save_buffers(dev);
}

View file

@ -582,15 +582,11 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev);
void pcie_aspm_exit_link_state(struct pci_dev *pdev);
void pcie_aspm_pm_state_change(struct pci_dev *pdev);
void pcie_aspm_powersave_config_link(struct pci_dev *pdev);
void pci_save_aspm_l1ss_state(struct pci_dev *dev);
void pci_restore_aspm_l1ss_state(struct pci_dev *dev);
#else
static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { }
static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev) { }
static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev) { }
static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { }
static inline void pci_save_aspm_l1ss_state(struct pci_dev *dev) { }
static inline void pci_restore_aspm_l1ss_state(struct pci_dev *dev) { }
#endif
#ifdef CONFIG_PCIE_ECRC

View file

@ -734,50 +734,6 @@ static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state)
PCI_L1SS_CTL1_L1SS_MASK, val);
}
void pci_save_aspm_l1ss_state(struct pci_dev *dev)
{
int aspm_l1ss;
struct pci_cap_saved_state *save_state;
u32 *cap;
if (!pci_is_pcie(dev))
return;
aspm_l1ss = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_L1SS);
if (!aspm_l1ss)
return;
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_L1SS);
if (!save_state)
return;
cap = (u32 *)&save_state->cap.data[0];
pci_read_config_dword(dev, aspm_l1ss + PCI_L1SS_CTL1, cap++);
pci_read_config_dword(dev, aspm_l1ss + PCI_L1SS_CTL2, cap++);
}
void pci_restore_aspm_l1ss_state(struct pci_dev *dev)
{
int aspm_l1ss;
struct pci_cap_saved_state *save_state;
u32 *cap;
if (!pci_is_pcie(dev))
return;
aspm_l1ss = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_L1SS);
if (!aspm_l1ss)
return;
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_L1SS);
if (!save_state)
return;
cap = (u32 *)&save_state->cap.data[0];
pci_write_config_dword(dev, aspm_l1ss + PCI_L1SS_CTL1, *cap++);
pci_write_config_dword(dev, aspm_l1ss + PCI_L1SS_CTL2, *cap++);
}
static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)
{
pcie_capability_clear_and_set_word(pdev, PCI_EXP_LNKCTL,