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ARM: dts: sunxi: Fix DE2 clocks register range

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As it can be seen from DE2 manual, clock range is 0x10000.

Fix it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 73f122c827 ("ARM: dts: sun8i: a83t: Add display pipeline")
Fixes: 05a43a262d ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Fixes: 21b2992093 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline")
Fixes: d8c6f1f029 ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3")
[wens@csie.org: added fixes tags]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Jernej Skrabec 2020-01-25 00:20:09 +01:00 committed by Chen-Yu Tsai
parent 2345b744f4
commit da18032258
4 changed files with 4 additions and 4 deletions
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2
arch/arm/boot/dts/sun8i-a83t.dtsi
View file

@ -314,7 +314,7 @@ soc {
display_clocks: clock@1000000 { display_clocks: clock@1000000 {
compatible = "allwinner,sun8i-a83t-de2-clk"; compatible = "allwinner,sun8i-a83t-de2-clk";
reg = <0x01000000 0x100000>; reg = <0x01000000 0x10000>;
clocks = <&ccu CLK_BUS_DE>, clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_PLL_DE>; <&ccu CLK_PLL_DE>;
clock-names = "bus", clock-names = "bus",

2
arch/arm/boot/dts/sun8i-r40.dtsi
View file

@ -136,7 +136,7 @@ soc {
display_clocks: clock@1000000 { display_clocks: clock@1000000 {
compatible = "allwinner,sun8i-r40-de2-clk", compatible = "allwinner,sun8i-r40-de2-clk",
"allwinner,sun8i-h3-de2-clk"; "allwinner,sun8i-h3-de2-clk";
reg = <0x01000000 0x100000>; reg = <0x01000000 0x10000>;
clocks = <&ccu CLK_BUS_DE>, clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_DE>; <&ccu CLK_DE>;
clock-names = "bus", clock-names = "bus",

2
arch/arm/boot/dts/sun8i-v3s.dtsi
View file

@ -105,7 +105,7 @@ soc {
display_clocks: clock@1000000 { display_clocks: clock@1000000 {
compatible = "allwinner,sun8i-v3s-de2-clk"; compatible = "allwinner,sun8i-v3s-de2-clk";
reg = <0x01000000 0x100000>; reg = <0x01000000 0x10000>;
clocks = <&ccu CLK_BUS_DE>, clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_DE>; <&ccu CLK_DE>;
clock-names = "bus", clock-names = "bus",

2
arch/arm/boot/dts/sunxi-h3-h5.dtsi
View file

@ -114,7 +114,7 @@ soc {
display_clocks: clock@1000000 { display_clocks: clock@1000000 {
/* compatible is in per SoC .dtsi file */ /* compatible is in per SoC .dtsi file */
reg = <0x01000000 0x100000>; reg = <0x01000000 0x10000>;
clocks = <&ccu CLK_BUS_DE>, clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_DE>; <&ccu CLK_DE>;
clock-names = "bus", clock-names = "bus",