From 2a7db0d6eb5e76197ced6bf7f2519011ead809a9 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Fri, 12 Mar 2021 10:42:03 +0530 Subject: [PATCH 01/10] dt-bindings: mailbox: Add compatible for SM8350 IPCC Add the compatible string for SM8350 IPCC block on this SoC Signed-off-by: Vinod Koul Reviewed-by: Bjorn Andersson Signed-off-by: Jassi Brar --- Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml index 168beeb7e9f7..fe17ba9b84f2 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml @@ -25,6 +25,7 @@ properties: items: - enum: - qcom,sm8250-ipcc + - qcom,sm8350-ipcc - const: qcom,ipcc reg: From 3cfc7489667bcd2ab4eb1638ec7bc8b67c6324d0 Mon Sep 17 00:00:00 2001 From: Yang Li Date: Wed, 3 Mar 2021 17:05:04 +0800 Subject: [PATCH 02/10] mailbox: pcc: fix platform_no_drv_owner.cocci warnings ./drivers/mailbox/pcc.c:580:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Reported-by: Abaci Robot Signed-off-by: Yang Li Signed-off-by: Jassi Brar --- drivers/mailbox/pcc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c index ef9ecd1f5958..4b1a2d2a3d7b 100644 --- a/drivers/mailbox/pcc.c +++ b/drivers/mailbox/pcc.c @@ -577,7 +577,6 @@ static struct platform_driver pcc_mbox_driver = { .probe = pcc_mbox_probe, .driver = { .name = "PCCT", - .owner = THIS_MODULE, }, }; From 9d2e8b93236a45f20ae0b71cc507301111cc2f58 Mon Sep 17 00:00:00 2001 From: Tom Saeger Date: Fri, 12 Mar 2021 19:31:10 -0700 Subject: [PATCH 03/10] mailbox: fix various typos in comments Fix trivial typos in mailbox driver comments. s/Intergrated/Integrated/ s/extenstion/extension/ s/atleast/at least/ s/commnunication/communication/ s/assgined/assigned/ s/commnunication/communication/ s/recevied/received/ s/succeded/succeeded/ s/implmentation/implementation/ s/definiation/definition/ s/traget/target/ s/wont/won't/ Cc: trivial@kernel.org Signed-off-by: Tom Saeger Reviewed-by: Randy Dunlap Signed-off-by: Jassi Brar --- drivers/mailbox/Kconfig | 2 +- drivers/mailbox/bcm-flexrm-mailbox.c | 4 ++-- drivers/mailbox/mailbox-xgene-slimpro.c | 6 +++--- drivers/mailbox/mailbox.h | 2 +- drivers/mailbox/pcc.c | 2 +- drivers/mailbox/pl320-ipc.c | 2 +- drivers/mailbox/sprd-mailbox.c | 12 ++++++------ drivers/mailbox/ti-msgmgr.c | 2 +- 8 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index f4abe3529acd..68de2c6af727 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -78,7 +78,7 @@ config OMAP_MBOX_KFIFO_SIZE module parameter). config ROCKCHIP_MBOX - bool "Rockchip Soc Intergrated Mailbox Support" + bool "Rockchip Soc Integrated Mailbox Support" depends on ARCH_ROCKCHIP || COMPILE_TEST help This driver provides support for inter-processor communication diff --git a/drivers/mailbox/bcm-flexrm-mailbox.c b/drivers/mailbox/bcm-flexrm-mailbox.c index bee33abb5308..b4f33dc399a0 100644 --- a/drivers/mailbox/bcm-flexrm-mailbox.c +++ b/drivers/mailbox/bcm-flexrm-mailbox.c @@ -423,7 +423,7 @@ static void flexrm_enqueue_desc(u32 nhpos, u32 nhcnt, u32 reqid, * * In general use, number of non-HEADER descriptors can easily go * beyond 31. To tackle this situation, we have packet (or request) - * extenstion bits (STARTPKT and ENDPKT) in the HEADER descriptor. + * extension bits (STARTPKT and ENDPKT) in the HEADER descriptor. * * To use packet extension, the first HEADER descriptor of request * (or packet) will have STARTPKT=1 and ENDPKT=0. The intermediate @@ -1095,7 +1095,7 @@ static int flexrm_process_completions(struct flexrm_ring *ring) /* * Get current completion read and write offset * - * Note: We should read completion write pointer atleast once + * Note: We should read completion write pointer at least once * after we get a MSI interrupt because HW maintains internal * MSI status which will allow next MSI interrupt only after * completion write pointer is read. diff --git a/drivers/mailbox/mailbox-xgene-slimpro.c b/drivers/mailbox/mailbox-xgene-slimpro.c index de260799f1b9..5b3a2dcd5955 100644 --- a/drivers/mailbox/mailbox-xgene-slimpro.c +++ b/drivers/mailbox/mailbox-xgene-slimpro.c @@ -51,10 +51,10 @@ struct slimpro_mbox_chan { /** * X-Gene SlimPRO Mailbox controller data * - * X-Gene SlimPRO Mailbox controller has 8 commnunication channels. - * Each channel has a separate IRQ number assgined to it. + * X-Gene SlimPRO Mailbox controller has 8 communication channels. + * Each channel has a separate IRQ number assigned to it. * - * @mb_ctrl: Representation of the commnunication channel controller + * @mb_ctrl: Representation of the communication channel controller * @mc: Array of SlimPRO mailbox channels of the controller * @chans: Array of mailbox communication channels * diff --git a/drivers/mailbox/mailbox.h b/drivers/mailbox/mailbox.h index 4e3cc4426513..046d6d258b32 100644 --- a/drivers/mailbox/mailbox.h +++ b/drivers/mailbox/mailbox.h @@ -5,6 +5,6 @@ #define TXDONE_BY_IRQ BIT(0) /* controller has remote RTR irq */ #define TXDONE_BY_POLL BIT(1) /* controller can read status of last TX */ -#define TXDONE_BY_ACK BIT(2) /* S/W ACK recevied by Client ticks the TX */ +#define TXDONE_BY_ACK BIT(2) /* S/W ACK received by Client ticks the TX */ #endif /* __MAILBOX_H */ diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c index 4b1a2d2a3d7b..0296558f9e22 100644 --- a/drivers/mailbox/pcc.c +++ b/drivers/mailbox/pcc.c @@ -32,7 +32,7 @@ * * Client writes WRITE cmd in communication region cmd address. * * Client issues mbox_send_message() which rings the PCC doorbell * for its PCC channel. - * * If command completes, then writes have succeded and it can release + * * If command completes, then writes have succeeded and it can release * the channel lock. * * There is a Nominal latency defined for each channel which indicates diff --git a/drivers/mailbox/pl320-ipc.c b/drivers/mailbox/pl320-ipc.c index 25e0b6f7a10f..fbcf07930390 100644 --- a/drivers/mailbox/pl320-ipc.c +++ b/drivers/mailbox/pl320-ipc.c @@ -73,7 +73,7 @@ static u32 __ipc_rcv(int mbox, u32 *data) return data[1]; } -/* blocking implmentation from the A9 side, not usuable in interrupts! */ +/* blocking implementation from the A9 side, not usable in interrupts! */ int pl320_ipc_transmit(u32 *data) { int ret; diff --git a/drivers/mailbox/sprd-mailbox.c b/drivers/mailbox/sprd-mailbox.c index 4c325301a2fe..56b34a67ff1a 100644 --- a/drivers/mailbox/sprd-mailbox.c +++ b/drivers/mailbox/sprd-mailbox.c @@ -25,28 +25,28 @@ #define SPRD_MBOX_LOCK 0x20 #define SPRD_MBOX_FIFO_DEPTH 0x24 -/* Bit and mask definiation for inbox's SPRD_MBOX_FIFO_STS register */ +/* Bit and mask definition for inbox's SPRD_MBOX_FIFO_STS register */ #define SPRD_INBOX_FIFO_DELIVER_MASK GENMASK(23, 16) #define SPRD_INBOX_FIFO_OVERLOW_MASK GENMASK(15, 8) #define SPRD_INBOX_FIFO_DELIVER_SHIFT 16 #define SPRD_INBOX_FIFO_BUSY_MASK GENMASK(7, 0) -/* Bit and mask definiation for SPRD_MBOX_IRQ_STS register */ +/* Bit and mask definition for SPRD_MBOX_IRQ_STS register */ #define SPRD_MBOX_IRQ_CLR BIT(0) -/* Bit and mask definiation for outbox's SPRD_MBOX_FIFO_STS register */ +/* Bit and mask definition for outbox's SPRD_MBOX_FIFO_STS register */ #define SPRD_OUTBOX_FIFO_FULL BIT(2) #define SPRD_OUTBOX_FIFO_WR_SHIFT 16 #define SPRD_OUTBOX_FIFO_RD_SHIFT 24 #define SPRD_OUTBOX_FIFO_POS_MASK GENMASK(7, 0) -/* Bit and mask definiation for inbox's SPRD_MBOX_IRQ_MSK register */ +/* Bit and mask definition for inbox's SPRD_MBOX_IRQ_MSK register */ #define SPRD_INBOX_FIFO_BLOCK_IRQ BIT(0) #define SPRD_INBOX_FIFO_OVERFLOW_IRQ BIT(1) #define SPRD_INBOX_FIFO_DELIVER_IRQ BIT(2) #define SPRD_INBOX_FIFO_IRQ_MASK GENMASK(2, 0) -/* Bit and mask definiation for outbox's SPRD_MBOX_IRQ_MSK register */ +/* Bit and mask definition for outbox's SPRD_MBOX_IRQ_MSK register */ #define SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ BIT(0) #define SPRD_OUTBOX_FIFO_IRQ_MASK GENMASK(4, 0) @@ -150,7 +150,7 @@ static irqreturn_t sprd_mbox_inbox_isr(int irq, void *data) chan = &priv->chan[id]; /* - * Check if the message was fetched by remote traget, if yes, + * Check if the message was fetched by remote target, if yes, * that means the transmission has been completed. */ busy = fifo_sts & SPRD_INBOX_FIFO_BUSY_MASK; diff --git a/drivers/mailbox/ti-msgmgr.c b/drivers/mailbox/ti-msgmgr.c index 0130628f4d9d..efb43b038596 100644 --- a/drivers/mailbox/ti-msgmgr.c +++ b/drivers/mailbox/ti-msgmgr.c @@ -239,7 +239,7 @@ static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) /* * I have no idea about the protocol being used to communicate with the - * remote producer - 0 could be valid data, so I wont make a judgement + * remote producer - 0 could be valid data, so I won't make a judgement * of how many bytes I should be reading. Let the client figure this * out.. I just read the full message and pass it on.. */ From a8f96891077ec0a2226904fd84e36d2398d79cb4 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 11 Mar 2021 15:13:28 -0800 Subject: [PATCH 04/10] MAINTAINERS: Add DT bindings directory to mailbox DT bindings related to mailbox drivers are typically picked by the mailbox maintainer, so add the binding folder to the maintainers entry to make sure get_maintainer finds it. Signed-off-by: Bjorn Andersson Signed-off-by: Jassi Brar --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index c80ad735b384..b672db4616af 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10604,6 +10604,7 @@ S: Maintained F: drivers/mailbox/ F: include/linux/mailbox_client.h F: include/linux/mailbox_controller.h +F: Documentation/devicetree/bindings/mailbox/ MAILBOX ARM MHUv2 M: Viresh Kumar From 9468ab84032f96496e998cfa173cd1d0ac316bcd Mon Sep 17 00:00:00 2001 From: Orson Zhai Date: Fri, 19 Mar 2021 14:15:35 +0800 Subject: [PATCH 05/10] mailbox: sprd: Introduce refcnt when clients requests/free channels Unisoc mailbox has no way to be enabled/disabled for any single channel. They can only be set to startup or shutdown as a whole device at same time. Add a variable to count references to avoid mailbox FIFO being reset unexpectedly when clients are requesting or freeing channels. Also add a lock to dismiss possible conflicts from register r/w in different startup or shutdown threads. And fix the crash problem when early interrupts come from channel which has not been requested by client yet. Fixes: ca27fc26cd22 ("mailbox: sprd: Add Spreadtrum mailbox driver") Signed-off-by: Orson Zhai Reviewed-by: Baolin Wang Signed-off-by: Jassi Brar --- drivers/mailbox/sprd-mailbox.c | 43 +++++++++++++++++++++++----------- 1 file changed, 29 insertions(+), 14 deletions(-) diff --git a/drivers/mailbox/sprd-mailbox.c b/drivers/mailbox/sprd-mailbox.c index 56b34a67ff1a..be0bca9837c4 100644 --- a/drivers/mailbox/sprd-mailbox.c +++ b/drivers/mailbox/sprd-mailbox.c @@ -60,6 +60,8 @@ struct sprd_mbox_priv { struct clk *clk; u32 outbox_fifo_depth; + struct mutex lock; + u32 refcnt; struct mbox_chan chan[SPRD_MBOX_CHAN_MAX]; }; @@ -115,7 +117,11 @@ static irqreturn_t sprd_mbox_outbox_isr(int irq, void *data) id = readl(priv->outbox_base + SPRD_MBOX_ID); chan = &priv->chan[id]; - mbox_chan_received_data(chan, (void *)msg); + if (chan->cl) + mbox_chan_received_data(chan, (void *)msg); + else + dev_warn_ratelimited(priv->dev, + "message's been dropped at ch[%d]\n", id); /* Trigger to update outbox FIFO pointer */ writel(0x1, priv->outbox_base + SPRD_MBOX_TRIGGER); @@ -215,18 +221,22 @@ static int sprd_mbox_startup(struct mbox_chan *chan) struct sprd_mbox_priv *priv = to_sprd_mbox_priv(chan->mbox); u32 val; - /* Select outbox FIFO mode and reset the outbox FIFO status */ - writel(0x0, priv->outbox_base + SPRD_MBOX_FIFO_RST); + mutex_lock(&priv->lock); + if (priv->refcnt++ == 0) { + /* Select outbox FIFO mode and reset the outbox FIFO status */ + writel(0x0, priv->outbox_base + SPRD_MBOX_FIFO_RST); - /* Enable inbox FIFO overflow and delivery interrupt */ - val = readl(priv->inbox_base + SPRD_MBOX_IRQ_MSK); - val &= ~(SPRD_INBOX_FIFO_OVERFLOW_IRQ | SPRD_INBOX_FIFO_DELIVER_IRQ); - writel(val, priv->inbox_base + SPRD_MBOX_IRQ_MSK); + /* Enable inbox FIFO overflow and delivery interrupt */ + val = readl(priv->inbox_base + SPRD_MBOX_IRQ_MSK); + val &= ~(SPRD_INBOX_FIFO_OVERFLOW_IRQ | SPRD_INBOX_FIFO_DELIVER_IRQ); + writel(val, priv->inbox_base + SPRD_MBOX_IRQ_MSK); - /* Enable outbox FIFO not empty interrupt */ - val = readl(priv->outbox_base + SPRD_MBOX_IRQ_MSK); - val &= ~SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ; - writel(val, priv->outbox_base + SPRD_MBOX_IRQ_MSK); + /* Enable outbox FIFO not empty interrupt */ + val = readl(priv->outbox_base + SPRD_MBOX_IRQ_MSK); + val &= ~SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ; + writel(val, priv->outbox_base + SPRD_MBOX_IRQ_MSK); + } + mutex_unlock(&priv->lock); return 0; } @@ -235,9 +245,13 @@ static void sprd_mbox_shutdown(struct mbox_chan *chan) { struct sprd_mbox_priv *priv = to_sprd_mbox_priv(chan->mbox); - /* Disable inbox & outbox interrupt */ - writel(SPRD_INBOX_FIFO_IRQ_MASK, priv->inbox_base + SPRD_MBOX_IRQ_MSK); - writel(SPRD_OUTBOX_FIFO_IRQ_MASK, priv->outbox_base + SPRD_MBOX_IRQ_MSK); + mutex_lock(&priv->lock); + if (--priv->refcnt == 0) { + /* Disable inbox & outbox interrupt */ + writel(SPRD_INBOX_FIFO_IRQ_MASK, priv->inbox_base + SPRD_MBOX_IRQ_MSK); + writel(SPRD_OUTBOX_FIFO_IRQ_MASK, priv->outbox_base + SPRD_MBOX_IRQ_MSK); + } + mutex_unlock(&priv->lock); } static const struct mbox_chan_ops sprd_mbox_ops = { @@ -266,6 +280,7 @@ static int sprd_mbox_probe(struct platform_device *pdev) return -ENOMEM; priv->dev = dev; + mutex_init(&priv->lock); /* * The Spreadtrum mailbox uses an inbox to send messages to the target From 6203b954fc2360e272846da168cfe77dffdb6da9 Mon Sep 17 00:00:00 2001 From: Orson Zhai Date: Fri, 19 Mar 2021 14:15:36 +0800 Subject: [PATCH 06/10] dt-bindings: mailbox: Add interrupt-names to SPRD mailbox We add an optional supp-outbox interrupt support to SPRD mailbox driver with newly added sc9863a support and change to configure interrupts with names in device tree files. Signed-off-by: Orson Zhai Reviewed-by: Rob Herring Signed-off-by: Jassi Brar --- .../devicetree/bindings/mailbox/sprd-mailbox.yaml | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml index 26a5cca3f838..80feba82cbd6 100644 --- a/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml @@ -15,6 +15,7 @@ properties: compatible: enum: - sprd,sc9860-mailbox + - sprd,sc9863a-mailbox reg: items: @@ -22,9 +23,15 @@ properties: - description: outbox registers' base address interrupts: + minItems: 2 + maxItems: 3 + + interrupt-names: + minItems: 2 items: - - description: inbox interrupt - - description: outbox interrupt + - const: inbox + - const: outbox + - const: supp-outbox clocks: maxItems: 1 @@ -40,6 +47,7 @@ required: - compatible - reg - interrupts + - interrupt-names - "#mbox-cells" - clocks - clock-names @@ -56,5 +64,6 @@ examples: clock-names = "enable"; clocks = <&aon_gate 53>; interrupts = , ; + interrupt-names = "inbox", "outbox"; }; ... From 6457f4cd7810fdd1bd7d261845898292e632ede8 Mon Sep 17 00:00:00 2001 From: Orson Zhai Date: Fri, 19 Mar 2021 14:15:37 +0800 Subject: [PATCH 07/10] mailbox: sprd: Add supplementary inbox support Some sensors connected to Unisoc mailbox will send data very frequently. This makes channel 0 very busy and the messages from other remote cores not able to be handled as soon as possible. It's a trick (un-documented) from Unisoc ASIC designers to resolve this special requirement that an inbox assigned to one of the remote cores before was modified to be exposed to host cpu core. Then from host side, a supplementary inbox is added for transferring mass but not emergency messages from the remote cores, such as step counting sensor, with an independent FIFO and interrupt which is as same as channel 0. Meanwihle, inbox part of this channel is still kept for original remote core to use. Signed-off-by: Orson Zhai Reviewed-by: Baolin Wang Signed-off-by: Jassi Brar --- drivers/mailbox/sprd-mailbox.c | 88 +++++++++++++++++++++++++++------- 1 file changed, 71 insertions(+), 17 deletions(-) diff --git a/drivers/mailbox/sprd-mailbox.c b/drivers/mailbox/sprd-mailbox.c index be0bca9837c4..e3c899abeed8 100644 --- a/drivers/mailbox/sprd-mailbox.c +++ b/drivers/mailbox/sprd-mailbox.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -50,13 +51,17 @@ #define SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ BIT(0) #define SPRD_OUTBOX_FIFO_IRQ_MASK GENMASK(4, 0) +#define SPRD_OUTBOX_BASE_SPAN 0x1000 #define SPRD_MBOX_CHAN_MAX 8 +#define SPRD_SUPP_INBOX_ID_SC9863A 7 struct sprd_mbox_priv { struct mbox_controller mbox; struct device *dev; void __iomem *inbox_base; void __iomem *outbox_base; + /* Base register address for supplementary outbox */ + void __iomem *supp_base; struct clk *clk; u32 outbox_fifo_depth; @@ -96,14 +101,13 @@ static u32 sprd_mbox_get_fifo_len(struct sprd_mbox_priv *priv, u32 fifo_sts) return fifo_len; } -static irqreturn_t sprd_mbox_outbox_isr(int irq, void *data) +static irqreturn_t do_outbox_isr(void __iomem *base, struct sprd_mbox_priv *priv) { - struct sprd_mbox_priv *priv = data; struct mbox_chan *chan; u32 fifo_sts, fifo_len, msg[2]; int i, id; - fifo_sts = readl(priv->outbox_base + SPRD_MBOX_FIFO_STS); + fifo_sts = readl(base + SPRD_MBOX_FIFO_STS); fifo_len = sprd_mbox_get_fifo_len(priv, fifo_sts); if (!fifo_len) { @@ -112,9 +116,9 @@ static irqreturn_t sprd_mbox_outbox_isr(int irq, void *data) } for (i = 0; i < fifo_len; i++) { - msg[0] = readl(priv->outbox_base + SPRD_MBOX_MSG_LOW); - msg[1] = readl(priv->outbox_base + SPRD_MBOX_MSG_HIGH); - id = readl(priv->outbox_base + SPRD_MBOX_ID); + msg[0] = readl(base + SPRD_MBOX_MSG_LOW); + msg[1] = readl(base + SPRD_MBOX_MSG_HIGH); + id = readl(base + SPRD_MBOX_ID); chan = &priv->chan[id]; if (chan->cl) @@ -124,15 +128,29 @@ static irqreturn_t sprd_mbox_outbox_isr(int irq, void *data) "message's been dropped at ch[%d]\n", id); /* Trigger to update outbox FIFO pointer */ - writel(0x1, priv->outbox_base + SPRD_MBOX_TRIGGER); + writel(0x1, base + SPRD_MBOX_TRIGGER); } /* Clear irq status after reading all message. */ - writel(SPRD_MBOX_IRQ_CLR, priv->outbox_base + SPRD_MBOX_IRQ_STS); + writel(SPRD_MBOX_IRQ_CLR, base + SPRD_MBOX_IRQ_STS); return IRQ_HANDLED; } +static irqreturn_t sprd_mbox_outbox_isr(int irq, void *data) +{ + struct sprd_mbox_priv *priv = data; + + return do_outbox_isr(priv->outbox_base, priv); +} + +static irqreturn_t sprd_mbox_supp_isr(int irq, void *data) +{ + struct sprd_mbox_priv *priv = data; + + return do_outbox_isr(priv->supp_base, priv); +} + static irqreturn_t sprd_mbox_inbox_isr(int irq, void *data) { struct sprd_mbox_priv *priv = data; @@ -235,6 +253,14 @@ static int sprd_mbox_startup(struct mbox_chan *chan) val = readl(priv->outbox_base + SPRD_MBOX_IRQ_MSK); val &= ~SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ; writel(val, priv->outbox_base + SPRD_MBOX_IRQ_MSK); + + /* Enable supplementary outbox as the fundamental one */ + if (priv->supp_base) { + writel(0x0, priv->supp_base + SPRD_MBOX_FIFO_RST); + val = readl(priv->supp_base + SPRD_MBOX_IRQ_MSK); + val &= ~SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ; + writel(val, priv->supp_base + SPRD_MBOX_IRQ_MSK); + } } mutex_unlock(&priv->lock); @@ -250,6 +276,10 @@ static void sprd_mbox_shutdown(struct mbox_chan *chan) /* Disable inbox & outbox interrupt */ writel(SPRD_INBOX_FIFO_IRQ_MASK, priv->inbox_base + SPRD_MBOX_IRQ_MSK); writel(SPRD_OUTBOX_FIFO_IRQ_MASK, priv->outbox_base + SPRD_MBOX_IRQ_MSK); + + if (priv->supp_base) + writel(SPRD_OUTBOX_FIFO_IRQ_MASK, + priv->supp_base + SPRD_MBOX_IRQ_MSK); } mutex_unlock(&priv->lock); } @@ -272,8 +302,8 @@ static int sprd_mbox_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct sprd_mbox_priv *priv; - int ret, inbox_irq, outbox_irq; - unsigned long id; + int ret, inbox_irq, outbox_irq, supp_irq; + unsigned long id, supp; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -283,11 +313,15 @@ static int sprd_mbox_probe(struct platform_device *pdev) mutex_init(&priv->lock); /* - * The Spreadtrum mailbox uses an inbox to send messages to the target - * core, and uses an outbox to receive messages from other cores. + * Unisoc mailbox uses an inbox to send messages to the target + * core, and uses (an) outbox(es) to receive messages from other + * cores. * - * Thus the mailbox controller supplies 2 different register addresses - * and IRQ numbers for inbox and outbox. + * Thus in general the mailbox controller supplies 2 different + * register addresses and IRQ numbers for inbox and outbox. + * + * If necessary, a supplementary inbox could be enabled optionally + * with an independent FIFO and an extra interrupt. */ priv->inbox_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->inbox_base)) @@ -313,7 +347,7 @@ static int sprd_mbox_probe(struct platform_device *pdev) return ret; } - inbox_irq = platform_get_irq(pdev, 0); + inbox_irq = platform_get_irq_byname(pdev, "inbox"); if (inbox_irq < 0) return inbox_irq; @@ -324,7 +358,7 @@ static int sprd_mbox_probe(struct platform_device *pdev) return ret; } - outbox_irq = platform_get_irq(pdev, 1); + outbox_irq = platform_get_irq_byname(pdev, "outbox"); if (outbox_irq < 0) return outbox_irq; @@ -335,6 +369,24 @@ static int sprd_mbox_probe(struct platform_device *pdev) return ret; } + /* Supplementary outbox IRQ is optional */ + supp_irq = platform_get_irq_byname(pdev, "supp-outbox"); + if (supp_irq > 0) { + ret = devm_request_irq(dev, supp_irq, sprd_mbox_supp_isr, + IRQF_NO_SUSPEND, dev_name(dev), priv); + if (ret) { + dev_err(dev, "failed to request outbox IRQ: %d\n", ret); + return ret; + } + + supp = (unsigned long) of_device_get_match_data(dev); + if (!supp) { + dev_err(dev, "no supplementary outbox specified\n"); + return -ENODEV; + } + priv->supp_base = priv->outbox_base + (SPRD_OUTBOX_BASE_SPAN * supp); + } + /* Get the default outbox FIFO depth */ priv->outbox_fifo_depth = readl(priv->outbox_base + SPRD_MBOX_FIFO_DEPTH) + 1; @@ -357,7 +409,9 @@ static int sprd_mbox_probe(struct platform_device *pdev) } static const struct of_device_id sprd_mbox_of_match[] = { - { .compatible = "sprd,sc9860-mailbox", }, + { .compatible = "sprd,sc9860-mailbox" }, + { .compatible = "sprd,sc9863a-mailbox", + .data = (void *)SPRD_SUPP_INBOX_ID_SC9863A }, { }, }; MODULE_DEVICE_TABLE(of, sprd_mbox_of_match); From a683246a069b13bb661033b8cda0355686b85443 Mon Sep 17 00:00:00 2001 From: Qiheng Lin Date: Fri, 9 Apr 2021 19:07:54 +0800 Subject: [PATCH 08/10] mailbox: arm_mhu_db: Remove redundant dev_err call in mhu_db_probe() There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Reported-by: Hulk Robot Signed-off-by: Qiheng Lin Signed-off-by: Jassi Brar --- drivers/mailbox/arm_mhu_db.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/mailbox/arm_mhu_db.c b/drivers/mailbox/arm_mhu_db.c index 8eb66c4ecf5b..8674153cc893 100644 --- a/drivers/mailbox/arm_mhu_db.c +++ b/drivers/mailbox/arm_mhu_db.c @@ -278,10 +278,8 @@ static int mhu_db_probe(struct amba_device *adev, const struct amba_id *id) return -ENOMEM; mhu->base = devm_ioremap_resource(dev, &adev->res); - if (IS_ERR(mhu->base)) { - dev_err(dev, "ioremap failed\n"); + if (IS_ERR(mhu->base)) return PTR_ERR(mhu->base); - } chans = devm_kcalloc(dev, max_chans, sizeof(*chans), GFP_KERNEL); if (!chans) From 93fb0c8df6d2f24957c441bbba52e5efc9aa0b03 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Thu, 15 Apr 2021 19:59:53 -0500 Subject: [PATCH 09/10] dt-bindings: mailbox: ti,secure-proxy: Convert to json schema Convert the ti,secure-proxy to yaml for better checks and documentation. Differences being mostly in the examples: - Dropped the example usage of mailbox client, it is better done in tisci node definition. - Switched reg usage for address-cells and size-cells 1 - aligned with schema checks as well. - included header in example for a buildable example. While at this, lets make sure to support upto 100 rx threads even though typically upto 1 threads is practically in use. NOTE: The following checkpatch warning is generated since we do include the header in the example, but this is a false positive warning. WARNING: DT binding docs and includes should be a separate patch. See: Documentation/devicetree/bindings/submitting-patches.rst Signed-off-by: Nishanth Menon Reviewed-by: Rob Herring Signed-off-by: Jassi Brar --- .../bindings/mailbox/ti,secure-proxy.txt | 50 ------------ .../bindings/mailbox/ti,secure-proxy.yaml | 79 +++++++++++++++++++ 2 files changed, 79 insertions(+), 50 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mailbox/ti,secure-proxy.txt create mode 100644 Documentation/devicetree/bindings/mailbox/ti,secure-proxy.yaml diff --git a/Documentation/devicetree/bindings/mailbox/ti,secure-proxy.txt b/Documentation/devicetree/bindings/mailbox/ti,secure-proxy.txt deleted file mode 100644 index 6c9c7daf0f5c..000000000000 --- a/Documentation/devicetree/bindings/mailbox/ti,secure-proxy.txt +++ /dev/null @@ -1,50 +0,0 @@ -Texas Instruments' Secure Proxy -======================================== - -The Texas Instruments' secure proxy is a mailbox controller that has -configurable queues selectable at SoC(System on Chip) integration. The -Message manager is broken up into different address regions that are -called "threads" or "proxies" - each instance is unidirectional and is -instantiated at SoC integration level by system controller to indicate -receive or transmit path. - -Message Manager Device Node: -=========================== -Required properties: --------------------- -- compatible: Shall be "ti,am654-secure-proxy" -- reg-names target_data - Map the proxy data region - rt - Map the realtime status region - scfg - Map the configuration region -- reg: Contains the register map per reg-names. -- #mbox-cells Shall be 1 and shall refer to the transfer path - called thread. -- interrupt-names: Contains interrupt names matching the rx transfer path - for a given SoC. Receive interrupts shall be of the - format: "rx_". -- interrupts: Contains the interrupt information corresponding to - interrupt-names property. - -Example(AM654): ------------- - - secure_proxy: mailbox@32c00000 { - compatible = "ti,am654-secure-proxy"; - #mbox-cells = <1>; - reg-names = "target_data", "rt", "scfg"; - reg = <0x0 0x32c00000 0x0 0x100000>, - <0x0 0x32400000 0x0 0x100000>, - <0x0 0x32800000 0x0 0x100000>; - interrupt-names = "rx_011"; - interrupts = ; - }; - - dmsc: dmsc { - [...] - mbox-names = "rx", "tx"; - # RX Thread ID is 11 - # TX Thread ID is 13 - mboxes= <&secure_proxy 11>, - <&secure_proxy 13>; - [...] - }; diff --git a/Documentation/devicetree/bindings/mailbox/ti,secure-proxy.yaml b/Documentation/devicetree/bindings/mailbox/ti,secure-proxy.yaml new file mode 100644 index 000000000000..eea822861804 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/ti,secure-proxy.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/ti,secure-proxy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments' Secure Proxy + +maintainers: + - Nishanth Menon + +description: | + The Texas Instruments' secure proxy is a mailbox controller that has + configurable queues selectable at SoC(System on Chip) integration. The + Message manager is broken up into different address regions that are + called "threads" or "proxies" - each instance is unidirectional and is + instantiated at SoC integration level by system controller to indicate + receive or transmit path. + +properties: + $nodename: + pattern: "^mailbox@[0-9a-f]+$" + + compatible: + const: ti,am654-secure-proxy + + "#mbox-cells": + const: 1 + description: + Contains the secure proxy thread ID used for the specific transfer path. + + reg-names: + items: + - const: target_data + - const: rt + - const: scfg + + reg: + minItems: 3 + + interrupt-names: + minItems: 1 + maxItems: 100 + items: + pattern: "^rx_[0-9]{3}$" + description: + Contains the interrupt name information for the Rx interrupt path for + secure proxy thread in the form 'rx_'. + + interrupts: + minItems: 1 + maxItems: 100 + description: + Contains the interrupt information for the Rx interrupt path for secure + proxy. + +required: + - compatible + - reg-names + - reg + - interrupt-names + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + #include + secure_proxy: mailbox@32c00000 { + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg-names = "target_data", "rt", "scfg"; + reg = <0x32c00000 0x100000>, + <0x32400000 0x100000>, + <0x32800000 0x100000>; + interrupt-names = "rx_011"; + interrupts = ; + }; From 2335f556b3afadbee6548456f543f53ac3d1af42 Mon Sep 17 00:00:00 2001 From: Sai Prakash Ranjan Date: Tue, 16 Mar 2021 00:14:10 +0530 Subject: [PATCH 10/10] dt-bindings: mailbox: qcom-ipcc: Add compatible for SC7280 Add IPCC compatible for SC7280 SoC. Signed-off-by: Sai Prakash Ranjan Reviewed-by: Manivannan Sadhasivam Reviewed-by: Stephen Boyd Acked-by: Rob Herring Signed-off-by: Jassi Brar --- Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml index fe17ba9b84f2..b222f993b232 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml @@ -26,6 +26,7 @@ properties: - enum: - qcom,sm8250-ipcc - qcom,sm8350-ipcc + - qcom,sc7280-ipcc - const: qcom,ipcc reg: