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https://github.com/torvalds/linux
synced 2024-09-06 18:01:05 +00:00
MIPS: SMP: Allow boot_secondary SMP op to return errors
Allow the boot_secondary SMP op to return an error to __cpu_up(), which will in turn return it to its caller. This will allow SMP implementations to return errors quickly in cases they they know have failed, rather than relying upon __cpu_up() eventually timing out waiting for the cpu_running completion. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17014/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -205,7 +205,7 @@ int plat_post_relocation(long offset)
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* Firmware CPU startup hook
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*
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*/
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static void octeon_boot_secondary(int cpu, struct task_struct *idle)
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static int octeon_boot_secondary(int cpu, struct task_struct *idle)
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{
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int count;
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@ -223,8 +223,12 @@ static void octeon_boot_secondary(int cpu, struct task_struct *idle)
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udelay(1);
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count--;
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}
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if (count == 0)
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if (count == 0) {
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pr_err("Secondary boot timeout\n");
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return -ETIMEDOUT;
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}
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return 0;
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}
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/**
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@ -26,7 +26,7 @@ struct plat_smp_ops {
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void (*send_ipi_mask)(const struct cpumask *mask, unsigned int action);
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void (*init_secondary)(void);
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void (*smp_finish)(void);
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void (*boot_secondary)(int cpu, struct task_struct *idle);
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int (*boot_secondary)(int cpu, struct task_struct *idle);
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void (*smp_setup)(void);
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void (*prepare_cpus)(unsigned int max_cpus);
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#ifdef CONFIG_HOTPLUG_CPU
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@ -179,7 +179,7 @@ static void bmips_prepare_cpus(unsigned int max_cpus)
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/*
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* Tell the hardware to boot CPUx - runs on CPU0
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*/
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static void bmips_boot_secondary(int cpu, struct task_struct *idle)
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static int bmips_boot_secondary(int cpu, struct task_struct *idle)
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{
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bmips_smp_boot_sp = __KSTK_TOS(idle);
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bmips_smp_boot_gp = (unsigned long)task_thread_info(idle);
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@ -231,6 +231,8 @@ static void bmips_boot_secondary(int cpu, struct task_struct *idle)
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}
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cpumask_set_cpu(cpu, &bmips_booted_mask);
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}
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return 0;
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}
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/*
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@ -78,7 +78,7 @@ static void cmp_smp_finish(void)
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* __KSTK_TOS(idle) is apparently the stack pointer
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* (unsigned long)idle->thread_info the gp
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*/
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static void cmp_boot_secondary(int cpu, struct task_struct *idle)
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static int cmp_boot_secondary(int cpu, struct task_struct *idle)
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{
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struct thread_info *gp = task_thread_info(idle);
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unsigned long sp = __KSTK_TOS(idle);
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@ -95,6 +95,7 @@ static void cmp_boot_secondary(int cpu, struct task_struct *idle)
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#endif
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amon_cpu_start(cpu, pc, sp, (unsigned long)gp, a0);
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return 0;
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}
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/*
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@ -288,7 +288,7 @@ static void remote_vpe_boot(void *dummy)
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mips_cps_boot_vpes(core_cfg, cpu_vpe_id(¤t_cpu_data));
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}
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static void cps_boot_secondary(int cpu, struct task_struct *idle)
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static int cps_boot_secondary(int cpu, struct task_struct *idle)
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{
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unsigned core = cpu_core(&cpu_data[cpu]);
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unsigned vpe_id = cpu_vpe_id(&cpu_data[cpu]);
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@ -346,6 +346,7 @@ static void cps_boot_secondary(int cpu, struct task_struct *idle)
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mips_cps_boot_vpes(core_cfg, vpe_id);
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out:
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preempt_enable();
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return 0;
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}
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static void cps_init_secondary(void)
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@ -152,7 +152,7 @@ static void vsmp_smp_finish(void)
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* (unsigned long)idle->thread_info the gp
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* assumes a 1:1 mapping of TC => VPE
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*/
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static void vsmp_boot_secondary(int cpu, struct task_struct *idle)
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static int vsmp_boot_secondary(int cpu, struct task_struct *idle)
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{
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struct thread_info *gp = task_thread_info(idle);
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dvpe();
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@ -184,6 +184,8 @@ static void vsmp_boot_secondary(int cpu, struct task_struct *idle)
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clear_c0_mvpcontrol(MVPCONTROL_VPC);
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evpe(EVPE_ENABLE);
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return 0;
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}
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/*
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@ -39,8 +39,9 @@ static void up_smp_finish(void)
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/*
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* Firmware CPU startup hook
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*/
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static void up_boot_secondary(int cpu, struct task_struct *idle)
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static int up_boot_secondary(int cpu, struct task_struct *idle)
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{
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return 0;
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}
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static void __init up_smp_setup(void)
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@ -439,7 +439,11 @@ void smp_prepare_boot_cpu(void)
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int __cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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mp_ops->boot_secondary(cpu, tidle);
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int err;
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err = mp_ops->boot_secondary(cpu, tidle);
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if (err)
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return err;
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/*
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* We must check for timeout here, as the CPU will not be marked
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@ -400,7 +400,7 @@ static void __init loongson3_prepare_cpus(unsigned int max_cpus)
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/*
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* Setup the PC, SP, and GP of a secondary processor and start it runing!
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*/
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static void loongson3_boot_secondary(int cpu, struct task_struct *idle)
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static int loongson3_boot_secondary(int cpu, struct task_struct *idle)
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{
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unsigned long startargs[4];
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@ -423,6 +423,7 @@ static void loongson3_boot_secondary(int cpu, struct task_struct *idle)
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(void *)(ipi_mailbox_buf[cpu_logical_map(cpu)]+0x8));
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loongson3_ipi_write64(startargs[0],
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(void *)(ipi_mailbox_buf[cpu_logical_map(cpu)]+0x0));
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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@ -147,7 +147,7 @@ unsigned long nlm_next_gp;
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unsigned long nlm_next_sp;
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static cpumask_t phys_cpu_present_mask;
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void nlm_boot_secondary(int logical_cpu, struct task_struct *idle)
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int nlm_boot_secondary(int logical_cpu, struct task_struct *idle)
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{
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uint64_t picbase;
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int hwtid;
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@ -161,6 +161,8 @@ void nlm_boot_secondary(int logical_cpu, struct task_struct *idle)
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/* barrier for sp/gp store above */
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__sync();
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nlm_pic_send_ipi(picbase, hwtid, 1, 1); /* NMI */
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return 0;
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}
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void __init nlm_smp_setup(void)
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@ -100,11 +100,12 @@ static void paravirt_smp_finish(void)
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local_irq_enable();
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}
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static void paravirt_boot_secondary(int cpu, struct task_struct *idle)
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static int paravirt_boot_secondary(int cpu, struct task_struct *idle)
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{
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paravirt_smp_gp[cpu] = (unsigned long)task_thread_info(idle);
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smp_wmb();
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paravirt_smp_sp[cpu] = __KSTK_TOS(idle);
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return 0;
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}
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static irqreturn_t paravirt_reched_interrupt(int irq, void *dev_id)
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@ -195,7 +195,7 @@ static void ip27_smp_finish(void)
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* set sp to the kernel stack of the newly created idle process, gp to the proc
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* struct so that current_thread_info() will work.
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*/
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static void ip27_boot_secondary(int cpu, struct task_struct *idle)
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static int ip27_boot_secondary(int cpu, struct task_struct *idle)
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{
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unsigned long gp = (unsigned long)task_thread_info(idle);
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unsigned long sp = __KSTK_TOS(idle);
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@ -203,6 +203,7 @@ static void ip27_boot_secondary(int cpu, struct task_struct *idle)
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LAUNCH_SLAVE(cputonasid(cpu), cputoslice(cpu),
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(launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
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0, (void *) sp, (void *) gp);
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return 0;
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}
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static void __init ip27_smp_setup(void)
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@ -117,7 +117,7 @@ static void bcm1480_smp_finish(void)
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* Setup the PC, SP, and GP of a secondary processor and start it
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* running!
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*/
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static void bcm1480_boot_secondary(int cpu, struct task_struct *idle)
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static int bcm1480_boot_secondary(int cpu, struct task_struct *idle)
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{
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int retval;
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@ -126,6 +126,7 @@ static void bcm1480_boot_secondary(int cpu, struct task_struct *idle)
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(unsigned long)task_thread_info(idle), 0);
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if (retval != 0)
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printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
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return retval;
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}
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/*
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@ -106,7 +106,7 @@ static void sb1250_smp_finish(void)
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* Setup the PC, SP, and GP of a secondary processor and start it
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* running!
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*/
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static void sb1250_boot_secondary(int cpu, struct task_struct *idle)
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static int sb1250_boot_secondary(int cpu, struct task_struct *idle)
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{
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int retval;
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@ -115,6 +115,7 @@ static void sb1250_boot_secondary(int cpu, struct task_struct *idle)
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(unsigned long)task_thread_info(idle), 0);
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if (retval != 0)
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printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
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return retval;
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}
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/*
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