system/linux
system/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux synced 2024-10-08 12:22:38 +00:00
Code Issues Packages Projects Releases Wiki Activity

selftests/powerpc/pmu/: Add interface test for mmcr0_fc56 field using pmc1

Browse source 
The testcase uses event code 0x1001e to verify two bit settings (FC5-6
and PMC1CE) in Monitor Mode Control Register 0 (MMCR0). Check if FC5-6
bit to be set in MMCR0 when not using Performance Monitor Counter 5 and
6 (PMC5 and PMC6). And also PMC1CE is expected to be set when using
PMC1. Test if these fields are programmed correctly via perf interface.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
[mpe: Add error checking, drop GET_MMCR_FIELD, add to .gitignore]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220127072012.662451-14-kjain@linux.ibm.com
This commit is contained in:
Athira Rajeev 2022-01-27 12:50:05 +05:30 committed by Michael Ellerman
parent 9ac7c6d5e4
commit d5172f2585
3 changed files with 61 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore vendored
View file

@ -2,3 +2,4 @@ mmcr0_exceptionbits_test
mmcr0_cc56run_test
mmcr0_pmccext_test
mmcr0_pmcjce_test
mmcr0_fc56_pmc1ce_test

2
tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
View file

@ -2,7 +2,7 @@
CFLAGS += -m64
TEST_GEN_PROGS := mmcr0_exceptionbits_test mmcr0_cc56run_test mmcr0_pmccext_test \
mmcr0_pmcjce_test
mmcr0_pmcjce_test mmcr0_fc56_pmc1ce_test
top_srcdir = ../../../../../..
include ../../../lib.mk

59
tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_fc56_pmc1ce_test.c Normal file
View file

@ -0,0 +1,59 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2022, Athira Rajeev, IBM Corp.
*/
#include <stdio.h>
#include <stdlib.h>
#include "../event.h"
#include "misc.h"
#include "utils.h"
extern void thirty_two_instruction_loop(int loops);
/*
* A perf sampling test for mmcr0
* fields: fc56, pmc1ce.
*/
static int mmcr0_fc56_pmc1ce(void)
{
struct event event;
u64 *intr_regs;
/* Check for platform support for the test */
SKIP_IF(check_pvr_for_sampling_tests());
/* Init the event for the sampling test */
event_init_sampling(&event, 0x1001e);
event.attr.sample_regs_intr = platform_extended_mask;
FAIL_IF(event_open(&event));
event.mmap_buffer = event_sample_buf_mmap(event.fd, 1);
FAIL_IF(event_enable(&event));
/* workload to make the event overflow */
thirty_two_instruction_loop(10000);
FAIL_IF(event_disable(&event));
/* Check for sample count */
FAIL_IF(!collect_samples(event.mmap_buffer));
intr_regs = get_intr_regs(&event, event.mmap_buffer);
/* Check for intr_regs */
FAIL_IF(!intr_regs);
/* Verify that fc56, pmc1ce fields are set in MMCR0 */
FAIL_IF(!get_mmcr0_fc56(get_reg_value(intr_regs, "MMCR0"), 1));
FAIL_IF(!get_mmcr0_pmc1ce(get_reg_value(intr_regs, "MMCR0"), 1));
event_close(&event);
return 0;
}
int main(void)
{
return test_harness(mmcr0_fc56_pmc1ce, "mmcr0_fc56_pmc1ce");
}