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sfc: Do not reinitialise XAUI serdes before it has completed reset
falcon_reset_xaui() waits for XGXS reset to complete, but the XAUI serdes reset may take longer. It needs to check both reset active bits. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -700,6 +700,8 @@
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/* XGXS/XAUI powerdown/reset register */
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/* XGXS/XAUI powerdown/reset register */
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#define XX_PWR_RST_REG 0x1300
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#define XX_PWR_RST_REG 0x1300
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#define XX_SD_RST_ACT_LBN 16
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#define XX_SD_RST_ACT_WIDTH 1
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#define XX_PWRDND_EN_LBN 15
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#define XX_PWRDND_EN_LBN 15
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#define XX_PWRDND_EN_WIDTH 1
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#define XX_PWRDND_EN_WIDTH 1
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#define XX_PWRDNC_EN_LBN 14
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#define XX_PWRDNC_EN_LBN 14
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@ -64,13 +64,15 @@ int falcon_reset_xaui(struct efx_nic *efx)
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efx_oword_t reg;
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efx_oword_t reg;
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int count;
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int count;
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/* Start reset sequence */
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EFX_POPULATE_DWORD_1(reg, XX_RST_XX_EN, 1);
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EFX_POPULATE_DWORD_1(reg, XX_RST_XX_EN, 1);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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/* Give some time for the link to establish */
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/* Wait up to 10 ms for completion, then reinitialise */
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for (count = 0; count < 1000; count++) { /* wait upto 10ms */
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for (count = 0; count < 1000; count++) {
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falcon_read(efx, ®, XX_PWR_RST_REG);
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falcon_read(efx, ®, XX_PWR_RST_REG);
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if (EFX_OWORD_FIELD(reg, XX_RST_XX_EN) == 0) {
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if (EFX_OWORD_FIELD(reg, XX_RST_XX_EN) == 0 &&
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EFX_OWORD_FIELD(reg, XX_SD_RST_ACT) == 0) {
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falcon_setup_xaui(efx);
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falcon_setup_xaui(efx);
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return 0;
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return 0;
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}
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}
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