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Staging: et131x: Another typedef solely used to write 0 to a register
Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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2 changed files with 9 additions and 24 deletions
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@ -803,21 +803,11 @@ typedef union _TXMAC_ERR_INT_t {
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/*
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* structure for error interrupt reg in txmac address map
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* located at address 0x3020
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*
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* 31-2: unused
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* 1: bp_req
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* 0: bp_xonxoff
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*/
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typedef union _TXMAC_CP_CTRL_t {
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u32 value;
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struct {
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#ifdef _BIT_FIELDS_HTOL
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u32 unused:30; /* bits 2-31 */
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u32 bp_req:1; /* bit 1 */
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u32 bp_xonxoff:1; /* bit 0 */
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#else
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u32 bp_xonxoff:1; /* bit 0 */
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u32 bp_req:1; /* bit 1 */
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u32 unused:30; /* bits 2-31 */
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#endif
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} bits;
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} TXMAC_BP_CTRL_t, *PTXMAC_BP_CTRL_t;
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/*
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* Tx MAC Module of JAGCore Address Mapping
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@ -831,7 +821,7 @@ typedef struct _TXMAC_t { /* Location: */
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u32 tx_test; /* 0x3014 */
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TXMAC_ERR_t err; /* 0x3018 */
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TXMAC_ERR_INT_t err_int; /* 0x301C */
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TXMAC_BP_CTRL_t bp_ctrl; /* 0x3020 */
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u32 bp_ctrl; /* 0x3020 */
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} TXMAC_t, *PTXMAC_t;
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/* END OF TXMAC REGISTER ADDRESS MAP */
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@ -287,17 +287,12 @@ void et131x_isr_handler(struct work_struct *work)
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u32 pm_csr;
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/* Tell the device to send a pause packet via
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* the back pressure register
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* the back pressure register (bp req and
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* bp xon/xoff)
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*/
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pm_csr = readl(&iomem->global.pm_csr);
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if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) {
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TXMAC_BP_CTRL_t bp_ctrl = { 0 };
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bp_ctrl.bits.bp_req = 1;
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bp_ctrl.bits.bp_xonxoff = 1;
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writel(bp_ctrl.value,
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&iomem->txmac.bp_ctrl.value);
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}
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if ((pm_csr & ET_PM_PHY_SW_COMA) == 0)
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writel(3, &iomem->txmac.bp_ctrl);
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}
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}
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