Auto merge with /home/aegl/GIT/linus

This commit is contained in:
Tony Luck 2005-07-27 10:36:54 -07:00
commit c2834cf474
204 changed files with 36397 additions and 31279 deletions

View file

@ -388,7 +388,6 @@ Summary:
scsi_remove_device - detach and remove a SCSI device
scsi_remove_host - detach and remove all SCSI devices owned by host
scsi_report_bus_reset - report scsi _bus_ reset observed
scsi_set_device - place device reference in host structure
scsi_track_queue_full - track successive QUEUE_FULL events
scsi_unblock_requests - allow further commands to be queued to given host
scsi_unregister - [calls scsi_host_put()]
@ -740,20 +739,6 @@ int scsi_remove_host(struct Scsi_Host *shost)
void scsi_report_bus_reset(struct Scsi_Host * shost, int channel)
/**
* scsi_set_device - place device reference in host structure
* @shost: a pointer to a scsi host instance
* @pdev: pointer to device instance to assign
*
* Returns nothing
*
* Might block: no
*
* Defined in: include/scsi/scsi_host.h .
**/
void scsi_set_device(struct Scsi_Host * shost, struct device * dev)
/**
* scsi_track_queue_full - track successive QUEUE_FULL events on given
* device to determine if and when there is a need

View file

@ -1416,13 +1416,20 @@ W: http://www.penguinppc.org/
L: linuxppc-embedded@ozlabs.org
S: Maintained
LINUX FOR POWERPC EMBEDDED PPC8XX AND BOOT CODE
LINUX FOR POWERPC BOOT CODE
P: Tom Rini
M: trini@kernel.crashing.org
W: http://www.penguinppc.org/
L: linuxppc-embedded@ozlabs.org
S: Maintained
LINUX FOR POWERPC EMBEDDED PPC8XX
P: Marcelo Tosatti
M: marcelo.tosatti@cyclades.com
W: http://www.penguinppc.org/
L: linuxppc-embedded@ozlabs.org
S: Maintained
LINUX FOR POWERPC EMBEDDED PPC83XX AND PPC85XX
P: Kumar Gala
M: kumar.gala@freescale.com

View file

@ -165,7 +165,6 @@ machine_restart(char *restart_cmd)
common_shutdown(LINUX_REBOOT_CMD_RESTART, restart_cmd);
}
EXPORT_SYMBOL(machine_restart);
void
machine_halt(void)
@ -173,7 +172,6 @@ machine_halt(void)
common_shutdown(LINUX_REBOOT_CMD_HALT, NULL);
}
EXPORT_SYMBOL(machine_halt);
void
machine_power_off(void)
@ -181,7 +179,6 @@ machine_power_off(void)
common_shutdown(LINUX_REBOOT_CMD_POWER_OFF, NULL);
}
EXPORT_SYMBOL(machine_power_off);
/* Used by sysrq-p, among others. I don't believe r9-r15 are ever
saved in the context it's used. */

View file

@ -131,7 +131,6 @@ void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
@ -139,7 +138,6 @@ void machine_power_off(void)
pm_power_off();
}
EXPORT_SYMBOL(machine_power_off);
void machine_restart(char * __unused)
{
@ -169,8 +167,6 @@ void machine_restart(char * __unused)
while (1);
}
EXPORT_SYMBOL(machine_restart);
void __show_regs(struct pt_regs *regs)
{
unsigned long flags = condition_codes(regs);

View file

@ -23,6 +23,8 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
# S3C2440 support
obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o
obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o
obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o
# machine specific support

View file

@ -448,60 +448,3 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
return 0;
}
/* S3C2440 extended clock support */
#ifdef CONFIG_CPU_S3C2440
static struct clk s3c2440_clk_upll = {
.name = "upll",
.id = -1,
};
static struct clk s3c2440_clk_cam = {
.name = "camif",
.parent = &clk_h,
.id = -1,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
static struct clk s3c2440_clk_ac97 = {
.name = "ac97",
.parent = &clk_p,
.id = -1,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
static int s3c2440_clk_add(struct sys_device *sysdev)
{
unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate);
printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
print_mhz(s3c2440_clk_upll.rate));
s3c24xx_register_clock(&s3c2440_clk_ac97);
s3c24xx_register_clock(&s3c2440_clk_cam);
s3c24xx_register_clock(&s3c2440_clk_upll);
clk_disable(&s3c2440_clk_ac97);
clk_disable(&s3c2440_clk_cam);
return 0;
}
static struct sysdev_driver s3c2440_clk_driver = {
.add = s3c2440_clk_add,
};
static int s3c24xx_clk_driver(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
}
arch_initcall(s3c24xx_clk_driver);
#endif /* CONFIG_CPU_S3C2440 */

View file

@ -45,6 +45,9 @@
*
* 28-Jun-2005 Ben Dooks
* Mark IRQ_LCD valid
*
* 25-Jul-2005 Ben Dooks
* Split the S3C2440 IRQ code to seperate file
*/
#include <linux/init.h>
@ -65,11 +68,7 @@
#include "cpu.h"
#include "pm.h"
#define irqdbf(x...)
#define irqdbf2(x...)
#define EXTINT_OFF (IRQ_EINT4 - 4)
#include "irq.h"
/* wakeup irq control */
@ -181,7 +180,7 @@ s3c_irq_unmask(unsigned int irqno)
__raw_writel(mask, S3C2410_INTMSK);
}
static struct irqchip s3c_irq_level_chip = {
struct irqchip s3c_irq_level_chip = {
.ack = s3c_irq_maskack,
.mask = s3c_irq_mask,
.unmask = s3c_irq_unmask,
@ -370,84 +369,6 @@ static struct irqchip s3c_irq_eint0t4 = {
#define INTMSK_UART2 (1UL << (IRQ_UART2 - IRQ_EINT0))
#define INTMSK_ADCPARENT (1UL << (IRQ_ADCPARENT - IRQ_EINT0))
static inline void
s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
int subcheck)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
/* check to see if we need to mask the parent IRQ */
if ((submask & subcheck) == subcheck) {
__raw_writel(mask | parentbit, S3C2410_INTMSK);
}
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
}
static inline void
s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
mask &= ~parentbit;
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
__raw_writel(mask, S3C2410_INTMSK);
}
static inline void
s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
s3c_irqsub_mask(irqno, parentmask, group);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
static inline void
s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
/* UART0 */
@ -794,174 +715,3 @@ void __init s3c24xx_init_irq(void)
irqdbf("s3c2410: registered interrupt handlers\n");
}
/* s3c2440 irq code
*/
#ifdef CONFIG_CPU_S3C2440
/* WDT/AC97 */
static void s3c_irq_demux_wdtac97(unsigned int irq,
struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int subsrc, submsk;
struct irqdesc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
subsrc = __raw_readl(S3C2410_SUBSRCPND);
submsk = __raw_readl(S3C2410_INTSUBMSK);
subsrc &= ~submsk;
subsrc >>= 13;
subsrc &= 3;
if (subsrc != 0) {
if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_WDT;
mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
}
if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_AC97;
mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
}
}
}
#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
static void
s3c_irq_wdtac97_mask(unsigned int irqno)
{
s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
}
static void
s3c_irq_wdtac97_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(irqno, INTMSK_WDT);
}
static void
s3c_irq_wdtac97_ack(unsigned int irqno)
{
s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
}
static struct irqchip s3c_irq_wdtac97 = {
.mask = s3c_irq_wdtac97_mask,
.unmask = s3c_irq_wdtac97_unmask,
.ack = s3c_irq_wdtac97_ack,
};
/* camera irq */
static void s3c_irq_demux_cam(unsigned int irq,
struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int subsrc, submsk;
struct irqdesc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
subsrc = __raw_readl(S3C2410_SUBSRCPND);
submsk = __raw_readl(S3C2410_INTSUBMSK);
subsrc &= ~submsk;
subsrc >>= 11;
subsrc &= 3;
if (subsrc != 0) {
if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_CAM_C;
mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
}
if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_CAM_P;
mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
}
}
}
#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
static void
s3c_irq_cam_mask(unsigned int irqno)
{
s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
}
static void
s3c_irq_cam_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(irqno, INTMSK_CAM);
}
static void
s3c_irq_cam_ack(unsigned int irqno)
{
s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
}
static struct irqchip s3c_irq_cam = {
.mask = s3c_irq_cam_mask,
.unmask = s3c_irq_cam_unmask,
.ack = s3c_irq_cam_ack,
};
static int s3c2440_irq_add(struct sys_device *sysdev)
{
unsigned int irqno;
printk("S3C2440: IRQ Support\n");
set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
set_irq_handler(IRQ_NFCON, do_level_IRQ);
set_irq_flags(IRQ_NFCON, IRQF_VALID);
/* add new chained handler for wdt, ac7 */
set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
set_irq_handler(IRQ_WDT, do_level_IRQ);
set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
set_irq_chip(irqno, &s3c_irq_wdtac97);
set_irq_handler(irqno, do_level_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
/* add chained handler for camera */
set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
set_irq_handler(IRQ_CAM, do_level_IRQ);
set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
set_irq_chip(irqno, &s3c_irq_cam);
set_irq_handler(irqno, do_level_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
return 0;
}
static struct sysdev_driver s3c2440_irq_driver = {
.add = s3c2440_irq_add,
};
static int s3c24xx_irq_driver(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
}
arch_initcall(s3c24xx_irq_driver);
#endif /* CONFIG_CPU_S3C2440 */

View file

@ -0,0 +1,99 @@
/* arch/arm/mach-s3c2410/irq.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for S3C24XX CPU IRQ support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
*/
#define irqdbf(x...)
#define irqdbf2(x...)
#define EXTINT_OFF (IRQ_EINT4 - 4)
extern struct irqchip s3c_irq_level_chip;
static inline void
s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
int subcheck)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
/* check to see if we need to mask the parent IRQ */
if ((submask & subcheck) == subcheck) {
__raw_writel(mask | parentbit, S3C2410_INTMSK);
}
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
}
static inline void
s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
mask &= ~parentbit;
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
__raw_writel(mask, S3C2410_INTMSK);
}
static inline void
s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
s3c_irqsub_mask(irqno, parentmask, group);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
static inline void
s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}

View file

@ -25,10 +25,11 @@
* 14-Jan-2005 BJD Add support for muitlple NAND devices
* 03-Mar-2005 BJD Ensured that bast-cpld.h is included
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 14-Mar-2006 BJD Updated for __iomem changes
* 22-Jun-2006 BJD Added DM9000 platform information
* 28-Jun-2006 BJD Moved pm functionality out to common code
* 17-Jul-2006 BJD Changed to platform device for SuperIO 16550s
* 14-Mar-2005 BJD Updated for __iomem changes
* 22-Jun-2005 BJD Added DM9000 platform information
* 28-Jun-2005 BJD Moved pm functionality out to common code
* 17-Jul-2005 BJD Changed to platform device for SuperIO 16550s
* 25-Jul-2005 BJD Removed ASIX static mappings
*/
#include <linux/kernel.h>
@ -116,7 +117,6 @@ static struct map_desc bast_iodesc[] __initdata = {
/* slow, byte */
{ VA_C2(BAST_VA_ISAIO), PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
{ VA_C2(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
{ VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
{ VA_C2(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
{ VA_C2(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
@ -126,7 +126,6 @@ static struct map_desc bast_iodesc[] __initdata = {
/* slow, word */
{ VA_C3(BAST_VA_ISAIO), PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
{ VA_C3(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
{ VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
{ VA_C3(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
{ VA_C3(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
@ -136,7 +135,6 @@ static struct map_desc bast_iodesc[] __initdata = {
/* fast, byte */
{ VA_C4(BAST_VA_ISAIO), PA_CS4(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
{ VA_C4(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
{ VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
{ VA_C4(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
{ VA_C4(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
@ -146,7 +144,6 @@ static struct map_desc bast_iodesc[] __initdata = {
/* fast, word */
{ VA_C5(BAST_VA_ISAIO), PA_CS5(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
{ VA_C5(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
{ VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
{ VA_C5(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
{ VA_C5(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },

View file

@ -0,0 +1,116 @@
/* linux/arch/arm/mach-s3c2410/s3c2440-clock.c
*
* Copyright (c) 2004-2005 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2440 Clock support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/device.h>
#include <linux/sysdev.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <asm/hardware.h>
#include <asm/atomic.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/hardware/clock.h>
#include <asm/arch/regs-clock.h>
#include "clock.h"
#include "cpu.h"
/* S3C2440 extended clock support */
static struct clk s3c2440_clk_upll = {
.name = "upll",
.id = -1,
};
static struct clk s3c2440_clk_cam = {
.name = "camif",
.id = -1,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
static struct clk s3c2440_clk_ac97 = {
.name = "ac97",
.id = -1,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
static int s3c2440_clk_add(struct sys_device *sysdev)
{
unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
struct clk *clk_h;
struct clk *clk_p;
struct clk *clk_xtal;
clk_xtal = clk_get(NULL, "xtal");
if (IS_ERR(clk_xtal)) {
printk(KERN_ERR "S3C2440: Failed to get clk_xtal\n");
return -EINVAL;
}
s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);
printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
print_mhz(s3c2440_clk_upll.rate));
clk_p = clk_get(NULL, "pclk");
clk_h = clk_get(NULL, "hclk");
if (IS_ERR(clk_p) || IS_ERR(clk_h)) {
printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
return -EINVAL;
}
s3c2440_clk_cam.parent = clk_h;
s3c2440_clk_ac97.parent = clk_p;
s3c24xx_register_clock(&s3c2440_clk_ac97);
s3c24xx_register_clock(&s3c2440_clk_cam);
s3c24xx_register_clock(&s3c2440_clk_upll);
clk_disable(&s3c2440_clk_ac97);
clk_disable(&s3c2440_clk_cam);
return 0;
}
static struct sysdev_driver s3c2440_clk_driver = {
.add = s3c2440_clk_add,
};
static __init int s3c24xx_clk_driver(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
}
arch_initcall(s3c24xx_clk_driver);

View file

@ -0,0 +1,207 @@
/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c
*
* Copyright (c) 2003,2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Changelog:
* 25-Jul-2005 BJD Split from irq.c
*
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/ptrace.h>
#include <linux/sysdev.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/mach/irq.h>
#include <asm/arch/regs-irq.h>
#include <asm/arch/regs-gpio.h>
#include "cpu.h"
#include "pm.h"
#include "irq.h"
/* WDT/AC97 */
static void s3c_irq_demux_wdtac97(unsigned int irq,
struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int subsrc, submsk;
struct irqdesc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
subsrc = __raw_readl(S3C2410_SUBSRCPND);
submsk = __raw_readl(S3C2410_INTSUBMSK);
subsrc &= ~submsk;
subsrc >>= 13;
subsrc &= 3;
if (subsrc != 0) {
if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_WDT;
mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
}
if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_AC97;
mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
}
}
}
#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
static void
s3c_irq_wdtac97_mask(unsigned int irqno)
{
s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
}
static void
s3c_irq_wdtac97_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(irqno, INTMSK_WDT);
}
static void
s3c_irq_wdtac97_ack(unsigned int irqno)
{
s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
}
static struct irqchip s3c_irq_wdtac97 = {
.mask = s3c_irq_wdtac97_mask,
.unmask = s3c_irq_wdtac97_unmask,
.ack = s3c_irq_wdtac97_ack,
};
/* camera irq */
static void s3c_irq_demux_cam(unsigned int irq,
struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int subsrc, submsk;
struct irqdesc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
subsrc = __raw_readl(S3C2410_SUBSRCPND);
submsk = __raw_readl(S3C2410_INTSUBMSK);
subsrc &= ~submsk;
subsrc >>= 11;
subsrc &= 3;
if (subsrc != 0) {
if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_CAM_C;
mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
}
if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_CAM_P;
mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
}
}
}
#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
static void
s3c_irq_cam_mask(unsigned int irqno)
{
s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
}
static void
s3c_irq_cam_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(irqno, INTMSK_CAM);
}
static void
s3c_irq_cam_ack(unsigned int irqno)
{
s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
}
static struct irqchip s3c_irq_cam = {
.mask = s3c_irq_cam_mask,
.unmask = s3c_irq_cam_unmask,
.ack = s3c_irq_cam_ack,
};
static int s3c2440_irq_add(struct sys_device *sysdev)
{
unsigned int irqno;
printk("S3C2440: IRQ Support\n");
set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
set_irq_handler(IRQ_NFCON, do_level_IRQ);
set_irq_flags(IRQ_NFCON, IRQF_VALID);
/* add new chained handler for wdt, ac7 */
set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
set_irq_handler(IRQ_WDT, do_level_IRQ);
set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
set_irq_chip(irqno, &s3c_irq_wdtac97);
set_irq_handler(irqno, do_level_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
/* add chained handler for camera */
set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
set_irq_handler(IRQ_CAM, do_level_IRQ);
set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
set_irq_chip(irqno, &s3c_irq_cam);
set_irq_handler(irqno, do_level_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
return 0;
}
static struct sysdev_driver s3c2440_irq_driver = {
.add = s3c2440_irq_add,
};
static int s3c24xx_irq_driver(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
}
arch_initcall(s3c24xx_irq_driver);

View file

@ -425,6 +425,9 @@ static void __init build_mem_type_table(void)
mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE;
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
}
cp = &cache_policies[cachepolicy];

View file

@ -103,9 +103,6 @@ void machine_power_off(void)
{
}
EXPORT_SYMBOL(machine_halt);
EXPORT_SYMBOL(machine_power_off);
void machine_restart(char * __unused)
{
/*
@ -136,8 +133,6 @@ void machine_restart(char * __unused)
while (1);
}
EXPORT_SYMBOL(machine_restart);
void show_regs(struct pt_regs * regs)
{
unsigned long flags;

View file

@ -113,6 +113,7 @@
#include <linux/user.h>
#include <linux/elfcore.h>
#include <linux/mqueue.h>
#include <linux/reboot.h>
//#define DEBUG
@ -208,13 +209,11 @@ void cpu_idle (void)
void hard_reset_now (void);
void machine_restart(void)
void machine_restart(char *cmd)
{
hard_reset_now();
}
EXPORT_SYMBOL(machine_restart);
/*
* Similar to machine_power_off, but don't shut off power. Add code
* here to freeze the system for e.g. post-mortem debug purpose when
@ -225,16 +224,12 @@ void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);
/* If or when software power-off is implemented, add code here. */
void machine_power_off(void)
{
}
EXPORT_SYMBOL(machine_power_off);
/*
* When a process does an "exec", machine state like FPU and debug
* registers need to be reset. This is a hook function for that.

View file

@ -90,8 +90,6 @@ void machine_restart(char * __unused)
__asm__("jmp @@0");
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
local_irq_disable();
@ -99,8 +97,6 @@ void machine_halt(void)
for (;;);
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
local_irq_disable();
@ -108,8 +104,6 @@ void machine_power_off(void)
for (;;);
}
EXPORT_SYMBOL(machine_power_off);
void show_regs(struct pt_regs * regs)
{
printk("\nPC: %08lx Status: %02x",

View file

@ -911,14 +911,7 @@ static void apm_power_off(void)
0xcd, 0x15 /* int $0x15 */
};
/*
* This may be called on an SMP machine.
*/
#ifdef CONFIG_SMP
/* Some bioses don't like being called from CPU != 0 */
set_cpus_allowed(current, cpumask_of_cpu(0));
BUG_ON(smp_processor_id() != 0);
#endif
if (apm_info.realmode_power_off)
{
(void)apm_save_cpus();

View file

@ -284,7 +284,7 @@ void machine_shutdown(void)
reboot_cpu_id = 0;
/* See if there has been given a command line override */
if ((reboot_cpu_id != -1) && (reboot_cpu < NR_CPUS) &&
if ((reboot_cpu != -1) && (reboot_cpu < NR_CPUS) &&
cpu_isset(reboot_cpu, cpu_online_map)) {
reboot_cpu_id = reboot_cpu;
}
@ -311,10 +311,8 @@ void machine_shutdown(void)
#endif
}
void machine_restart(char * __unused)
void machine_emergency_restart(void)
{
machine_shutdown();
if (!reboot_thru_bios) {
if (efi_enabled) {
efi.reset_system(EFI_RESET_COLD, EFI_SUCCESS, 0, NULL);
@ -337,23 +335,22 @@ void machine_restart(char * __unused)
machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
}
EXPORT_SYMBOL(machine_restart);
void machine_restart(char * __unused)
{
machine_shutdown();
machine_emergency_restart();
}
void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
lapic_shutdown();
machine_shutdown();
if (efi_enabled)
efi.reset_system(EFI_RESET_SHUTDOWN, EFI_SUCCESS, 0, NULL);
if (pm_power_off)
pm_power_off();
}
EXPORT_SYMBOL(machine_power_off);

View file

@ -22,8 +22,6 @@ void machine_restart(char * __unused)
outb(PIIX4_RESET_VAL, PIIX4_RESET_PORT);
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
unsigned short pm_status;
@ -43,10 +41,7 @@ void machine_power_off(void)
outl(PIIX_SPECIAL_STOP, 0xCFC);
}
EXPORT_SYMBOL(machine_power_off);
void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);

View file

@ -278,8 +278,6 @@ machine_restart(char *cmd)
}
}
EXPORT_SYMBOL(machine_restart);
void
mca_nmi_hook(void)
{
@ -315,12 +313,9 @@ machine_halt(void)
machine_power_off();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
if (pm_power_off)
pm_power_off();
}
EXPORT_SYMBOL(machine_power_off);

View file

@ -807,16 +807,12 @@ machine_restart (char *restart_cmd)
(*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
}
EXPORT_SYMBOL(machine_restart);
void
machine_halt (void)
{
cpu_halt();
}
EXPORT_SYMBOL(machine_halt);
void
machine_power_off (void)
{
@ -825,4 +821,3 @@ machine_power_off (void)
machine_halt();
}
EXPORT_SYMBOL(machine_power_off);

View file

@ -420,7 +420,7 @@ xpc_activating(void *__partid)
partid_t partid = (u64) __partid;
struct xpc_partition *part = &xpc_partitions[partid];
unsigned long irq_flags;
struct sched_param param = { sched_priority: MAX_USER_RT_PRIO - 1 };
struct sched_param param = { sched_priority: MAX_RT_PRIO - 1 };
int ret;

View file

@ -115,8 +115,6 @@ void machine_restart(char *__unused)
cpu_relax();
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
printk("Please push reset button!\n");
@ -124,15 +122,11 @@ void machine_halt(void)
cpu_relax();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
/* M32R_FIXME */
}
EXPORT_SYMBOL(machine_power_off);
static int __init idle_setup (char *str)
{
if (!strncmp(str, "poll", 4)) {

View file

@ -113,8 +113,6 @@ void machine_restart(char * __unused)
for (;;);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
if (mach_halt)
@ -122,8 +120,6 @@ void machine_halt(void)
for (;;);
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
if (mach_power_off)
@ -131,8 +127,6 @@ void machine_power_off(void)
for (;;);
}
EXPORT_SYMBOL(machine_power_off);
void show_regs(struct pt_regs * regs)
{
printk("\n");

View file

@ -80,8 +80,6 @@ void machine_restart(char * __unused)
for (;;);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
if (mach_halt)
@ -89,8 +87,6 @@ void machine_halt(void)
for (;;);
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
if (mach_power_off)
@ -98,8 +94,6 @@ void machine_power_off(void)
for (;;);
}
EXPORT_SYMBOL(machine_power_off);
void show_regs(struct pt_regs * regs)
{
printk(KERN_NOTICE "\n");

View file

@ -26,18 +26,13 @@ void machine_restart(char *command)
_machine_restart(command);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
_machine_halt();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
_machine_power_off();
}
EXPORT_SYMBOL(machine_power_off);

View file

@ -150,8 +150,6 @@ void machine_restart(char *cmd)
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
/*
@ -160,8 +158,6 @@ void machine_halt(void)
*/
}
EXPORT_SYMBOL(machine_halt);
/*
* This routine is called from sys_reboot to actually turn off the
@ -187,8 +183,6 @@ void machine_power_off(void)
KERN_EMERG "Please power this system off now.");
}
EXPORT_SYMBOL(machine_power_off);
/*
* Create a kernel thread

View file

@ -121,8 +121,6 @@ void machine_restart(char *cmd)
ppc_md.restart(cmd);
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
#ifdef CONFIG_NVRAM
@ -131,8 +129,6 @@ void machine_power_off(void)
ppc_md.power_off();
}
EXPORT_SYMBOL(machine_power_off);
void machine_halt(void)
{
#ifdef CONFIG_NVRAM
@ -141,8 +137,6 @@ void machine_halt(void)
ppc_md.halt();
}
EXPORT_SYMBOL(machine_halt);
void (*pm_power_off)(void) = machine_power_off;
#ifdef CONFIG_TAU

View file

@ -694,7 +694,6 @@ void machine_restart(char *cmd)
local_irq_disable();
while (1) ;
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
@ -707,7 +706,6 @@ void machine_power_off(void)
local_irq_disable();
while (1) ;
}
EXPORT_SYMBOL(machine_power_off);
void machine_halt(void)
{
@ -720,7 +718,6 @@ void machine_halt(void)
local_irq_disable();
while (1) ;
}
EXPORT_SYMBOL(machine_halt);
static int ppc64_panic_event(struct notifier_block *this,
unsigned long event, void *ptr)

View file

@ -299,24 +299,18 @@ void machine_restart(char *command)
_machine_restart(command);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
console_unblank();
_machine_halt();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
console_unblank();
_machine_power_off();
}
EXPORT_SYMBOL(machine_power_off);
static void __init
add_memory_hole(unsigned long start, unsigned long end)
{

View file

@ -80,8 +80,6 @@ void machine_restart(char * __unused)
"mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
#if defined(CONFIG_SH_HS7751RVOIP)
@ -96,8 +94,6 @@ void machine_halt(void)
cpu_sleep();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
#if defined(CONFIG_SH_HS7751RVOIP)
@ -110,8 +106,6 @@ void machine_power_off(void)
#endif
}
EXPORT_SYMBOL(machine_power_off);
void show_regs(struct pt_regs * regs)
{
printk("\n");

View file

@ -158,8 +158,6 @@ void machine_halt(void)
panic("Halt failed!");
}
EXPORT_SYMBOL(machine_halt);
void machine_restart(char * cmd)
{
char *p;
@ -180,8 +178,6 @@ void machine_restart(char * cmd)
panic("Reboot failed!");
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
#ifdef CONFIG_SUN_AUXIO
@ -191,8 +187,6 @@ void machine_power_off(void)
machine_halt();
}
EXPORT_SYMBOL(machine_power_off);
static DEFINE_SPINLOCK(sparc_backtrace_lock);
void __show_backtrace(unsigned long fp)

View file

@ -69,8 +69,6 @@ void machine_power_off(void)
machine_halt();
}
EXPORT_SYMBOL(machine_power_off);
#ifdef CONFIG_PCI
static int powerd(void *__unused)
{

View file

@ -124,8 +124,6 @@ void machine_halt(void)
panic("Halt failed!");
}
EXPORT_SYMBOL(machine_halt);
void machine_alt_power_off(void)
{
if (!serial_console && prom_palette)
@ -154,8 +152,6 @@ void machine_restart(char * cmd)
panic("Reboot failed!");
}
EXPORT_SYMBOL(machine_restart);
static void show_regwindow32(struct pt_regs *regs)
{
struct reg_window32 __user *rw;

View file

@ -49,23 +49,17 @@ void machine_restart(char * __unused)
CHOOSE_MODE(reboot_tt(), reboot_skas());
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
uml_cleanup();
CHOOSE_MODE(halt_tt(), halt_skas());
}
EXPORT_SYMBOL(machine_power_off);
void machine_halt(void)
{
machine_power_off();
}
EXPORT_SYMBOL(machine_halt);
/*
* Overrides for Emacs so that we follow Linus's tabbing style.
* Emacs will notice this stuff at the end of the file and automatically

View file

@ -132,8 +132,6 @@ void machine_restart (char *__unused)
asm ("jmp r0"); /* Jump to the reset vector. */
}
EXPORT_SYMBOL(machine_restart);
void machine_halt (void)
{
#ifdef CONFIG_RESET_GUARD
@ -145,15 +143,11 @@ void machine_halt (void)
asm ("halt; nop; nop; nop; nop; nop");
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);
/* Called before configuring an on-chip UART. */
void anna_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
{

View file

@ -160,8 +160,6 @@ void machine_restart (char *__unused)
asm ("jmp r0"); /* Jump to the reset vector. */
}
EXPORT_SYMBOL(machine_restart);
void machine_halt (void)
{
#ifdef CONFIG_RESET_GUARD
@ -173,15 +171,11 @@ void machine_halt (void)
asm ("halt; nop; nop; nop; nop; nop");
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);
/* Called before configuring an on-chip UART. */
void as85ep1_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
{

View file

@ -121,22 +121,16 @@ void machine_halt (void)
}
}
EXPORT_SYMBOL(machine_halt);
void machine_restart (char *__unused)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);
/* Interrupts */

View file

@ -67,8 +67,6 @@ void machine_restart (char *__unused)
asm ("jmp r0"); /* Jump to the reset vector. */
}
EXPORT_SYMBOL(machine_restart);
/* This says `HALt.' in LEDese. */
static unsigned char halt_leds_msg[] = { 0x76, 0x77, 0x38, 0xF8 };
@ -89,15 +87,11 @@ void machine_halt (void)
asm ("halt; nop; nop; nop; nop; nop");
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);
/* Animated LED display for timer tick. */

View file

@ -104,24 +104,18 @@ void machine_restart (char *__unused)
V850_SIM_SYSCALL (exit, 0);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt (void)
{
V850_SIM_SYSCALL (write, 1, "HALT\n", 5);
V850_SIM_SYSCALL (exit, 0);
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off (void)
{
V850_SIM_SYSCALL (write, 1, "POWER OFF\n", 10);
V850_SIM_SYSCALL (exit, 0);
}
EXPORT_SYMBOL(machine_power_off);
/* Load data from a file called NAME into ram. The address and length
of the data image are returned in ADDR and LEN. */

View file

@ -184,18 +184,13 @@ void machine_halt (void)
for (;;) {}
}
EXPORT_SYMBOL(machine_halt);
void machine_restart (char *__unused)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);

View file

@ -591,11 +591,15 @@ ia32_sys_call_table:
.quad compat_sys_mq_getsetattr
.quad compat_sys_kexec_load /* reserved for kexec */
.quad compat_sys_waitid
.quad quiet_ni_syscall /* sys_altroot */
.quad quiet_ni_syscall /* 285: sys_altroot */
.quad sys_add_key
.quad sys_request_key
.quad sys_keyctl
/* don't forget to change IA32_NR_syscalls */
.quad sys_ioprio_set
.quad sys_ioprio_get /* 290 */
.quad sys_inotify_init
.quad sys_inotify_add_watch
.quad sys_inotify_rm_watch
ia32_syscall_end:
.rept IA32_NR_syscalls-(ia32_syscall_end-ia32_sys_call_table)/8
.quad ni_syscall

View file

@ -61,6 +61,7 @@
#include <linux/ptrace.h>
#include <linux/highuid.h>
#include <linux/vmalloc.h>
#include <linux/fsnotify.h>
#include <asm/mman.h>
#include <asm/types.h>
#include <asm/uaccess.h>
@ -984,8 +985,10 @@ asmlinkage long sys32_open(const char __user * filename, int flags, int mode)
if (IS_ERR(f)) {
put_unused_fd(fd);
fd = error;
} else
} else {
fsnotify_open(f->f_dentry);
fd_install(fd, f);
}
}
putname(tmp);
}

View file

@ -109,23 +109,10 @@ void machine_shutdown(void)
local_irq_enable();
}
void machine_restart(char * __unused)
void machine_emergency_restart(void)
{
int i;
printk("machine restart\n");
machine_shutdown();
if (!reboot_force) {
local_irq_disable();
#ifndef CONFIG_SMP
disable_local_APIC();
#endif
disable_IO_APIC();
local_irq_enable();
}
/* Tell the BIOS if we want cold or warm reboot */
*((unsigned short *)__va(0x472)) = reboot_mode;
@ -150,18 +137,26 @@ void machine_restart(char * __unused)
}
}
EXPORT_SYMBOL(machine_restart);
void machine_restart(char * __unused)
{
printk("machine restart\n");
if (!reboot_force) {
machine_shutdown();
}
machine_emergency_restart();
}
void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
if (!reboot_force) {
machine_shutdown();
}
if (pm_power_off)
pm_power_off();
}
EXPORT_SYMBOL(machine_power_off);

View file

@ -19,8 +19,6 @@
int acpi_sleep_prepare(u32 acpi_state)
{
/* Flag to do not allow second time invocation for S5 state */
static int shutdown_prepared = 0;
#ifdef CONFIG_ACPI_SLEEP
/* do we have a wakeup address for S2 and S3? */
/* Here, we support only S4BIOS, those we set the wakeup address */
@ -38,28 +36,23 @@ int acpi_sleep_prepare(u32 acpi_state)
acpi_enable_wakeup_device_prep(acpi_state);
#endif
if (acpi_state == ACPI_STATE_S5) {
/* Check if we were already called */
if (shutdown_prepared)
return 0;
acpi_wakeup_gpe_poweroff_prepare();
shutdown_prepared = 1;
}
acpi_enter_sleep_state_prep(acpi_state);
return 0;
}
#ifdef CONFIG_PM
void acpi_power_off(void)
{
/* acpi_sleep_prepare(ACPI_STATE_S5) should have already been called */
printk("%s called\n", __FUNCTION__);
acpi_sleep_prepare(ACPI_STATE_S5);
local_irq_disable();
/* Some SMP machines only can poweroff in boot CPU */
set_cpus_allowed(current, cpumask_of_cpu(0));
acpi_enter_sleep_state(ACPI_STATE_S5);
}
#ifdef CONFIG_PM
static int acpi_shutdown(struct sys_device *x)
{
return acpi_sleep_prepare(ACPI_STATE_S5);
@ -75,8 +68,6 @@ static struct sys_device device_acpi = {
.cls = &acpi_sysclass,
};
#endif
static int acpi_poweroff_init(void)
{
if (!acpi_disabled) {
@ -86,19 +77,18 @@ static int acpi_poweroff_init(void)
status =
acpi_get_sleep_type_data(ACPI_STATE_S5, &type_a, &type_b);
if (ACPI_SUCCESS(status)) {
pm_power_off = acpi_power_off;
#ifdef CONFIG_PM
{
int error;
error = sysdev_class_register(&acpi_sysclass);
if (!error)
error = sysdev_register(&device_acpi);
return error;
}
#endif
int error;
error = sysdev_class_register(&acpi_sysclass);
if (!error)
error = sysdev_register(&device_acpi);
if (!error)
pm_power_off = acpi_power_off;
return error;
}
}
return 0;
}
late_initcall(acpi_poweroff_init);
#endif /* CONFIG_PM */

View file

@ -173,7 +173,7 @@ static void hangcheck_fire(unsigned long data)
}
if (hangcheck_reboot) {
printk(KERN_CRIT "Hangcheck: hangcheck is restarting the machine.\n");
machine_restart(NULL);
emergency_restart();
} else {
printk(KERN_CRIT "Hangcheck: hangcheck value past margin!\n");
}

View file

@ -115,7 +115,7 @@ static void sysrq_handle_reboot(int key, struct pt_regs *pt_regs,
struct tty_struct *tty)
{
local_irq_enable();
machine_restart(NULL);
emergency_restart();
}
static struct sysrq_key_op sysrq_reboot_op = {

View file

@ -167,7 +167,7 @@ static irqreturn_t eurwdt_interrupt(int irq, void *dev_id, struct pt_regs *regs)
printk(KERN_CRIT "Would Reboot.\n");
#else
printk(KERN_CRIT "Initiating system reboot.\n");
machine_restart(NULL);
emergency_restart();
#endif
return IRQ_HANDLED;
}

View file

@ -344,7 +344,7 @@ static int pcwd_get_status(int *status)
*status |= WDIOF_OVERHEAT;
if (temp_panic) {
printk (KERN_INFO PFX "Temperature overheat trip!\n");
machine_power_off();
kernel_power_off();
}
}
} else {
@ -355,7 +355,7 @@ static int pcwd_get_status(int *status)
*status |= WDIOF_OVERHEAT;
if (temp_panic) {
printk (KERN_INFO PFX "Temperature overheat trip!\n");
machine_power_off();
kernel_power_off();
}
}
}

View file

@ -97,7 +97,7 @@ static void watchdog_fire(unsigned long data)
else
{
printk(KERN_CRIT PFX "Initiating system reboot.\n");
machine_restart(NULL);
emergency_restart();
printk(KERN_CRIT PFX "Reboot didn't ?????\n");
}
}

View file

@ -266,7 +266,7 @@ static irqreturn_t wdt_interrupt(int irq, void *dev_id, struct pt_regs *regs)
printk(KERN_CRIT "Would Reboot.\n");
#else
printk(KERN_CRIT "Initiating system reboot.\n");
machine_restart(NULL);
emergency_restart();
#endif
#else
printk(KERN_CRIT "Reset in 5ms.\n");

View file

@ -311,7 +311,7 @@ static irqreturn_t wdtpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
printk(KERN_CRIT PFX "Would Reboot.\n");
#else
printk(KERN_CRIT PFX "Initiating system reboot.\n");
machine_restart(NULL);
emergency_restart(NULL);
#endif
#else
printk(KERN_CRIT PFX "Reset in 5ms.\n");

View file

@ -365,6 +365,7 @@ void fcp_register(fc_channel *fc, u8 type, int unregister)
kfree (fc->scsi_bitmap);
kfree (fc->cmd_slots);
FCND(("Unregistering\n"));
#if 0
if (fc->rst_pkt) {
if (fc->rst_pkt->eh_state == SCSI_STATE_UNUSED)
kfree(fc->rst_pkt);
@ -373,6 +374,7 @@ void fcp_register(fc_channel *fc, u8 type, int unregister)
printk("FC: Reset in progress. Now?!");
}
}
#endif
FCND(("Unregistered\n"));
}
} else
@ -915,6 +917,7 @@ int fcp_scsi_abort(Scsi_Cmnd *SCpnt)
}
}
#if 0
void fcp_scsi_reset_done(Scsi_Cmnd *SCpnt)
{
fc_channel *fc = FC_SCMND(SCpnt);
@ -922,11 +925,13 @@ void fcp_scsi_reset_done(Scsi_Cmnd *SCpnt)
fc->rst_pkt->eh_state = SCSI_STATE_FINISHED;
up(fc->rst_pkt->device->host->eh_action);
}
#endif
#define FCP_RESET_TIMEOUT (2*HZ)
int fcp_scsi_dev_reset(Scsi_Cmnd *SCpnt)
{
#if 0 /* broken junk, but if davem wants to compile this driver, let him.. */
unsigned long flags;
fcp_cmd *cmd;
fcp_cmnd *fcmd;
@ -1000,6 +1005,7 @@ int fcp_scsi_dev_reset(Scsi_Cmnd *SCpnt)
}
fc->rst_pkt->eh_state = SCSI_STATE_UNUSED;
return SUCCESS;
#endif
}
static int __fcp_scsi_host_reset(Scsi_Cmnd *SCpnt)

View file

@ -83,19 +83,6 @@ static int mptfcDoneCtx = -1;
static int mptfcTaskCtx = -1;
static int mptfcInternalCtx = -1; /* Used only for internal commands */
static struct device_attribute mptfc_queue_depth_attr = {
.attr = {
.name = "queue_depth",
.mode = S_IWUSR,
},
.store = mptscsih_store_queue_depth,
};
static struct device_attribute *mptfc_dev_attrs[] = {
&mptfc_queue_depth_attr,
NULL,
};
static struct scsi_host_template mptfc_driver_template = {
.proc_name = "mptfc",
.proc_info = mptscsih_proc_info,
@ -105,6 +92,7 @@ static struct scsi_host_template mptfc_driver_template = {
.slave_alloc = mptscsih_slave_alloc,
.slave_configure = mptscsih_slave_configure,
.slave_destroy = mptscsih_slave_destroy,
.change_queue_depth = mptscsih_change_queue_depth,
.eh_abort_handler = mptscsih_abort,
.eh_device_reset_handler = mptscsih_dev_reset,
.eh_bus_reset_handler = mptscsih_bus_reset,
@ -116,7 +104,6 @@ static struct scsi_host_template mptfc_driver_template = {
.max_sectors = 8192,
.cmd_per_lun = 7,
.use_clustering = ENABLE_CLUSTERING,
.sdev_attrs = mptfc_dev_attrs,
};
/****************************************************************************
@ -267,10 +254,6 @@ mptfc_probe(struct pci_dev *pdev, const struct pci_device_id *id)
sh->sg_tablesize = numSGE;
}
/* Set the pci device pointer in Scsi_Host structure.
*/
scsi_set_device(sh, &ioc->pcidev->dev);
spin_unlock_irqrestore(&ioc->FreeQlock, flags);
hd = (MPT_SCSI_HOST *) sh->hostdata;

View file

@ -2234,13 +2234,27 @@ mptscsih_slave_destroy(struct scsi_device *device)
}
}
static void
mptscsih_set_queue_depth(struct scsi_device *device, MPT_SCSI_HOST *hd,
VirtDevice *pTarget, int qdepth)
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
* mptscsih_change_queue_depth - This function will set a devices queue depth
* @sdev: per scsi_device pointer
* @qdepth: requested queue depth
*
* Adding support for new 'change_queue_depth' api.
*/
int
mptscsih_change_queue_depth(struct scsi_device *sdev, int qdepth)
{
MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *)sdev->host->hostdata;
VirtDevice *pTarget;
int max_depth;
int tagged;
if (hd == NULL)
return 0;
if (!(pTarget = hd->Targets[sdev->id]))
return 0;
if (hd->ioc->bus_type == SCSI) {
if (pTarget->tflags & MPT_TARGET_FLAGS_VALID_INQUIRY) {
if (!(pTarget->tflags & MPT_TARGET_FLAGS_Q_YES))
@ -2264,10 +2278,10 @@ mptscsih_set_queue_depth(struct scsi_device *device, MPT_SCSI_HOST *hd,
else
tagged = MSG_SIMPLE_TAG;
scsi_adjust_queue_depth(device, tagged, qdepth);
scsi_adjust_queue_depth(sdev, tagged, qdepth);
return sdev->queue_depth;
}
/*
* OS entry point to adjust the queue_depths on a per-device basis.
* Called once per device the bus scan. Use it to force the queue_depth
@ -2317,7 +2331,7 @@ mptscsih_slave_configure(struct scsi_device *device)
mptscsih_initTarget(hd, device->channel, device->id, device->lun,
device->inquiry, device->inquiry_len );
mptscsih_set_queue_depth(device, hd, pTarget, MPT_SCSI_CMD_PER_DEV_HIGH);
mptscsih_change_queue_depth(device, MPT_SCSI_CMD_PER_DEV_HIGH);
dsprintk((MYIOC_s_INFO_FMT
"Queue depth=%d, tflags=%x\n",
@ -2337,25 +2351,6 @@ mptscsih_slave_configure(struct scsi_device *device)
return 0;
}
ssize_t
mptscsih_store_queue_depth(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
{
int depth;
struct scsi_device *sdev = to_scsi_device(dev);
MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *) sdev->host->hostdata;
VirtDevice *pTarget;
depth = simple_strtoul(buf, NULL, 0);
if (depth == 0)
return -EINVAL;
pTarget = hd->Targets[sdev->id];
if (pTarget == NULL)
return -EINVAL;
mptscsih_set_queue_depth(sdev, (MPT_SCSI_HOST *) sdev->host->hostdata,
pTarget, depth);
return count;
}
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
* Private routines...
@ -5586,7 +5581,7 @@ EXPORT_SYMBOL(mptscsih_taskmgmt_complete);
EXPORT_SYMBOL(mptscsih_scandv_complete);
EXPORT_SYMBOL(mptscsih_event_process);
EXPORT_SYMBOL(mptscsih_ioc_reset);
EXPORT_SYMBOL(mptscsih_store_queue_depth);
EXPORT_SYMBOL(mptscsih_change_queue_depth);
EXPORT_SYMBOL(mptscsih_timer_expired);
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/

View file

@ -103,5 +103,5 @@ extern int mptscsih_taskmgmt_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_F
extern int mptscsih_scandv_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *r);
extern int mptscsih_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply);
extern int mptscsih_ioc_reset(MPT_ADAPTER *ioc, int post_reset);
extern ssize_t mptscsih_store_queue_depth(struct device *dev, struct device_attribute *attr, const char *buf, size_t count);
extern int mptscsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
extern void mptscsih_timer_expired(unsigned long data);

View file

@ -102,19 +102,6 @@ static int mptspiDoneCtx = -1;
static int mptspiTaskCtx = -1;
static int mptspiInternalCtx = -1; /* Used only for internal commands */
static struct device_attribute mptspi_queue_depth_attr = {
.attr = {
.name = "queue_depth",
.mode = S_IWUSR,
},
.store = mptscsih_store_queue_depth,
};
static struct device_attribute *mptspi_dev_attrs[] = {
&mptspi_queue_depth_attr,
NULL,
};
static struct scsi_host_template mptspi_driver_template = {
.proc_name = "mptspi",
.proc_info = mptscsih_proc_info,
@ -124,6 +111,7 @@ static struct scsi_host_template mptspi_driver_template = {
.slave_alloc = mptscsih_slave_alloc,
.slave_configure = mptscsih_slave_configure,
.slave_destroy = mptscsih_slave_destroy,
.change_queue_depth = mptscsih_change_queue_depth,
.eh_abort_handler = mptscsih_abort,
.eh_device_reset_handler = mptscsih_dev_reset,
.eh_bus_reset_handler = mptscsih_bus_reset,
@ -135,7 +123,6 @@ static struct scsi_host_template mptspi_driver_template = {
.max_sectors = 8192,
.cmd_per_lun = 7,
.use_clustering = ENABLE_CLUSTERING,
.sdev_attrs = mptspi_dev_attrs,
};
@ -287,10 +274,6 @@ mptspi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
sh->sg_tablesize = numSGE;
}
/* Set the pci device pointer in Scsi_Host structure.
*/
scsi_set_device(sh, &ioc->pcidev->dev);
spin_unlock_irqrestore(&ioc->FreeQlock, flags);
hd = (MPT_SCSI_HOST *) sh->hostdata;

View file

@ -66,8 +66,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
#define DRV_MODULE_VERSION "3.33"
#define DRV_MODULE_RELDATE "July 5, 2005"
#define DRV_MODULE_VERSION "3.34"
#define DRV_MODULE_RELDATE "July 25, 2005"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
@ -90,7 +90,7 @@
/* hardware minimum and maximum for a single frame's data payload */
#define TG3_MIN_MTU 60
#define TG3_MAX_MTU(tp) \
(!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ? 9000 : 1500)
((tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) ? 9000 : 1500)
/* These numbers seem to be hard coded in the NIC firmware somehow.
* You can't change the ring sizes, but you can change where you place
@ -221,6 +221,10 @@ static struct pci_device_id tg3_pci_tbl[] = {
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX,
@ -508,6 +512,9 @@ static void tg3_switch_clocks(struct tg3 *tp)
u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL);
u32 orig_clock_ctrl;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
return;
orig_clock_ctrl = clock_ctrl;
clock_ctrl &= (CLOCK_CTRL_FORCE_CLKRUN |
CLOCK_CTRL_CLKRUN_OENABLE |
@ -907,7 +914,7 @@ static int tg3_phy_reset(struct tg3 *tp)
if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
/* Cannot do read-modify-write on 5401 */
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20);
} else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) {
} else if (tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) {
u32 phy_reg;
/* Set bit 14 with read-modify-write to preserve other bits */
@ -919,7 +926,7 @@ static int tg3_phy_reset(struct tg3 *tp)
/* Set phy register 0x10 bit 0 to high fifo elasticity to support
* jumbo frames transmission.
*/
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) {
if (tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) {
u32 phy_reg;
if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg))
@ -1093,7 +1100,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
tp->link_config.orig_autoneg = tp->link_config.autoneg;
}
if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)) {
tp->link_config.speed = SPEED_10;
tp->link_config.duplex = DUPLEX_HALF;
tp->link_config.autoneg = AUTONEG_ENABLE;
@ -1145,6 +1152,8 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
CLOCK_CTRL_ALTCLK |
CLOCK_CTRL_PWRDOWN_PLL133);
udelay(40);
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
/* do nothing */
} else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) {
u32 newbits1, newbits2;
@ -1238,6 +1247,25 @@ static void tg3_setup_flow_control(struct tg3 *tp, u32 local_adv, u32 remote_adv
u32 old_tx_mode = tp->tx_mode;
if (tp->tg3_flags & TG3_FLAG_PAUSE_AUTONEG) {
/* Convert 1000BaseX flow control bits to 1000BaseT
* bits before resolving flow control.
*/
if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
local_adv &= ~(ADVERTISE_PAUSE_CAP |
ADVERTISE_PAUSE_ASYM);
remote_adv &= ~(LPA_PAUSE_CAP | LPA_PAUSE_ASYM);
if (local_adv & ADVERTISE_1000XPAUSE)
local_adv |= ADVERTISE_PAUSE_CAP;
if (local_adv & ADVERTISE_1000XPSE_ASYM)
local_adv |= ADVERTISE_PAUSE_ASYM;
if (remote_adv & LPA_1000XPAUSE)
remote_adv |= LPA_PAUSE_CAP;
if (remote_adv & LPA_1000XPAUSE_ASYM)
remote_adv |= LPA_PAUSE_ASYM;
}
if (local_adv & ADVERTISE_PAUSE_CAP) {
if (local_adv & ADVERTISE_PAUSE_ASYM) {
if (remote_adv & LPA_PAUSE_CAP)
@ -2498,12 +2526,226 @@ static int tg3_setup_fiber_phy(struct tg3 *tp, int force_reset)
return 0;
}
static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
{
int current_link_up, err = 0;
u32 bmsr, bmcr;
u16 current_speed;
u8 current_duplex;
tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
tw32_f(MAC_MODE, tp->mac_mode);
udelay(40);
tw32(MAC_EVENT, 0);
tw32_f(MAC_STATUS,
(MAC_STATUS_SYNC_CHANGED |
MAC_STATUS_CFG_CHANGED |
MAC_STATUS_MI_COMPLETION |
MAC_STATUS_LNKSTATE_CHANGED));
udelay(40);
if (force_reset)
tg3_phy_reset(tp);
current_link_up = 0;
current_speed = SPEED_INVALID;
current_duplex = DUPLEX_INVALID;
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMCR, &bmcr);
if ((tp->link_config.autoneg == AUTONEG_ENABLE) && !force_reset &&
(tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) {
/* do nothing, just check for link up at the end */
} else if (tp->link_config.autoneg == AUTONEG_ENABLE) {
u32 adv, new_adv;
err |= tg3_readphy(tp, MII_ADVERTISE, &adv);
new_adv = adv & ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF |
ADVERTISE_1000XPAUSE |
ADVERTISE_1000XPSE_ASYM |
ADVERTISE_SLCT);
/* Always advertise symmetric PAUSE just like copper */
new_adv |= ADVERTISE_1000XPAUSE;
if (tp->link_config.advertising & ADVERTISED_1000baseT_Half)
new_adv |= ADVERTISE_1000XHALF;
if (tp->link_config.advertising & ADVERTISED_1000baseT_Full)
new_adv |= ADVERTISE_1000XFULL;
if ((new_adv != adv) || !(bmcr & BMCR_ANENABLE)) {
tg3_writephy(tp, MII_ADVERTISE, new_adv);
bmcr |= BMCR_ANENABLE | BMCR_ANRESTART;
tg3_writephy(tp, MII_BMCR, bmcr);
tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED);
tp->tg3_flags2 |= TG3_FLG2_PHY_JUST_INITTED;
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
return err;
}
} else {
u32 new_bmcr;
bmcr &= ~BMCR_SPEED1000;
new_bmcr = bmcr & ~(BMCR_ANENABLE | BMCR_FULLDPLX);
if (tp->link_config.duplex == DUPLEX_FULL)
new_bmcr |= BMCR_FULLDPLX;
if (new_bmcr != bmcr) {
/* BMCR_SPEED1000 is a reserved bit that needs
* to be set on write.
*/
new_bmcr |= BMCR_SPEED1000;
/* Force a linkdown */
if (netif_carrier_ok(tp->dev)) {
u32 adv;
err |= tg3_readphy(tp, MII_ADVERTISE, &adv);
adv &= ~(ADVERTISE_1000XFULL |
ADVERTISE_1000XHALF |
ADVERTISE_SLCT);
tg3_writephy(tp, MII_ADVERTISE, adv);
tg3_writephy(tp, MII_BMCR, bmcr |
BMCR_ANRESTART |
BMCR_ANENABLE);
udelay(10);
netif_carrier_off(tp->dev);
}
tg3_writephy(tp, MII_BMCR, new_bmcr);
bmcr = new_bmcr;
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
}
}
if (bmsr & BMSR_LSTATUS) {
current_speed = SPEED_1000;
current_link_up = 1;
if (bmcr & BMCR_FULLDPLX)
current_duplex = DUPLEX_FULL;
else
current_duplex = DUPLEX_HALF;
if (bmcr & BMCR_ANENABLE) {
u32 local_adv, remote_adv, common;
err |= tg3_readphy(tp, MII_ADVERTISE, &local_adv);
err |= tg3_readphy(tp, MII_LPA, &remote_adv);
common = local_adv & remote_adv;
if (common & (ADVERTISE_1000XHALF |
ADVERTISE_1000XFULL)) {
if (common & ADVERTISE_1000XFULL)
current_duplex = DUPLEX_FULL;
else
current_duplex = DUPLEX_HALF;
tg3_setup_flow_control(tp, local_adv,
remote_adv);
}
else
current_link_up = 0;
}
}
tp->mac_mode &= ~MAC_MODE_HALF_DUPLEX;
if (tp->link_config.active_duplex == DUPLEX_HALF)
tp->mac_mode |= MAC_MODE_HALF_DUPLEX;
tw32_f(MAC_MODE, tp->mac_mode);
udelay(40);
tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED);
tp->link_config.active_speed = current_speed;
tp->link_config.active_duplex = current_duplex;
if (current_link_up != netif_carrier_ok(tp->dev)) {
if (current_link_up)
netif_carrier_on(tp->dev);
else {
netif_carrier_off(tp->dev);
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
}
tg3_link_report(tp);
}
return err;
}
static void tg3_serdes_parallel_detect(struct tg3 *tp)
{
if (tp->tg3_flags2 & TG3_FLG2_PHY_JUST_INITTED) {
/* Give autoneg time to complete. */
tp->tg3_flags2 &= ~TG3_FLG2_PHY_JUST_INITTED;
return;
}
if (!netif_carrier_ok(tp->dev) &&
(tp->link_config.autoneg == AUTONEG_ENABLE)) {
u32 bmcr;
tg3_readphy(tp, MII_BMCR, &bmcr);
if (bmcr & BMCR_ANENABLE) {
u32 phy1, phy2;
/* Select shadow register 0x1f */
tg3_writephy(tp, 0x1c, 0x7c00);
tg3_readphy(tp, 0x1c, &phy1);
/* Select expansion interrupt status register */
tg3_writephy(tp, 0x17, 0x0f01);
tg3_readphy(tp, 0x15, &phy2);
tg3_readphy(tp, 0x15, &phy2);
if ((phy1 & 0x10) && !(phy2 & 0x20)) {
/* We have signal detect and not receiving
* config code words, link is up by parallel
* detection.
*/
bmcr &= ~BMCR_ANENABLE;
bmcr |= BMCR_SPEED1000 | BMCR_FULLDPLX;
tg3_writephy(tp, MII_BMCR, bmcr);
tp->tg3_flags2 |= TG3_FLG2_PARALLEL_DETECT;
}
}
}
else if (netif_carrier_ok(tp->dev) &&
(tp->link_config.autoneg == AUTONEG_ENABLE) &&
(tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) {
u32 phy2;
/* Select expansion interrupt status register */
tg3_writephy(tp, 0x17, 0x0f01);
tg3_readphy(tp, 0x15, &phy2);
if (phy2 & 0x20) {
u32 bmcr;
/* Config code words received, turn on autoneg. */
tg3_readphy(tp, MII_BMCR, &bmcr);
tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANENABLE);
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
}
}
}
static int tg3_setup_phy(struct tg3 *tp, int force_reset)
{
int err;
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
err = tg3_setup_fiber_phy(tp, force_reset);
} else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
err = tg3_setup_fiber_mii_phy(tp, force_reset);
} else {
err = tg3_setup_copper_phy(tp, force_reset);
}
@ -2612,7 +2854,7 @@ static int tg3_alloc_rx_skb(struct tg3 *tp, u32 opaque_key,
map = &tp->rx_std_buffers[dest_idx];
if (src_idx >= 0)
src_map = &tp->rx_std_buffers[src_idx];
skb_size = RX_PKT_BUF_SZ;
skb_size = tp->rx_pkt_buf_sz;
break;
case RXD_OPAQUE_RING_JUMBO:
@ -3434,10 +3676,18 @@ static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp,
{
dev->mtu = new_mtu;
if (new_mtu > ETH_DATA_LEN)
tp->tg3_flags |= TG3_FLAG_JUMBO_ENABLE;
else
tp->tg3_flags &= ~TG3_FLAG_JUMBO_ENABLE;
if (new_mtu > ETH_DATA_LEN) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE;
ethtool_op_set_tso(dev, 0);
}
else
tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE;
} else {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;
tp->tg3_flags &= ~TG3_FLAG_JUMBO_RING_ENABLE;
}
}
static int tg3_change_mtu(struct net_device *dev, int new_mtu)
@ -3491,7 +3741,7 @@ static void tg3_free_rings(struct tg3 *tp)
continue;
pci_unmap_single(tp->pdev,
pci_unmap_addr(rxp, mapping),
RX_PKT_BUF_SZ - tp->rx_offset,
tp->rx_pkt_buf_sz - tp->rx_offset,
PCI_DMA_FROMDEVICE);
dev_kfree_skb_any(rxp->skb);
rxp->skb = NULL;
@ -3564,6 +3814,11 @@ static void tg3_init_rings(struct tg3 *tp)
memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
memset(tp->tx_ring, 0, TG3_TX_RING_BYTES);
tp->rx_pkt_buf_sz = RX_PKT_BUF_SZ;
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) &&
(tp->dev->mtu > ETH_DATA_LEN))
tp->rx_pkt_buf_sz = RX_JUMBO_PKT_BUF_SZ;
/* Initialize invariants of the rings, we only set this
* stuff once. This works because the card does not
* write into the rx buffer posting rings.
@ -3572,14 +3827,14 @@ static void tg3_init_rings(struct tg3 *tp)
struct tg3_rx_buffer_desc *rxd;
rxd = &tp->rx_std[i];
rxd->idx_len = (RX_PKT_BUF_SZ - tp->rx_offset - 64)
rxd->idx_len = (tp->rx_pkt_buf_sz - tp->rx_offset - 64)
<< RXD_LEN_SHIFT;
rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT);
rxd->opaque = (RXD_OPAQUE_RING_STD |
(i << RXD_OPAQUE_INDEX_SHIFT));
}
if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) {
if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) {
for (i = 0; i < TG3_RX_JUMBO_RING_SIZE; i++) {
struct tg3_rx_buffer_desc *rxd;
@ -3600,7 +3855,7 @@ static void tg3_init_rings(struct tg3 *tp)
break;
}
if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) {
if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) {
for (i = 0; i < tp->rx_jumbo_pending; i++) {
if (tg3_alloc_rx_skb(tp, RXD_OPAQUE_RING_JUMBO,
-1, i) < 0)
@ -4056,7 +4311,30 @@ static int tg3_chip_reset(struct tg3 *tp)
val &= ~PCIX_CAPS_RELAXED_ORDERING;
pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
u32 val;
/* Chip reset on 5780 will reset MSI enable bit,
* so need to restore it.
*/
if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
u16 ctrl;
pci_read_config_word(tp->pdev,
tp->msi_cap + PCI_MSI_FLAGS,
&ctrl);
pci_write_config_word(tp->pdev,
tp->msi_cap + PCI_MSI_FLAGS,
ctrl | PCI_MSI_FLAGS_ENABLE);
val = tr32(MSGINT_MODE);
tw32(MSGINT_MODE, val | MSGINT_MODE_ENABLE);
}
val = tr32(MEMARB_MODE);
tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE);
} else
tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A3) {
tg3_stop_fw(tp);
@ -4082,6 +4360,9 @@ static int tg3_chip_reset(struct tg3 *tp)
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
tp->mac_mode = MAC_MODE_PORT_MODE_TBI;
tw32_f(MAC_MODE, tp->mac_mode);
} else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
tp->mac_mode = MAC_MODE_PORT_MODE_GMII;
tw32_f(MAC_MODE, tp->mac_mode);
} else
tw32_f(MAC_MODE, 0);
udelay(40);
@ -5245,7 +5526,7 @@ static int tg3_reset_hw(struct tg3 *tp)
}
#endif
if (!(tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE)) {
if (tp->dev->mtu <= ETH_DATA_LEN) {
tw32(BUFMGR_MB_RDMA_LOW_WATER,
tp->bufmgr_config.mbuf_read_dma_low_water);
tw32(BUFMGR_MB_MACRX_LOW_WATER,
@ -5320,7 +5601,7 @@ static int tg3_reset_hw(struct tg3 *tp)
/* Setup replenish threshold. */
tw32(RCVBDI_JUMBO_THRESH, tp->rx_jumbo_pending / 8);
if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) {
if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) {
tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH,
((u64) tp->rx_jumbo_mapping >> 32));
tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
@ -5381,7 +5662,7 @@ static int tg3_reset_hw(struct tg3 *tp)
tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW,
tp->rx_std_ptr);
tp->rx_jumbo_ptr = (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) ?
tp->rx_jumbo_ptr = (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) ?
tp->rx_jumbo_pending : 0;
tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW,
tp->rx_jumbo_ptr);
@ -5683,7 +5964,8 @@ static int tg3_reset_hw(struct tg3 *tp)
tw32(MAC_RCV_RULE_1, 0x86000004 & RCV_RULE_DISABLE_MASK);
tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK);
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5780))
limit = 8;
else
limit = 16;
@ -5865,7 +6147,8 @@ static void tg3_timer(unsigned long __opaque)
udelay(40);
tg3_setup_phy(tp, 0);
}
}
} else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
tg3_serdes_parallel_detect(tp);
tp->timer_counter = tp->timer_multiplier;
}
@ -8569,8 +8852,12 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
eeprom_phy_id = 0;
tp->phy_id = eeprom_phy_id;
if (eeprom_phy_serdes)
tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
if (eeprom_phy_serdes) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
else
tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
}
if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
@ -8705,7 +8992,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
}
}
if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) &&
!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
u32 bmsr, adv_reg, tg3_ctrl;
@ -8758,7 +9045,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
err = tg3_init_5401phy_dsp(tp);
}
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)
tp->link_config.advertising =
(ADVERTISED_1000baseT_Half |
ADVERTISED_1000baseT_Full |
@ -8928,6 +9215,10 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW)
tp->pci_chip_rev_id = CHIPREV_ID_5752_A0;
/* Find msi capability. */
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI);
/* Initialize misc host control in PCI block. */
tp->misc_host_ctrl |= (misc_ctrl_reg &
MISC_HOST_CTRL_CHIPREV);
@ -8943,7 +9234,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
@ -8953,6 +9245,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
tp->tg3_flags2 |= TG3_FLG2_HW_TSO;
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752)
tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE;
if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0)
tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
@ -9079,8 +9376,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
/* Derive initial jumbo mode from MTU assigned in
* ether_setup() via the alloc_etherdev() call
*/
if (tp->dev->mtu > ETH_DATA_LEN)
tp->tg3_flags |= TG3_FLAG_JUMBO_ENABLE;
if (tp->dev->mtu > ETH_DATA_LEN &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5780)
tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE;
/* Determine WakeOnLan speed to use. */
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
@ -9096,7 +9394,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) ||
((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) &&
(tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) &&
(tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)))
(tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)) ||
(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES))
tp->tg3_flags2 |= TG3_FLG2_NO_ETH_WIRE_SPEED;
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5703_AX ||
@ -9305,8 +9604,9 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
#endif
mac_offset = 0x7c;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
!(tp->tg3_flags & TG3_FLG2_SUN_570X)) {
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
!(tp->tg3_flags & TG3_FLG2_SUN_570X)) ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID)
mac_offset = 0xcc;
if (tg3_nvram_lock(tp))
@ -9620,6 +9920,9 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
/* Set bit 23 to enable PCIX hw bug fix */
tp->dma_rwctrl |= 0x009f0000;
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
/* 5780 always in PCIX mode */
tp->dma_rwctrl |= 0x00144000;
} else {
tp->dma_rwctrl |= 0x001b000f;
}
@ -9773,19 +10076,35 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
{
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER;
tp->bufmgr_config.mbuf_mac_rx_low_water =
DEFAULT_MB_MACRX_LOW_WATER;
tp->bufmgr_config.mbuf_high_water =
DEFAULT_MB_HIGH_WATER;
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER_5705;
tp->bufmgr_config.mbuf_mac_rx_low_water =
DEFAULT_MB_MACRX_LOW_WATER_5705;
tp->bufmgr_config.mbuf_high_water =
DEFAULT_MB_HIGH_WATER_5705;
tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
DEFAULT_MB_RDMA_LOW_WATER_JUMBO;
tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
DEFAULT_MB_MACRX_LOW_WATER_JUMBO;
tp->bufmgr_config.mbuf_high_water_jumbo =
DEFAULT_MB_HIGH_WATER_JUMBO;
tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780;
tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780;
tp->bufmgr_config.mbuf_high_water_jumbo =
DEFAULT_MB_HIGH_WATER_JUMBO_5780;
} else {
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER;
tp->bufmgr_config.mbuf_mac_rx_low_water =
DEFAULT_MB_MACRX_LOW_WATER;
tp->bufmgr_config.mbuf_high_water =
DEFAULT_MB_HIGH_WATER;
tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
DEFAULT_MB_RDMA_LOW_WATER_JUMBO;
tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
DEFAULT_MB_MACRX_LOW_WATER_JUMBO;
tp->bufmgr_config.mbuf_high_water_jumbo =
DEFAULT_MB_HIGH_WATER_JUMBO;
}
tp->bufmgr_config.dma_low_water = DEFAULT_DMA_LOW_WATER;
tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER;
@ -9803,6 +10122,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
case PHY_ID_BCM5705: return "5705";
case PHY_ID_BCM5750: return "5750";
case PHY_ID_BCM5752: return "5752";
case PHY_ID_BCM5780: return "5780";
case PHY_ID_BCM8002: return "8002/serdes";
case 0: return "serdes";
default: return "unknown";
@ -9998,8 +10318,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
tg3_init_link_config(tp);
tg3_init_bufmgr_config(tp);
tp->rx_pending = TG3_DEF_RX_RING_PENDING;
tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING;
tp->tx_pending = TG3_DEF_TX_RING_PENDING;
@ -10028,14 +10346,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
goto err_out_iounmap;
}
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER_5705;
tp->bufmgr_config.mbuf_mac_rx_low_water =
DEFAULT_MB_MACRX_LOW_WATER_5705;
tp->bufmgr_config.mbuf_high_water =
DEFAULT_MB_HIGH_WATER_5705;
}
tg3_init_bufmgr_config(tp);
#if TG3_TSO_SUPPORT != 0
if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {

View file

@ -136,6 +136,7 @@
#define ASIC_REV_5705 0x03
#define ASIC_REV_5750 0x04
#define ASIC_REV_5752 0x06
#define ASIC_REV_5780 0x08
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
#define CHIPREV_5700_AX 0x70
#define CHIPREV_5700_BX 0x71
@ -984,14 +985,17 @@
#define DEFAULT_MB_RDMA_LOW_WATER 0x00000050
#define DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000
#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130
#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780 0x00000000
#define BUFMGR_MB_MACRX_LOW_WATER 0x00004414
#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020
#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010
#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098
#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b
#define BUFMGR_MB_HIGH_WATER 0x00004418
#define DEFAULT_MB_HIGH_WATER 0x00000060
#define DEFAULT_MB_HIGH_WATER_5705 0x00000060
#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c
#define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096
#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c
#define BUFMGR_MB_ALLOC_BIT 0x10000000
#define BUFMGR_RX_MB_ALLOC_RESP 0x00004420
@ -2087,6 +2091,8 @@ struct tg3 {
struct tg3_rx_buffer_desc *rx_rcb;
dma_addr_t rx_rcb_mapping;
u32 rx_pkt_buf_sz;
/* begin "everything else" cacheline(s) section */
struct net_device_stats net_stats;
struct net_device_stats net_stats_prev;
@ -2124,7 +2130,7 @@ struct tg3 {
#define TG3_FLAG_NO_TX_PSEUDO_CSUM 0x00100000
#define TG3_FLAG_NO_RX_PSEUDO_CSUM 0x00200000
#define TG3_FLAG_SERDES_WOL_CAP 0x00400000
#define TG3_FLAG_JUMBO_ENABLE 0x00800000
#define TG3_FLAG_JUMBO_RING_ENABLE 0x00800000
#define TG3_FLAG_10_100_ONLY 0x01000000
#define TG3_FLAG_PAUSE_AUTONEG 0x02000000
#define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000
@ -2154,6 +2160,11 @@ struct tg3 {
#define TG3_FLG2_5750_PLUS 0x00080000
#define TG3_FLG2_PROTECTED_NVRAM 0x00100000
#define TG3_FLG2_USING_MSI 0x00200000
#define TG3_FLG2_JUMBO_CAPABLE 0x00400000
#define TG3_FLG2_MII_SERDES 0x00800000
#define TG3_FLG2_ANY_SERDES (TG3_FLG2_PHY_SERDES | \
TG3_FLG2_MII_SERDES)
#define TG3_FLG2_PARALLEL_DETECT 0x01000000
u32 split_mode_max_reqs;
#define SPLIT_MODE_5704_MAX_REQ 3
@ -2187,6 +2198,7 @@ struct tg3 {
u8 pci_bist;
int pm_cap;
int msi_cap;
/* PHY info */
u32 phy_id;
@ -2200,6 +2212,7 @@ struct tg3 {
#define PHY_ID_BCM5705 0x600081a0
#define PHY_ID_BCM5750 0x60008180
#define PHY_ID_BCM5752 0x60008100
#define PHY_ID_BCM5780 0x60008350
#define PHY_ID_BCM8002 0x60010140
#define PHY_ID_INVALID 0xffffffff
#define PHY_ID_REV_MASK 0x0000000f

View file

@ -30,20 +30,9 @@ static int jornada720_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
*/
GRER |= 0x00000002;
/* Set GPIO_A<3:1> to be outputs for PCMCIA/CF power controller: */
PA_DDR = 0;
PA_DWR = 0;
PA_SDR = 0;
PA_SSR = 0;
PB_DDR = 0;
PB_DWR = 0x01;
PB_SDR = 0;
PB_SSR = 0;
PC_DDR = 0x88;
PC_DWR = 0x20;
PC_SDR = 0;
PC_SSR = 0;
sa1111_set_io_dir(SA1111_DEV(skt->dev), GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0, 0);
sa1111_set_io(SA1111_DEV(skt->dev), GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
sa1111_set_sleep_io(SA1111_DEV(skt->dev), GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
return sa1111_pcmcia_hw_init(skt);
}
@ -95,7 +84,7 @@ printk("%s(): config socket %d vcc %d vpp %d\n", __FUNCTION__,
unsigned long flags;
local_irq_save(flags);
PA_DWR = (PA_DWR & ~pa_dwr_mask) | pa_dwr_set;
sa1111_set_io(SA1111_DEV(skt->dev), pa_dwr_mask, pa_dwr_set);
local_irq_restore(flags);
}

View file

@ -13,6 +13,7 @@ Supported Cards/Chipsets
Adaptec 2020S
Adaptec 2025S
Adaptec 2120S
Adaptec 2130S
Adaptec 2200S
Adaptec 2230S
Adaptec 2240S
@ -35,6 +36,13 @@ Supported Cards/Chipsets
HP NetRAID-4M
Legend S220
Legend S230
IBM ServeRAID 8i
ICP 9014R0
ICP 9024R0
ICP 9047MA
ICP 9087MA
ICP 9085LI
ICP 5085AU
People
-------------------------

View file

@ -1,6 +1,4 @@
o Testing
o More testing
o Feature request: display the firmware/bios/etc revisions in the
/proc info
o Drop irq_mask, basically unused
o I/O size increase

View file

@ -276,7 +276,6 @@ int aac_get_containers(struct aac_dev *dev)
if (maximum_num_containers < MAXIMUM_NUM_CONTAINERS)
maximum_num_containers = MAXIMUM_NUM_CONTAINERS;
fsa_dev_ptr = (struct fsa_dev_info *) kmalloc(
sizeof(*fsa_dev_ptr) * maximum_num_containers, GFP_KERNEL);
if (!fsa_dev_ptr) {
@ -527,6 +526,11 @@ static char *container_types[] = {
"V-MIRRORS",
"PSEUDO R4",
"RAID50",
"RAID5D",
"RAID5D0",
"RAID1E",
"RAID6",
"RAID60",
"Unknown"
};
@ -610,7 +614,9 @@ int aac_get_adapter_info(struct aac_dev* dev)
struct fib* fibptr;
int rcode;
u32 tmp;
struct aac_adapter_info * info;
struct aac_adapter_info *info;
struct aac_bus_info *command;
struct aac_bus_info_response *bus_info;
if (!(fibptr = fib_alloc(dev)))
return -ENOMEM;
@ -655,6 +661,36 @@ int aac_get_adapter_info(struct aac_dev* dev)
memcpy(&dev->supplement_adapter_info, info, sizeof(*info));
}
/*
* GetBusInfo
*/
fib_init(fibptr);
bus_info = (struct aac_bus_info_response *) fib_data(fibptr);
memset(bus_info, 0, sizeof(*bus_info));
command = (struct aac_bus_info *)bus_info;
command->Command = cpu_to_le32(VM_Ioctl);
command->ObjType = cpu_to_le32(FT_DRIVE);
command->MethodId = cpu_to_le32(1);
command->CtlCmd = cpu_to_le32(GetBusInfo);
rcode = fib_send(ContainerCommand,
fibptr,
sizeof (*bus_info),
FsaNormal,
1, 1,
NULL, NULL);
if (rcode >= 0 && le32_to_cpu(bus_info->Status) == ST_OK) {
dev->maximum_num_physicals = le32_to_cpu(bus_info->TargetsPerBus);
dev->maximum_num_channels = le32_to_cpu(bus_info->BusCount);
}
tmp = le32_to_cpu(dev->adapter_info.kernelrev);
printk(KERN_INFO "%s%d: kernel %d.%d-%d[%d] %.*s\n",
dev->name,
@ -1818,7 +1854,9 @@ static int aac_send_srb_fib(struct scsi_cmnd* scsicmd)
u32 flag;
u32 timeout;
if( scsicmd->device->id > 15 || scsicmd->device->lun > 7) {
dev = (struct aac_dev *)scsicmd->device->host->hostdata;
if (scsicmd->device->id >= dev->maximum_num_physicals ||
scsicmd->device->lun > 7) {
scsicmd->result = DID_NO_CONNECT << 16;
scsicmd->scsi_done(scsicmd);
return 0;

View file

@ -845,6 +845,28 @@ struct aac_supplement_adapter_info
#define AAC_SIS_VERSION_V3 3
#define AAC_SIS_SLOT_UNKNOWN 0xFF
#define GetBusInfo 0x00000009
struct aac_bus_info {
__le32 Command; /* VM_Ioctl */
__le32 ObjType; /* FT_DRIVE */
__le32 MethodId; /* 1 = SCSI Layer */
__le32 ObjectId; /* Handle */
__le32 CtlCmd; /* GetBusInfo */
};
struct aac_bus_info_response {
__le32 Status; /* ST_OK */
__le32 ObjType;
__le32 MethodId; /* unused */
__le32 ObjectId; /* unused */
__le32 CtlCmd; /* unused */
__le32 ProbeComplete;
__le32 BusCount;
__le32 TargetsPerBus;
u8 InitiatorBusId[10];
u8 BusValid[10];
};
/*
* Battery platforms
*/
@ -934,6 +956,8 @@ struct aac_dev
struct Scsi_Host *scsi_host_ptr;
int maximum_num_containers;
int maximum_num_physicals;
int maximum_num_channels;
struct fsa_dev_info *fsa_dev;
pid_t thread_pid;
int cardtype;

View file

@ -517,7 +517,7 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
}
if (dev->dac_support == 1) {
struct user_sgmap64* upsg = (struct user_sgmap64*)&user_srbcmd->sg;
struct sgmap64* psg = (struct sgmap64*)&user_srbcmd->sg;
struct sgmap64* psg = (struct sgmap64*)&srbcmd->sg;
struct user_sgmap* usg;
byte_count = 0;

View file

@ -102,32 +102,43 @@ static struct pci_device_id aac_pci_tbl[] = {
{ 0x9005, 0x0286, 0x9005, 0x029b, 0, 0, 22 }, /* AAR-2820SA (Intruder) */
{ 0x9005, 0x0286, 0x9005, 0x029c, 0, 0, 23 }, /* AAR-2620SA (Intruder) */
{ 0x9005, 0x0286, 0x9005, 0x029d, 0, 0, 24 }, /* AAR-2420SA (Intruder) */
{ 0x9005, 0x0286, 0x9005, 0x0800, 0, 0, 25 }, /* Callisto Jupiter Platform */
{ 0x9005, 0x0285, 0x9005, 0x028e, 0, 0, 26 }, /* ASR-2020SA SATA PCI-X ZCR (Skyhawk) */
{ 0x9005, 0x0285, 0x9005, 0x028f, 0, 0, 27 }, /* ASR-2025SA SATA SO-DIMM PCI-X ZCR (Terminator) */
{ 0x9005, 0x0285, 0x9005, 0x0290, 0, 0, 28 }, /* AAR-2410SA PCI SATA 4ch (Jaguar II) */
{ 0x9005, 0x0285, 0x1028, 0x0291, 0, 0, 29 }, /* CERC SATA RAID 2 PCI SATA 6ch (DellCorsair) */
{ 0x9005, 0x0285, 0x9005, 0x0292, 0, 0, 30 }, /* AAR-2810SA PCI SATA 8ch (Corsair-8) */
{ 0x9005, 0x0285, 0x9005, 0x0293, 0, 0, 31 }, /* AAR-21610SA PCI SATA 16ch (Corsair-16) */
{ 0x9005, 0x0285, 0x9005, 0x0294, 0, 0, 32 }, /* ESD SO-DIMM PCI-X SATA ZCR (Prowler) */
{ 0x9005, 0x0285, 0x103C, 0x3227, 0, 0, 33 }, /* AAR-2610SA PCI SATA 6ch */
{ 0x9005, 0x0285, 0x9005, 0x0296, 0, 0, 34 }, /* ASR-2240S (SabreExpress) */
{ 0x9005, 0x0285, 0x9005, 0x0297, 0, 0, 35 }, /* ASR-4005SAS */
{ 0x9005, 0x0285, 0x1014, 0x02F2, 0, 0, 36 }, /* IBM 8i (AvonPark) */
{ 0x9005, 0x0285, 0x9005, 0x0298, 0, 0, 37 }, /* ASR-4000SAS (BlackBird) */
{ 0x9005, 0x0285, 0x9005, 0x0299, 0, 0, 38 }, /* ASR-4800SAS (Marauder-X) */
{ 0x9005, 0x0285, 0x9005, 0x029A, 0, 0, 39 }, /* ASR-4805SAS (Marauder-E) */
{ 0x9005, 0x0286, 0x9005, 0x029e, 0, 0, 25 }, /* ICP9024R0 (Lancer) */
{ 0x9005, 0x0286, 0x9005, 0x029f, 0, 0, 26 }, /* ICP9014R0 (Lancer) */
{ 0x9005, 0x0286, 0x9005, 0x02a0, 0, 0, 27 }, /* ICP9047MA (Lancer) */
{ 0x9005, 0x0286, 0x9005, 0x02a1, 0, 0, 28 }, /* ICP9087MA (Lancer) */
{ 0x9005, 0x0286, 0x9005, 0x02a3, 0, 0, 29 }, /* ICP5085AU (Hurricane) */
{ 0x9005, 0x0285, 0x9005, 0x02a4, 0, 0, 30 }, /* ICP9085LI (Marauder-X) */
{ 0x9005, 0x0285, 0x9005, 0x02a5, 0, 0, 31 }, /* ICP5085BR (Marauder-E) */
{ 0x9005, 0x0287, 0x9005, 0x0800, 0, 0, 32 }, /* Themisto Jupiter Platform */
{ 0x9005, 0x0200, 0x9005, 0x0200, 0, 0, 32 }, /* Themisto Jupiter Platform */
{ 0x9005, 0x0286, 0x9005, 0x0800, 0, 0, 33 }, /* Callisto Jupiter Platform */
{ 0x9005, 0x0285, 0x9005, 0x028e, 0, 0, 34 }, /* ASR-2020SA SATA PCI-X ZCR (Skyhawk) */
{ 0x9005, 0x0285, 0x9005, 0x028f, 0, 0, 35 }, /* ASR-2025SA SATA SO-DIMM PCI-X ZCR (Terminator) */
{ 0x9005, 0x0285, 0x9005, 0x0290, 0, 0, 36 }, /* AAR-2410SA PCI SATA 4ch (Jaguar II) */
{ 0x9005, 0x0285, 0x1028, 0x0291, 0, 0, 37 }, /* CERC SATA RAID 2 PCI SATA 6ch (DellCorsair) */
{ 0x9005, 0x0285, 0x9005, 0x0292, 0, 0, 38 }, /* AAR-2810SA PCI SATA 8ch (Corsair-8) */
{ 0x9005, 0x0285, 0x9005, 0x0293, 0, 0, 39 }, /* AAR-21610SA PCI SATA 16ch (Corsair-16) */
{ 0x9005, 0x0285, 0x9005, 0x0294, 0, 0, 40 }, /* ESD SO-DIMM PCI-X SATA ZCR (Prowler) */
{ 0x9005, 0x0285, 0x103C, 0x3227, 0, 0, 41 }, /* AAR-2610SA PCI SATA 6ch */
{ 0x9005, 0x0285, 0x9005, 0x0296, 0, 0, 42 }, /* ASR-2240S (SabreExpress) */
{ 0x9005, 0x0285, 0x9005, 0x0297, 0, 0, 43 }, /* ASR-4005SAS */
{ 0x9005, 0x0285, 0x1014, 0x02F2, 0, 0, 44 }, /* IBM 8i (AvonPark) */
{ 0x9005, 0x0285, 0x1014, 0x0312, 0, 0, 44 }, /* IBM 8i (AvonPark Lite) */
{ 0x9005, 0x0285, 0x9005, 0x0298, 0, 0, 45 }, /* ASR-4000SAS (BlackBird) */
{ 0x9005, 0x0285, 0x9005, 0x0299, 0, 0, 46 }, /* ASR-4800SAS (Marauder-X) */
{ 0x9005, 0x0285, 0x9005, 0x029a, 0, 0, 47 }, /* ASR-4805SAS (Marauder-E) */
{ 0x9005, 0x0286, 0x9005, 0x02a2, 0, 0, 48 }, /* ASR-4810SAS (Hurricane */
{ 0x9005, 0x0285, 0x1028, 0x0287, 0, 0, 40 }, /* Perc 320/DC*/
{ 0x1011, 0x0046, 0x9005, 0x0365, 0, 0, 41 }, /* Adaptec 5400S (Mustang)*/
{ 0x1011, 0x0046, 0x9005, 0x0364, 0, 0, 42 }, /* Adaptec 5400S (Mustang)*/
{ 0x1011, 0x0046, 0x9005, 0x1364, 0, 0, 43 }, /* Dell PERC2/QC */
{ 0x1011, 0x0046, 0x103c, 0x10c2, 0, 0, 44 }, /* HP NetRAID-4M */
{ 0x9005, 0x0285, 0x1028, 0x0287, 0, 0, 49 }, /* Perc 320/DC*/
{ 0x1011, 0x0046, 0x9005, 0x0365, 0, 0, 50 }, /* Adaptec 5400S (Mustang)*/
{ 0x1011, 0x0046, 0x9005, 0x0364, 0, 0, 51 }, /* Adaptec 5400S (Mustang)*/
{ 0x1011, 0x0046, 0x9005, 0x1364, 0, 0, 52 }, /* Dell PERC2/QC */
{ 0x1011, 0x0046, 0x103c, 0x10c2, 0, 0, 53 }, /* HP NetRAID-4M */
{ 0x9005, 0x0285, 0x1028, PCI_ANY_ID, 0, 0, 45 }, /* Dell Catchall */
{ 0x9005, 0x0285, 0x17aa, PCI_ANY_ID, 0, 0, 46 }, /* Legend Catchall */
{ 0x9005, 0x0285, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 47 }, /* Adaptec Catch All */
{ 0x9005, 0x0286, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 48 }, /* Adaptec Rocket Catch All */
{ 0x9005, 0x0285, 0x1028, PCI_ANY_ID, 0, 0, 54 }, /* Dell Catchall */
{ 0x9005, 0x0285, 0x17aa, PCI_ANY_ID, 0, 0, 55 }, /* Legend Catchall */
{ 0x9005, 0x0285, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 56 }, /* Adaptec Catch All */
{ 0x9005, 0x0286, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 57 }, /* Adaptec Rocket Catch All */
{ 0,}
};
MODULE_DEVICE_TABLE(pci, aac_pci_tbl);
@ -164,6 +175,14 @@ static struct aac_driver_ident aac_drivers[] = {
{ aac_rkt_init, "aacraid", "ADAPTEC ", "AAR-2820SA ", 1 }, /* AAR-2820SA (Intruder) */
{ aac_rkt_init, "aacraid", "ADAPTEC ", "AAR-2620SA ", 1 }, /* AAR-2620SA (Intruder) */
{ aac_rkt_init, "aacraid", "ADAPTEC ", "AAR-2420SA ", 1 }, /* AAR-2420SA (Intruder) */
{ aac_rkt_init, "aacraid", "ICP ", "ICP9024R0 ", 2 }, /* ICP9024R0 (Lancer) */
{ aac_rkt_init, "aacraid", "ICP ", "ICP9014R0 ", 1 }, /* ICP9014R0 (Lancer) */
{ aac_rkt_init, "aacraid", "ICP ", "ICP9047MA ", 1 }, /* ICP9047MA (Lancer) */
{ aac_rkt_init, "aacraid", "ICP ", "ICP9087MA ", 1 }, /* ICP9087MA (Lancer) */
{ aac_rkt_init, "aacraid", "ICP ", "ICP5085AU ", 1 }, /* ICP5085AU (Hurricane) */
{ aac_rkt_init, "aacraid", "ICP ", "ICP9085LI ", 1 }, /* ICP9085LI (Marauder-X) */
{ aac_rkt_init, "aacraid", "ICP ", "ICP5085BR ", 1 }, /* ICP5085BR (Marauder-E) */
{ NULL , "aacraid", "ADAPTEC ", "Themisto ", 0, AAC_QUIRK_SLAVE }, /* Jupiter Platform */
{ aac_rkt_init, "aacraid", "ADAPTEC ", "Callisto ", 2, AAC_QUIRK_MASTER }, /* Jupiter Platform */
{ aac_rx_init, "aacraid", "ADAPTEC ", "ASR-2020SA ", 1 }, /* ASR-2020SA SATA PCI-X ZCR (Skyhawk) */
{ aac_rx_init, "aacraid", "ADAPTEC ", "ASR-2025SA ", 1 }, /* ASR-2025SA SATA SO-DIMM PCI-X ZCR (Terminator) */
@ -175,10 +194,11 @@ static struct aac_driver_ident aac_drivers[] = {
{ aac_rx_init, "aacraid", "ADAPTEC ", "AAR-2610SA ", 1 }, /* SATA 6Ch (Bearcat) */
{ aac_rx_init, "aacraid", "ADAPTEC ", "ASR-2240S ", 1 }, /* ASR-2240S (SabreExpress) */
{ aac_rx_init, "aacraid", "ADAPTEC ", "ASR-4005SAS ", 1 }, /* ASR-4005SAS */
{ aac_rx_init, "aacraid", "IBM ", "ServeRAID 8i ", 1 }, /* IBM 8i (AvonPark) */
{ aac_rx_init, "ServeRAID","IBM ", "ServeRAID 8i ", 1 }, /* IBM 8i (AvonPark) */
{ aac_rx_init, "aacraid", "ADAPTEC ", "ASR-4000SAS ", 1 }, /* ASR-4000SAS (BlackBird & AvonPark) */
{ aac_rx_init, "aacraid", "ADAPTEC ", "ASR-4800SAS ", 1 }, /* ASR-4800SAS (Marauder-X) */
{ aac_rx_init, "aacraid", "ADAPTEC ", "ASR-4805SAS ", 1 }, /* ASR-4805SAS (Marauder-E) */
{ aac_rx_init, "aacraid", "ADAPTEC ", "ASR-4810SAS ", 1 }, /* ASR-4810SAS (Hurricane) */
{ aac_rx_init, "percraid", "DELL ", "PERC 320/DC ", 2, AAC_QUIRK_31BIT | AAC_QUIRK_34SG }, /* Perc 320/DC*/
{ aac_sa_init, "aacraid", "ADAPTEC ", "Adaptec 5400S ", 4, AAC_QUIRK_34SG }, /* Adaptec 5400S (Mustang)*/
@ -681,7 +701,7 @@ static struct scsi_host_template aac_driver_template = {
.slave_configure = aac_slave_configure,
.eh_host_reset_handler = aac_eh_reset,
.can_queue = AAC_NUM_IO_FIB,
.this_id = 16,
.this_id = MAXIMUM_NUM_CONTAINERS,
.sg_tablesize = 16,
.max_sectors = 128,
#if (AAC_NUM_IO_FIB > 256)
@ -760,6 +780,7 @@ static int __devinit aac_probe_one(struct pci_dev *pdev,
if (pci_set_dma_mask(pdev, 0xFFFFFFFFULL))
goto out_free_fibs;
aac->maximum_num_channels = aac_drivers[index].channels;
aac_get_adapter_info(aac);
/*
@ -786,7 +807,7 @@ static int __devinit aac_probe_one(struct pci_dev *pdev,
* physical channels are address by their actual physical number+1
*/
if (aac->nondasd_support == 1)
shost->max_channel = aac_drivers[index].channels+1;
shost->max_channel = aac->maximum_num_channels + 1;
else
shost->max_channel = 1;
@ -795,6 +816,8 @@ static int __devinit aac_probe_one(struct pci_dev *pdev,
list_add(&aac->entry, insert);
shost->max_id = aac->maximum_num_containers;
if (shost->max_id < aac->maximum_num_physicals)
shost->max_id = aac->maximum_num_physicals;
if (shost->max_id < MAXIMUM_NUM_CONTAINERS)
shost->max_id = MAXIMUM_NUM_CONTAINERS;
else

View file

@ -4556,8 +4556,6 @@ advansys_detect(struct scsi_host_template *tpnt)
continue;
}
scsi_set_device(shp, dev);
/* Save a pointer to the Scsi_Host of each board found. */
asc_host[asc_board_count++] = shp;
@ -9194,8 +9192,8 @@ asc_prt_scsi_cmnd(struct scsi_cmnd *s)
s->sc_data_direction, s->resid);
printk(
" use_sg %u, sglist_len %u, abort_reason 0x%x\n",
s->use_sg, s->sglist_len, s->abort_reason);
" use_sg %u, sglist_len %u\n",
s->use_sg, s->sglist_len);
printk(
" serial_number 0x%x, retries %d, allowed %d\n",

View file

@ -254,19 +254,12 @@ aic7770_config(struct ahc_softc *ahc, struct aic7770_identity *entry, u_int io)
if (error != 0)
return (error);
ahc_list_lock(&l);
/*
* Link this softc in with all other ahc instances.
*/
ahc_softc_insert(ahc);
ahc->init_level++;
/*
* Enable the board's BUS drivers
*/
ahc_outb(ahc, BCTL, ENABLE);
ahc_list_unlock(&l);
return (0);
}

View file

@ -102,8 +102,7 @@ aic7770_probe(struct device *dev)
dev_set_drvdata(dev, ahc);
if (aic7xxx_detect_complete)
error = ahc_linux_register_host(ahc, &aic7xxx_driver_template);
error = ahc_linux_register_host(ahc, &aic7xxx_driver_template);
return (error);
}

View file

@ -1553,7 +1553,7 @@ ahd_linux_dev_reset(Scsi_Cmnd *cmd)
ahd_queue_scb(ahd, scb);
scb->platform_data->flags |= AHD_SCB_UP_EH_SEM;
spin_unlock_irq(&ahd->platform_data->spin_lock);
ahd_unlock(ahd, &s);
init_timer(&timer);
timer.data = (u_long)scb;
timer.expires = jiffies + (5 * HZ);
@ -1567,7 +1567,7 @@ ahd_linux_dev_reset(Scsi_Cmnd *cmd)
printf("Timer Expired\n");
retval = FAILED;
}
spin_lock_irq(&ahd->platform_data->spin_lock);
ahd_lock(ahd, &s);
ahd_schedule_runq(ahd);
ahd_linux_run_complete_queue(ahd);
ahd_unlock(ahd, &s);

View file

@ -1023,9 +1023,6 @@ struct ahc_softc {
struct cs *critical_sections;
u_int num_critical_sections;
/* Links for chaining softcs */
TAILQ_ENTRY(ahc_softc) links;
/* Channel Names ('A', 'B', etc.) */
char channel;
char channel_b;
@ -1110,9 +1107,6 @@ struct ahc_softc {
uint16_t user_tagenable;/* Tagged Queuing allowed */
};
TAILQ_HEAD(ahc_softc_tailq, ahc_softc);
extern struct ahc_softc_tailq ahc_tailq;
/************************ Active Device Information ***************************/
typedef enum {
ROLE_UNKNOWN,
@ -1198,7 +1192,6 @@ void ahc_intr_enable(struct ahc_softc *ahc, int enable);
void ahc_pause_and_flushwork(struct ahc_softc *ahc);
int ahc_suspend(struct ahc_softc *ahc);
int ahc_resume(struct ahc_softc *ahc);
void ahc_softc_insert(struct ahc_softc *);
void ahc_set_unit(struct ahc_softc *, int);
void ahc_set_name(struct ahc_softc *, char *);
void ahc_alloc_scbs(struct ahc_softc *ahc);

View file

@ -52,9 +52,6 @@
#include <dev/aic7xxx/aicasm/aicasm_insformat.h>
#endif
/****************************** Softc Data ************************************/
struct ahc_softc_tailq ahc_tailq = TAILQ_HEAD_INITIALIZER(ahc_tailq);
/***************************** Lookup Tables **********************************/
char *ahc_chip_names[] =
{
@ -3878,62 +3875,6 @@ ahc_softc_init(struct ahc_softc *ahc)
return (0);
}
void
ahc_softc_insert(struct ahc_softc *ahc)
{
struct ahc_softc *list_ahc;
#if AHC_PCI_CONFIG > 0
/*
* Second Function PCI devices need to inherit some
* settings from function 0.
*/
if ((ahc->chip & AHC_BUS_MASK) == AHC_PCI
&& (ahc->features & AHC_MULTI_FUNC) != 0) {
TAILQ_FOREACH(list_ahc, &ahc_tailq, links) {
ahc_dev_softc_t list_pci;
ahc_dev_softc_t pci;
list_pci = list_ahc->dev_softc;
pci = ahc->dev_softc;
if (ahc_get_pci_slot(list_pci) == ahc_get_pci_slot(pci)
&& ahc_get_pci_bus(list_pci) == ahc_get_pci_bus(pci)) {
struct ahc_softc *master;
struct ahc_softc *slave;
if (ahc_get_pci_function(list_pci) == 0) {
master = list_ahc;
slave = ahc;
} else {
master = ahc;
slave = list_ahc;
}
slave->flags &= ~AHC_BIOS_ENABLED;
slave->flags |=
master->flags & AHC_BIOS_ENABLED;
slave->flags &= ~AHC_PRIMARY_CHANNEL;
slave->flags |=
master->flags & AHC_PRIMARY_CHANNEL;
break;
}
}
}
#endif
/*
* Insertion sort into our list of softcs.
*/
list_ahc = TAILQ_FIRST(&ahc_tailq);
while (list_ahc != NULL
&& ahc_softc_comp(ahc, list_ahc) <= 0)
list_ahc = TAILQ_NEXT(list_ahc, links);
if (list_ahc != NULL)
TAILQ_INSERT_BEFORE(list_ahc, ahc, links);
else
TAILQ_INSERT_TAIL(&ahc_tailq, ahc, links);
ahc->init_level++;
}
void
ahc_set_unit(struct ahc_softc *ahc, int unit)
{

View file

@ -136,10 +136,6 @@ static struct scsi_transport_template *ahc_linux_transport_template = NULL;
#include <linux/blkdev.h> /* For block_size() */
#include <linux/delay.h> /* For ssleep/msleep */
/*
* Lock protecting manipulation of the ahc softc list.
*/
spinlock_t ahc_list_spinlock;
/*
* Set this to the delay in seconds after SCSI bus reset.
@ -291,25 +287,6 @@ ahc_print_path(struct ahc_softc *ahc, struct scb *scb)
*/
static uint32_t aic7xxx_no_reset;
/*
* Certain PCI motherboards will scan PCI devices from highest to lowest,
* others scan from lowest to highest, and they tend to do all kinds of
* strange things when they come into contact with PCI bridge chips. The
* net result of all this is that the PCI card that is actually used to boot
* the machine is very hard to detect. Most motherboards go from lowest
* PCI slot number to highest, and the first SCSI controller found is the
* one you boot from. The only exceptions to this are when a controller
* has its BIOS disabled. So, we by default sort all of our SCSI controllers
* from lowest PCI slot number to highest PCI slot number. We also force
* all controllers with their BIOS disabled to the end of the list. This
* works on *almost* all computers. Where it doesn't work, we have this
* option. Setting this option to non-0 will reverse the order of the sort
* to highest first, then lowest, but will still leave cards with their BIOS
* disabled at the very end. That should fix everyone up unless there are
* really strange cirumstances.
*/
static uint32_t aic7xxx_reverse_scan;
/*
* Should we force EXTENDED translation on a controller.
* 0 == Use whatever is in the SEEPROM or default to off
@ -337,13 +314,6 @@ static uint32_t aic7xxx_pci_parity = ~0;
*/
uint32_t aic7xxx_allow_memio = ~0;
/*
* aic7xxx_detect() has been run, so register all device arrivals
* immediately with the system rather than deferring to the sorted
* attachment performed by aic7xxx_detect().
*/
int aic7xxx_detect_complete;
/*
* So that we can set how long each device is given as a selection timeout.
* The table of values goes like this:
@ -423,7 +393,9 @@ static int ahc_linux_run_command(struct ahc_softc*,
static void ahc_linux_setup_tag_info_global(char *p);
static aic_option_callback_t ahc_linux_setup_tag_info;
static int aic7xxx_setup(char *s);
static int ahc_linux_next_unit(void);
static int ahc_linux_unit;
/********************************* Inlines ************************************/
static __inline void ahc_linux_unmap_scb(struct ahc_softc*, struct scb*);
@ -475,48 +447,6 @@ ahc_linux_map_seg(struct ahc_softc *ahc, struct scb *scb,
return (consumed);
}
/*
* Try to detect an Adaptec 7XXX controller.
*/
static int
ahc_linux_detect(struct scsi_host_template *template)
{
struct ahc_softc *ahc;
int found = 0;
/*
* If we've been passed any parameters, process them now.
*/
if (aic7xxx)
aic7xxx_setup(aic7xxx);
template->proc_name = "aic7xxx";
/*
* Initialize our softc list lock prior to
* probing for any adapters.
*/
ahc_list_lockinit();
found = ahc_linux_pci_init();
if (!ahc_linux_eisa_init())
found++;
/*
* Register with the SCSI layer all
* controllers we've found.
*/
TAILQ_FOREACH(ahc, &ahc_tailq, links) {
if (ahc_linux_register_host(ahc, template) == 0)
found++;
}
aic7xxx_detect_complete++;
return (found);
}
/*
* Return a string describing the driver.
*/
@ -848,6 +778,7 @@ ahc_linux_bus_reset(struct scsi_cmnd *cmd)
struct scsi_host_template aic7xxx_driver_template = {
.module = THIS_MODULE,
.name = "aic7xxx",
.proc_name = "aic7xxx",
.proc_info = ahc_linux_proc_info,
.info = ahc_linux_info,
.queuecommand = ahc_linux_queue,
@ -959,99 +890,6 @@ ahc_dmamap_unload(struct ahc_softc *ahc, bus_dma_tag_t dmat, bus_dmamap_t map)
return (0);
}
/********************* Platform Dependent Functions ***************************/
/*
* Compare "left hand" softc with "right hand" softc, returning:
* < 0 - lahc has a lower priority than rahc
* 0 - Softcs are equal
* > 0 - lahc has a higher priority than rahc
*/
int
ahc_softc_comp(struct ahc_softc *lahc, struct ahc_softc *rahc)
{
int value;
int rvalue;
int lvalue;
/*
* Under Linux, cards are ordered as follows:
* 1) VLB/EISA BIOS enabled devices sorted by BIOS address.
* 2) PCI devices with BIOS enabled sorted by bus/slot/func.
* 3) All remaining VLB/EISA devices sorted by ioport.
* 4) All remaining PCI devices sorted by bus/slot/func.
*/
value = (lahc->flags & AHC_BIOS_ENABLED)
- (rahc->flags & AHC_BIOS_ENABLED);
if (value != 0)
/* Controllers with BIOS enabled have a *higher* priority */
return (value);
/*
* Same BIOS setting, now sort based on bus type.
* EISA and VL controllers sort together. EISA/VL
* have higher priority than PCI.
*/
rvalue = (rahc->chip & AHC_BUS_MASK);
if (rvalue == AHC_VL)
rvalue = AHC_EISA;
lvalue = (lahc->chip & AHC_BUS_MASK);
if (lvalue == AHC_VL)
lvalue = AHC_EISA;
value = rvalue - lvalue;
if (value != 0)
return (value);
/* Still equal. Sort by BIOS address, ioport, or bus/slot/func. */
switch (rvalue) {
#ifdef CONFIG_PCI
case AHC_PCI:
{
char primary_channel;
if (aic7xxx_reverse_scan != 0)
value = ahc_get_pci_bus(lahc->dev_softc)
- ahc_get_pci_bus(rahc->dev_softc);
else
value = ahc_get_pci_bus(rahc->dev_softc)
- ahc_get_pci_bus(lahc->dev_softc);
if (value != 0)
break;
if (aic7xxx_reverse_scan != 0)
value = ahc_get_pci_slot(lahc->dev_softc)
- ahc_get_pci_slot(rahc->dev_softc);
else
value = ahc_get_pci_slot(rahc->dev_softc)
- ahc_get_pci_slot(lahc->dev_softc);
if (value != 0)
break;
/*
* On multi-function devices, the user can choose
* to have function 1 probed before function 0.
* Give whichever channel is the primary channel
* the highest priority.
*/
primary_channel = (lahc->flags & AHC_PRIMARY_CHANNEL) + 'A';
value = -1;
if (lahc->channel == primary_channel)
value = 1;
break;
}
#endif
case AHC_EISA:
if ((rahc->flags & AHC_BIOS_ENABLED) != 0) {
value = rahc->platform_data->bios_address
- lahc->platform_data->bios_address;
} else {
value = rahc->bsh.ioport
- lahc->bsh.ioport;
}
break;
default:
panic("ahc_softc_sort: invalid bus type");
}
return (value);
}
static void
ahc_linux_setup_tag_info_global(char *p)
{
@ -1103,7 +941,6 @@ aic7xxx_setup(char *s)
#ifdef AHC_DEBUG
{ "debug", &ahc_debug },
#endif
{ "reverse_scan", &aic7xxx_reverse_scan },
{ "periodic_otag", &aic7xxx_periodic_otag },
{ "pci_parity", &aic7xxx_pci_parity },
{ "seltime", &aic7xxx_seltime },
@ -1178,7 +1015,7 @@ ahc_linux_register_host(struct ahc_softc *ahc, struct scsi_host_template *templa
host->max_lun = AHC_NUM_LUNS;
host->max_channel = (ahc->features & AHC_TWIN) ? 1 : 0;
host->sg_tablesize = AHC_NSEG;
ahc_set_unit(ahc, ahc_linux_next_unit());
ahc_set_unit(ahc, ahc_linux_unit++);
sprintf(buf, "scsi%d", host->host_no);
new_name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT);
if (new_name != NULL) {
@ -1206,29 +1043,6 @@ ahc_linux_get_memsize(void)
return ((uint64_t)si.totalram << PAGE_SHIFT);
}
/*
* Find the smallest available unit number to use
* for a new device. We don't just use a static
* count to handle the "repeated hot-(un)plug"
* scenario.
*/
static int
ahc_linux_next_unit(void)
{
struct ahc_softc *ahc;
int unit;
unit = 0;
retry:
TAILQ_FOREACH(ahc, &ahc_tailq, links) {
if (ahc->unit == unit) {
unit++;
goto retry;
}
}
return (unit);
}
/*
* Place the SCSI bus into a known state by either resetting it,
* or forcing transfer negotiations on the next command to any
@ -2633,6 +2447,11 @@ static void ahc_linux_set_dt(struct scsi_target *starget, int dt)
ahc_unlock(ahc, &flags);
}
#if 0
/* FIXME: This code claims to support IU and QAS. However, the actual
* sequencer code and aic7xxx_core have no support for these parameters and
* will get into a bad state if they're negotiated. Do not enable this
* unless you know what you're doing */
static void ahc_linux_set_qas(struct scsi_target *starget, int qas)
{
struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
@ -2688,6 +2507,7 @@ static void ahc_linux_set_iu(struct scsi_target *starget, int iu)
ppr_options, AHC_TRANS_GOAL, FALSE);
ahc_unlock(ahc, &flags);
}
#endif
static struct spi_function_template ahc_linux_transport_functions = {
.set_offset = ahc_linux_set_offset,
@ -2698,10 +2518,12 @@ static struct spi_function_template ahc_linux_transport_functions = {
.show_width = 1,
.set_dt = ahc_linux_set_dt,
.show_dt = 1,
#if 0
.set_iu = ahc_linux_set_iu,
.show_iu = 1,
.set_qas = ahc_linux_set_qas,
.show_qas = 1,
#endif
};
@ -2709,18 +2531,25 @@ static struct spi_function_template ahc_linux_transport_functions = {
static int __init
ahc_linux_init(void)
{
ahc_linux_transport_template = spi_attach_transport(&ahc_linux_transport_functions);
/*
* If we've been passed any parameters, process them now.
*/
if (aic7xxx)
aic7xxx_setup(aic7xxx);
ahc_linux_transport_template =
spi_attach_transport(&ahc_linux_transport_functions);
if (!ahc_linux_transport_template)
return -ENODEV;
scsi_transport_reserve_target(ahc_linux_transport_template,
sizeof(struct ahc_linux_target));
scsi_transport_reserve_device(ahc_linux_transport_template,
sizeof(struct ahc_linux_device));
if (ahc_linux_detect(&aic7xxx_driver_template))
return 0;
spi_release_transport(ahc_linux_transport_template);
ahc_linux_exit();
return -ENODEV;
ahc_linux_pci_init();
ahc_linux_eisa_init();
return 0;
}
static void

View file

@ -132,7 +132,6 @@ typedef struct scsi_cmnd *ahc_io_ctx_t;
/************************* Configuration Data *********************************/
extern u_int aic7xxx_no_probe;
extern u_int aic7xxx_allow_memio;
extern int aic7xxx_detect_complete;
extern struct scsi_host_template aic7xxx_driver_template;
/***************************** Bus Space/DMA **********************************/
@ -510,15 +509,6 @@ void ahc_format_transinfo(struct info_str *info,
/******************************** Locking *************************************/
/* Lock protecting internal data structures */
static __inline void ahc_lockinit(struct ahc_softc *);
static __inline void ahc_lock(struct ahc_softc *, unsigned long *flags);
static __inline void ahc_unlock(struct ahc_softc *, unsigned long *flags);
/* Lock held during ahc_list manipulation and ahc softc frees */
extern spinlock_t ahc_list_spinlock;
static __inline void ahc_list_lockinit(void);
static __inline void ahc_list_lock(unsigned long *flags);
static __inline void ahc_list_unlock(unsigned long *flags);
static __inline void
ahc_lockinit(struct ahc_softc *ahc)
@ -538,24 +528,6 @@ ahc_unlock(struct ahc_softc *ahc, unsigned long *flags)
spin_unlock_irqrestore(&ahc->platform_data->spin_lock, *flags);
}
static __inline void
ahc_list_lockinit(void)
{
spin_lock_init(&ahc_list_spinlock);
}
static __inline void
ahc_list_lock(unsigned long *flags)
{
spin_lock_irqsave(&ahc_list_spinlock, *flags);
}
static __inline void
ahc_list_unlock(unsigned long *flags)
{
spin_unlock_irqrestore(&ahc_list_spinlock, *flags);
}
/******************************* PCI Definitions ******************************/
/*
* PCIM_xxx: mask to locate subfield in register
@ -892,7 +864,6 @@ int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
irqreturn_t
ahc_linux_isr(int irq, void *dev_id, struct pt_regs * regs);
void ahc_platform_flushwork(struct ahc_softc *ahc);
int ahc_softc_comp(struct ahc_softc *, struct ahc_softc *);
void ahc_done(struct ahc_softc*, struct scb*);
void ahc_send_async(struct ahc_softc *, char channel,
u_int target, u_int lun, ac_code, void *);

View file

@ -143,10 +143,6 @@ ahc_linux_pci_dev_remove(struct pci_dev *pdev)
struct ahc_softc *ahc = pci_get_drvdata(pdev);
u_long s;
ahc_list_lock(&s);
TAILQ_REMOVE(&ahc_tailq, ahc, links);
ahc_list_unlock(&s);
ahc_lock(ahc, &s);
ahc_intr_enable(ahc, FALSE);
ahc_unlock(ahc, &s);
@ -208,8 +204,7 @@ ahc_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
return (-error);
}
pci_set_drvdata(pdev, ahc);
if (aic7xxx_detect_complete)
ahc_linux_register_host(ahc, &aic7xxx_driver_template);
ahc_linux_register_host(ahc, &aic7xxx_driver_template);
return (0);
}

View file

@ -704,7 +704,6 @@ ahc_find_pci_device(ahc_dev_softc_t pci)
int
ahc_pci_config(struct ahc_softc *ahc, struct ahc_pci_identity *entry)
{
u_long l;
u_int command;
u_int our_id;
u_int sxfrctl1;
@ -964,12 +963,7 @@ ahc_pci_config(struct ahc_softc *ahc, struct ahc_pci_identity *entry)
if (error != 0)
return (error);
ahc_list_lock(&l);
/*
* Link this softc in with all other ahc instances.
*/
ahc_softc_insert(ahc);
ahc_list_unlock(&l);
ahc->init_level++;
return (0);
}

View file

@ -155,9 +155,9 @@ ahc_dump_target_state(struct ahc_softc *ahc, struct info_str *info,
copy_info(info, "\tUser: ");
ahc_format_transinfo(info, &tinfo->user);
starget = ahc->platform_data->starget[target_offset];
targ = scsi_transport_target_data(starget);
if (targ == NULL)
if (!starget)
return;
targ = scsi_transport_target_data(starget);
copy_info(info, "\tGoal: ");
ahc_format_transinfo(info, &tinfo->goal);

View file

@ -8448,7 +8448,6 @@ aic7xxx_alloc(Scsi_Host_Template *sht, struct aic7xxx_host *temp)
}
p->host_no = host->host_no;
}
scsi_set_device(host, &p->pdev->dev);
return (p);
}

View file

@ -336,7 +336,6 @@ int cpqfcTS_detect(Scsi_Host_Template *ScsiHostTemplate)
DEBUG_PCI(printk(" PciDev->baseaddress[3]= %lx\n",
PciDev->resource[3].start));
scsi_set_device(HostAdapter, &PciDev->dev);
HostAdapter->irq = PciDev->irq; // copy for Scsi layers
// HP Tachlite uses two (255-byte) ranges of Port I/O (lower & upper),

View file

@ -382,7 +382,6 @@ static int adpt_queue(struct scsi_cmnd * cmd, void (*done) (struct scsi_cmnd *))
{
adpt_hba* pHba = NULL;
struct adpt_device* pDev = NULL; /* dpt per device information */
ulong timeout = jiffies + (TMOUT_SCSI*HZ);
cmd->scsi_done = done;
/*
@ -418,11 +417,6 @@ static int adpt_queue(struct scsi_cmnd * cmd, void (*done) (struct scsi_cmnd *))
return 1;
}
if(cmd->eh_state != SCSI_STATE_QUEUED){
// If we are not doing error recovery
mod_timer(&cmd->eh_timeout, timeout);
}
// TODO if the cmd->device if offline then I may need to issue a bus rescan
// followed by a get_lct to see if the device is there anymore
if((pDev = (struct adpt_device*) (cmd->device->hostdata)) == NULL) {

View file

@ -1899,16 +1899,6 @@ static int eata2x_eh_abort(struct scsi_cmnd *SCarg)
printk("%s: abort, mbox %d, interrupt pending.\n",
ha->board_name, i);
if (SCarg->eh_state == SCSI_STATE_TIMEOUT) {
unmap_dma(i, ha);
SCarg->host_scribble = NULL;
ha->cp_stat[i] = FREE;
printk
("%s, abort, mbox %d, eh_state timeout, pid %ld.\n",
ha->board_name, i, SCarg->pid);
return SUCCESS;
}
return FAILED;
}

View file

@ -449,7 +449,7 @@ static int eata_pio_abort(struct scsi_cmnd *cmd)
{
uint loop = HZ;
DBG(DBG_ABNORM, printk(KERN_WARNING "eata_pio_abort called pid: %ld " "target: %x lun: %x reason %x\n", cmd->pid, cmd->device->id, cmd->device->lun, cmd->abort_reason));
DBG(DBG_ABNORM, printk(KERN_WARNING "eata_pio_abort called pid: %ld " "target: %x lun: %x\n", cmd->pid, cmd->device->id, cmd->device->lun));
while (inb(cmd->device->host->base + HA_RAUXSTAT) & HA_ABUSY)
@ -484,7 +484,7 @@ static int eata_pio_host_reset(struct scsi_cmnd *cmd)
struct scsi_cmnd *sp;
struct Scsi_Host *host = cmd->device->host;
DBG(DBG_ABNORM, printk(KERN_WARNING "eata_pio_reset called pid:%ld target:" " %x lun: %x reason %x\n", cmd->pid, cmd->device->id, cmd->device->lun, cmd->abort_reason));
DBG(DBG_ABNORM, printk(KERN_WARNING "eata_pio_reset called pid:%ld target:" " %x lun: %x\n", cmd->pid, cmd->device->id, cmd->device->lun));
spin_lock_irq(host->host_lock);

View file

@ -938,7 +938,6 @@ struct Scsi_Host *__fdomain_16x0_detect(struct scsi_host_template *tpnt )
}
shpnt->irq = interrupt_level;
shpnt->io_port = port_base;
scsi_set_device(shpnt, &pdev->dev);
shpnt->n_io_port = 0x10;
print_banner( shpnt );

View file

@ -4521,9 +4521,7 @@ static int __init gdth_detect(Scsi_Host_Template *shtp)
ha->virt_bus = hdr_channel;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
scsi_set_device(shp, &pcistr[ctr].pdev->dev);
#else
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
scsi_set_pci_device(shp, pcistr[ctr].pdev);
#endif
if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat &GDT_64BIT)||

View file

@ -180,11 +180,6 @@ static void scsi_host_dev_release(struct device *dev)
scsi_destroy_command_freelist(shost);
kfree(shost->shost_data);
/*
* Some drivers (eg aha1542) do scsi_register()/scsi_unregister()
* during probing without performing a scsi_set_device() in between.
* In this case dev->parent is NULL.
*/
if (parent)
put_device(parent);
kfree(shost);

View file

@ -87,7 +87,7 @@ static int max_channel = 3;
static int init_timeout = 5;
static int max_requests = 50;
#define IBMVSCSI_VERSION "1.5.5"
#define IBMVSCSI_VERSION "1.5.6"
MODULE_DESCRIPTION("IBM Virtual SCSI");
MODULE_AUTHOR("Dave Boutcher");
@ -675,8 +675,6 @@ static void send_mad_adapter_info(struct ibmvscsi_host_data *hostdata)
struct viosrp_adapter_info *req;
struct srp_event_struct *evt_struct;
memset(&hostdata->madapter_info, 0x00, sizeof(hostdata->madapter_info));
evt_struct = get_event_struct(&hostdata->pool);
if (!evt_struct) {
printk(KERN_ERR "ibmvscsi: couldn't allocate an event "

View file

@ -33,6 +33,10 @@
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include "ibmvscsi.h"
#include "srp.h"
static char partition_name[97] = "UNKNOWN";
static unsigned int partition_number = -1;
/* ------------------------------------------------------------
* Routines for managing the command/response queue
@ -148,6 +152,48 @@ static void ibmvscsi_task(void *data)
}
}
static void gather_partition_info(void)
{
struct device_node *rootdn;
char *ppartition_name;
unsigned int *p_number_ptr;
/* Retrieve information about this partition */
rootdn = find_path_device("/");
if (!rootdn) {
return;
}
ppartition_name =
get_property(rootdn, "ibm,partition-name", NULL);
if (ppartition_name)
strncpy(partition_name, ppartition_name,
sizeof(partition_name));
p_number_ptr =
(unsigned int *)get_property(rootdn, "ibm,partition-no",
NULL);
if (p_number_ptr)
partition_number = *p_number_ptr;
}
static void set_adapter_info(struct ibmvscsi_host_data *hostdata)
{
memset(&hostdata->madapter_info, 0x00,
sizeof(hostdata->madapter_info));
printk(KERN_INFO "rpa_vscsi: SPR_VERSION: %s\n", SRP_VERSION);
strcpy(hostdata->madapter_info.srp_version, SRP_VERSION);
strncpy(hostdata->madapter_info.partition_name, partition_name,
sizeof(hostdata->madapter_info.partition_name));
hostdata->madapter_info.partition_number = partition_number;
hostdata->madapter_info.mad_version = 1;
hostdata->madapter_info.os_type = 2;
}
/**
* initialize_crq_queue: - Initializes and registers CRQ with hypervisor
* @queue: crq_queue to initialize and register
@ -177,6 +223,9 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
if (dma_mapping_error(queue->msg_token))
goto map_failed;
gather_partition_info();
set_adapter_info(hostdata);
rc = plpar_hcall_norets(H_REG_CRQ,
vdev->unit_address,
queue->msg_token, PAGE_SIZE);
@ -246,6 +295,8 @@ void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
memset(queue->msgs, 0x00, PAGE_SIZE);
queue->cur = 0;
set_adapter_info(hostdata);
/* And re-open it again */
rc = plpar_hcall_norets(H_REG_CRQ,
vdev->unit_address,

View file

@ -28,6 +28,8 @@
#ifndef SRP_H
#define SRP_H
#define SRP_VERSION "16.a"
#define PACKED __attribute__((packed))
enum srp_types {

View file

@ -111,7 +111,7 @@
#define IPS_UNREGISTER_HOSTS(SHT)
#define IPS_ADD_HOST(shost,device) do { scsi_add_host(shost,device); scsi_scan_host(shost); } while (0)
#define IPS_REMOVE_HOST(shost) scsi_remove_host(shost)
#define IPS_SCSI_SET_DEVICE(sh,ha) scsi_set_device(sh, &(ha)->pcidev->dev)
#define IPS_SCSI_SET_DEVICE(sh,ha) do { } while (0)
#define IPS_PRINTK(level, pcidev, format, arg...) \
dev_printk(level , &((pcidev)->dev) , format , ## arg)
#endif

View file

@ -2866,7 +2866,7 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc)
if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
struct scsi_cmnd *cmd = qc->scsicmd;
if (!scsi_eh_eflags_chk(cmd, SCSI_EH_CANCEL_CMD)) {
if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
/* finish completing original command */
__ata_qc_complete(qc);
@ -3750,7 +3750,7 @@ static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
host->max_channel = 1;
host->unique_id = ata_unique_id++;
host->max_cmd_len = 12;
scsi_set_device(host, ent->dev);
scsi_assign_lock(host, &host_set->lock);
ap->flags = ATA_FLAG_PORT_DISABLED;

View file

@ -1,26 +1,24 @@
#/*******************************************************************
# * This file is part of the Emulex Linux Device Driver for *
# * Enterprise Fibre Channel Host Bus Adapters. *
# * Refer to the README file included with this package for *
# * driver version and adapter support. *
# * Copyright (C) 2004 Emulex Corporation. *
# * Fibre Channel Host Bus Adapters. *
# * Copyright (C) 2004-2005 Emulex. All rights reserved. *
# * EMULEX and SLI are trademarks of Emulex. *
# * www.emulex.com *
# * *
# * This program is free software; you can redistribute it and/or *
# * modify it under the terms of the GNU General Public License *
# * as published by the Free Software Foundation; either version 2 *
# * of the License, or (at your option) any later version. *
# * *
# * This program is distributed in the hope that it will be useful, *
# * but WITHOUT ANY WARRANTY; without even the implied warranty of *
# * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
# * GNU General Public License for more details, a copy of which *
# * can be found in the file COPYING included with this package. *
# * modify it under the terms of version 2 of the GNU General *
# * Public License as published by the Free Software Foundation. *
# * This program is distributed in the hope that it will be useful. *
# * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
# * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
# * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
# * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
# * TO BE LEGALLY INVALID. See the GNU General Public License for *
# * more details, a copy of which can be found in the file COPYING *
# * included with this package. *
# *******************************************************************/
######################################################################
#$Id: Makefile 1.58 2005/01/23 19:00:32EST sf_support Exp $
ifneq ($(GCOV),)
EXTRA_CFLAGS += -fprofile-arcs -ftest-coverage
EXTRA_CFLAGS += -O0

View file

@ -1,27 +1,24 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* Portions Copyright (C) 2004-2005 Christoph Hellwig *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc.h 1.167 2005/04/07 08:47:05EDT sf_support Exp $
*/
struct lpfc_sli2_slim;
#define LPFC_MAX_TARGET 256 /* max targets supported */

View file

@ -1,27 +1,24 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* Portions Copyright (C) 2004-2005 Christoph Hellwig *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_attr.c 1.24 2005/04/13 11:58:55EDT sf_support Exp $
*/
#include <linux/ctype.h>
#include <linux/pci.h>
#include <linux/interrupt.h>

View file

@ -1,26 +1,24 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_compat.h 1.32 2005/01/25 17:51:45EST sf_support Exp $
*
* This file provides macros to aid compilation in the Linux 2.4 kernel
* over various platform architectures.
*/

View file

@ -1,27 +1,23 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_crtn.h 1.166 2005/04/07 08:46:47EDT sf_support Exp $
*/
void lpfc_dump_mem(struct lpfc_hba *, LPFC_MBOXQ_t *, uint16_t);
void lpfc_read_nv(struct lpfc_hba *, LPFC_MBOXQ_t *);
int lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb,
@ -195,6 +191,9 @@ int lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
void lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
struct lpfc_iocbq * queue1,
struct lpfc_iocbq * queue2);
void lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba,
struct lpfc_iocbq * cmdiocb,
struct lpfc_iocbq * rspiocb);
void *lpfc_mbuf_alloc(struct lpfc_hba *, int, dma_addr_t *);
void lpfc_mbuf_free(struct lpfc_hba *, void *, dma_addr_t);

View file

@ -1,26 +1,24 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_ct.c 1.161 2005/04/13 11:59:01EDT sf_support Exp $
*
* Fibre Channel SCSI LAN Device Driver CT support
*/

View file

@ -1,27 +1,23 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_disc.h 1.61 2005/04/07 08:46:52EDT sf_support Exp $
*/
#define FC_MAX_HOLD_RSCN 32 /* max number of deferred RSCNs */
#define FC_MAX_NS_RSP 65536 /* max size NameServer rsp */
#define FC_MAXLOOP 126 /* max devices supported on a fc loop */

View file

@ -1,27 +1,24 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* Portions Copyright (C) 2004-2005 Christoph Hellwig *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_els.c 1.186 2005/04/13 14:26:55EDT sf_support Exp $
*/
#include <linux/blkdev.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
@ -3139,7 +3136,7 @@ lpfc_els_unsol_event(struct lpfc_hba * phba,
case ELS_CMD_PLOGI:
phba->fc_stat.elsRcvPLOGI++;
if (phba->hba_state < LPFC_DISC_AUTH) {
rjt_err = LSEXP_NOTHING_MORE;
rjt_err = 1;
break;
}
lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_PLOGI);
@ -3154,7 +3151,7 @@ lpfc_els_unsol_event(struct lpfc_hba * phba,
case ELS_CMD_LOGO:
phba->fc_stat.elsRcvLOGO++;
if (phba->hba_state < LPFC_DISC_AUTH) {
rjt_err = LSEXP_NOTHING_MORE;
rjt_err = 1;
break;
}
lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_LOGO);
@ -3162,7 +3159,7 @@ lpfc_els_unsol_event(struct lpfc_hba * phba,
case ELS_CMD_PRLO:
phba->fc_stat.elsRcvPRLO++;
if (phba->hba_state < LPFC_DISC_AUTH) {
rjt_err = LSEXP_NOTHING_MORE;
rjt_err = 1;
break;
}
lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_PRLO);
@ -3177,7 +3174,7 @@ lpfc_els_unsol_event(struct lpfc_hba * phba,
case ELS_CMD_ADISC:
phba->fc_stat.elsRcvADISC++;
if (phba->hba_state < LPFC_DISC_AUTH) {
rjt_err = LSEXP_NOTHING_MORE;
rjt_err = 1;
break;
}
lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_ADISC);
@ -3185,7 +3182,7 @@ lpfc_els_unsol_event(struct lpfc_hba * phba,
case ELS_CMD_PDISC:
phba->fc_stat.elsRcvPDISC++;
if (phba->hba_state < LPFC_DISC_AUTH) {
rjt_err = LSEXP_NOTHING_MORE;
rjt_err = 1;
break;
}
lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_PDISC);
@ -3209,7 +3206,7 @@ lpfc_els_unsol_event(struct lpfc_hba * phba,
case ELS_CMD_PRLI:
phba->fc_stat.elsRcvPRLI++;
if (phba->hba_state < LPFC_DISC_AUTH) {
rjt_err = LSEXP_NOTHING_MORE;
rjt_err = 1;
break;
}
lpfc_disc_state_machine(phba, ndlp, elsiocb, NLP_EVT_RCV_PRLI);
@ -3220,7 +3217,7 @@ lpfc_els_unsol_event(struct lpfc_hba * phba,
break;
default:
/* Unsupported ELS command, reject */
rjt_err = LSEXP_NOTHING_MORE;
rjt_err = 1;
/* Unknown ELS command <elsCmd> received from NPORT <did> */
lpfc_printf_log(phba, KERN_ERR, LOG_ELS,
@ -3236,7 +3233,7 @@ lpfc_els_unsol_event(struct lpfc_hba * phba,
if (rjt_err) {
stat.un.b.lsRjtRsvd0 = 0;
stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
stat.un.b.lsRjtRsnCodeExp = rjt_err;
stat.un.b.lsRjtRsnCodeExp = LSEXP_NOTHING_MORE;
stat.un.b.vendorUnique = 0;
lpfc_els_rsp_reject(phba, stat.un.lsRjtError, elsiocb, ndlp);
}

View file

@ -1,27 +1,24 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* Portions Copyright (C) 2004-2005 Christoph Hellwig *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_hbadisc.c 1.266 2005/04/13 11:59:06EDT sf_support Exp $
*/
#include <linux/blkdev.h>
#include <linux/pci.h>
#include <linux/kthread.h>
@ -61,14 +58,7 @@ static void lpfc_disc_timeout_handler(struct lpfc_hba *);
static void
lpfc_process_nodev_timeout(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp)
{
if (!(ndlp->nlp_type & NLP_FABRIC)) {
/* Nodev timeout on NPort <nlp_DID> */
lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
"%d:0203 Nodev timeout on NPort x%x "
"Data: x%x x%x x%x\n",
phba->brd_no, ndlp->nlp_DID, ndlp->nlp_flag,
ndlp->nlp_state, ndlp->nlp_rpi);
}
int warn_on = 0;
spin_lock_irq(phba->host->host_lock);
if (!(ndlp->nlp_flag & NLP_NODEV_TMO)) {
@ -79,12 +69,27 @@ lpfc_process_nodev_timeout(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp)
ndlp->nlp_flag &= ~NLP_NODEV_TMO;
if (ndlp->nlp_sid != NLP_NO_SID) {
warn_on = 1;
/* flush the target */
lpfc_sli_abort_iocb(phba, &phba->sli.ring[phba->sli.fcp_ring],
ndlp->nlp_sid, 0, 0, LPFC_CTX_TGT);
}
spin_unlock_irq(phba->host->host_lock);
if (warn_on) {
lpfc_printf_log(phba, KERN_ERR, LOG_DISCOVERY,
"%d:0203 Nodev timeout on NPort x%x "
"Data: x%x x%x x%x\n",
phba->brd_no, ndlp->nlp_DID, ndlp->nlp_flag,
ndlp->nlp_state, ndlp->nlp_rpi);
} else {
lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
"%d:0204 Nodev timeout on NPort x%x "
"Data: x%x x%x x%x\n",
phba->brd_no, ndlp->nlp_DID, ndlp->nlp_flag,
ndlp->nlp_state, ndlp->nlp_rpi);
}
lpfc_disc_state_machine(phba, ndlp, NULL, NLP_EVT_DEVICE_RM);
return;
}

View file

@ -1,27 +1,23 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_hw.h 1.37 2005/03/29 19:51:45EST sf_support Exp $
*/
#define FDMI_DID 0xfffffaU
#define NameServer_DID 0xfffffcU
#define SCR_DID 0xfffffdU
@ -2214,20 +2210,20 @@ typedef union {
* SLI-2 specific structures
*/
typedef struct {
uint32_t cmdPutInx;
uint32_t rspGetInx;
} HGP;
struct lpfc_hgp {
__le32 cmdPutInx;
__le32 rspGetInx;
};
typedef struct {
uint32_t cmdGetInx;
uint32_t rspPutInx;
} PGP;
struct lpfc_pgp {
__le32 cmdGetInx;
__le32 rspPutInx;
};
typedef struct _SLI2_DESC {
HGP host[MAX_RINGS];
struct lpfc_hgp host[MAX_RINGS];
uint32_t unused1[16];
PGP port[MAX_RINGS];
struct lpfc_pgp port[MAX_RINGS];
} SLI2_DESC;
typedef union {

View file

@ -1,27 +1,24 @@
/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Enterprise Fibre Channel Host Bus Adapters. *
* Refer to the README file included with this package for *
* driver version and adapter support. *
* Copyright (C) 2004 Emulex Corporation. *
* Fibre Channel Host Bus Adapters. *
* Copyright (C) 2004-2005 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* Portions Copyright (C) 2004-2005 Christoph Hellwig *
* *
* This program is free software; you can redistribute it and/or *
* modify it under the terms of the GNU General Public License *
* as published by the Free Software Foundation; either version 2 *
* of the License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details, a copy of which *
* can be found in the file COPYING included with this package. *
* modify it under the terms of version 2 of the GNU General *
* Public License as published by the Free Software Foundation. *
* This program is distributed in the hope that it will be useful. *
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
* TO BE LEGALLY INVALID. See the GNU General Public License for *
* more details, a copy of which can be found in the file COPYING *
* included with this package. *
*******************************************************************/
/*
* $Id: lpfc_init.c 1.233 2005/04/13 11:59:09EDT sf_support Exp $
*/
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
@ -780,6 +777,9 @@ lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
pci_read_config_dword(phba->pcidev, PCI_VENDOR_ID, &id);
switch ((id >> 16) & 0xffff) {
case PCI_DEVICE_ID_FIREFLY:
strcpy(str, "LP6000 1");
break;
case PCI_DEVICE_ID_SUPERFLY:
if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
strcpy(str, "LP7000 1");
@ -837,6 +837,9 @@ lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
case PCI_DEVICE_ID_LP10000S:
strcpy(str, "LP10000-S 2");
break;
default:
memset(str, 0, 16);
break;
}
if (mdp)
sscanf(str, "%s", mdp);
@ -1662,6 +1665,8 @@ lpfc_pci_remove_one(struct pci_dev *pdev)
static struct pci_device_id lpfc_id_table[] = {
{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
PCI_ANY_ID, PCI_ANY_ID, },
{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
PCI_ANY_ID, PCI_ANY_ID, },
{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
PCI_ANY_ID, PCI_ANY_ID, },
{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
@ -1712,6 +1717,7 @@ lpfc_init(void)
int error = 0;
printk(LPFC_MODULE_DESC "\n");
printk(LPFC_COPYRIGHT "\n");
lpfc_transport_template =
fc_attach_transport(&lpfc_transport_functions);

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