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ath9k_hw: add TX/RX gain register initialization for AR9003
This is done depending on what the EEPROM settings indicates. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1827,6 +1827,20 @@ static u16 ath9k_hw_ar9300_get_spur_channel(struct ath_hw *ah,
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return AR_NO_SPUR;
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return AR_NO_SPUR;
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}
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}
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s32 ar9003_hw_get_tx_gain_idx(struct ath_hw *ah)
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{
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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return (eep->baseEepHeader.txrxgain >> 4) & 0xf; /* bits 7:4 */
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}
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s32 ar9003_hw_get_rx_gain_idx(struct ath_hw *ah)
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{
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
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}
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const struct eeprom_ops eep_ar9300_ops = {
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const struct eeprom_ops eep_ar9300_ops = {
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.check_eeprom = ath9k_hw_ar9300_check_eeprom,
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.check_eeprom = ath9k_hw_ar9300_check_eeprom,
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.get_eeprom = ath9k_hw_ar9300_get_eeprom,
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.get_eeprom = ath9k_hw_ar9300_get_eeprom,
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@ -316,4 +316,8 @@ struct ar9300_eeprom {
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u8 ctl_freqbin_5G[AR9300_NUM_CTLS_5G][AR9300_NUM_BAND_EDGES_5G];
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u8 ctl_freqbin_5G[AR9300_NUM_CTLS_5G][AR9300_NUM_BAND_EDGES_5G];
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struct cal_ctl_data_5g ctlPowerData_5G[AR9300_NUM_CTLS_5G];
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struct cal_ctl_data_5g ctlPowerData_5G[AR9300_NUM_CTLS_5G];
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} __packed;
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} __packed;
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s32 ar9003_hw_get_tx_gain_idx(struct ath_hw *ah);
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s32 ar9003_hw_get_rx_gain_idx(struct ath_hw *ah);
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#endif
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#endif
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@ -105,6 +105,56 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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3);
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3);
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}
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}
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static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
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{
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switch (ar9003_hw_get_tx_gain_idx(ah)) {
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case 0:
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default:
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_lowest_ob_db_tx_gain_table_2p0,
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ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0),
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5);
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break;
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case 1:
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_high_ob_db_tx_gain_table_2p0,
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ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p0),
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5);
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break;
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case 2:
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9300Modes_low_ob_db_tx_gain_table_2p0,
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ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p0),
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5);
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break;
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}
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}
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static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
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{
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switch (ar9003_hw_get_rx_gain_idx(ah)) {
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case 0:
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default:
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INIT_INI_ARRAY(&ah->iniModesRxGain, ar9300Common_rx_gain_table_2p0,
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ARRAY_SIZE(ar9300Common_rx_gain_table_2p0),
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2);
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break;
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case 1:
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9300Common_wo_xlna_rx_gain_table_2p0,
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ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p0),
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2);
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break;
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}
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}
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/* set gain table pointers according to values read from the eeprom */
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static void ar9003_hw_init_mode_gain_regs(struct ath_hw *ah)
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{
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ar9003_tx_gain_table_apply(ah);
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ar9003_rx_gain_table_apply(ah);
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}
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/*
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/*
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* Helper for ASPM support.
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* Helper for ASPM support.
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*
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*
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@ -143,6 +193,7 @@ void ar9003_hw_attach_ops(struct ath_hw *ah)
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struct ath_hw_ops *ops = ath9k_hw_ops(ah);
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struct ath_hw_ops *ops = ath9k_hw_ops(ah);
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priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
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priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
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priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
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priv_ops->macversion_supported = ar9003_hw_macversion_supported;
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priv_ops->macversion_supported = ar9003_hw_macversion_supported;
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ops->config_pci_powersave = ar9003_hw_configpcipowersave;
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ops->config_pci_powersave = ar9003_hw_configpcipowersave;
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