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https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
EDAC/ghes: Scan the system once on driver init
Change the hardware scanning and figuring out how many DIMMs a machine has to a single, one-time thing which happens once on driver init. After that scanning completes, struct ghes_hw_desc contains a representation of the hardware which the driver can then use for later initialization. Then, copy the DIMM information into the respective EDAC core representation of those. Get rid of ghes_edac_dimm_fill and use a struct dimm_info array directly. This way, hw detection and further driver initialization is nicely and logically split. Further additions should all be added to ghes_scan_system() and the hw representation extended as needed. There should be no functionality change resulting from this patch. Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
Borislav Petkov
parent
b001694d60
commit
b9cae27728
1 changed files with 165 additions and 112 deletions
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@ -32,6 +32,15 @@ static refcount_t ghes_refcount = REFCOUNT_INIT(0);
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*/
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static struct ghes_pvt *ghes_pvt;
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/*
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* This driver's representation of the system hardware, as collected
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* from DMI.
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*/
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struct ghes_hw_desc {
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int num_dimms;
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struct dimm_info *dimms;
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} ghes_hw;
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/* GHES registration mutex */
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static DEFINE_MUTEX(ghes_reg_mutex);
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@ -72,19 +81,6 @@ struct memdev_dmi_entry {
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u16 conf_mem_clk_speed;
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} __attribute__((__packed__));
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struct ghes_edac_dimm_fill {
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struct mem_ctl_info *mci;
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unsigned int count;
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};
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static void ghes_edac_count_dimms(const struct dmi_header *dh, void *arg)
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{
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int *num_dimm = arg;
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if (dh->type == DMI_ENTRY_MEM_DEVICE)
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(*num_dimm)++;
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}
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static struct dimm_info *find_dimm_by_handle(struct mem_ctl_info *mci, u16 handle)
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{
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struct dimm_info *dimm;
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@ -108,102 +104,135 @@ static void dimm_setup_label(struct dimm_info *dimm, u16 handle)
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snprintf(dimm->label, sizeof(dimm->label), "%s %s", bank, device);
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}
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static void ghes_edac_dmidecode(const struct dmi_header *dh, void *arg)
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static void assign_dmi_dimm_info(struct dimm_info *dimm, struct memdev_dmi_entry *entry)
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{
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struct ghes_edac_dimm_fill *dimm_fill = arg;
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struct mem_ctl_info *mci = dimm_fill->mci;
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u16 rdr_mask = BIT(7) | BIT(13);
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if (dh->type == DMI_ENTRY_MEM_DEVICE) {
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struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
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struct dimm_info *dimm = edac_get_dimm(mci, dimm_fill->count, 0, 0);
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u16 rdr_mask = BIT(7) | BIT(13);
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if (entry->size == 0xffff) {
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pr_info("Can't get DIMM%i size\n",
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dimm_fill->count);
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dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
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} else if (entry->size == 0x7fff) {
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dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
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} else {
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if (entry->size & BIT(15))
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dimm->nr_pages = MiB_TO_PAGES((entry->size & 0x7fff) << 10);
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else
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dimm->nr_pages = MiB_TO_PAGES(entry->size);
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}
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switch (entry->memory_type) {
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case 0x12:
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if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR;
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else
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dimm->mtype = MEM_DDR;
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break;
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case 0x13:
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if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR2;
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else
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dimm->mtype = MEM_DDR2;
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break;
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case 0x14:
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dimm->mtype = MEM_FB_DDR2;
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break;
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case 0x18:
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if (entry->type_detail & BIT(12))
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dimm->mtype = MEM_NVDIMM;
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else if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR3;
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else
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dimm->mtype = MEM_DDR3;
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break;
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case 0x1a:
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if (entry->type_detail & BIT(12))
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dimm->mtype = MEM_NVDIMM;
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else if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR4;
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else
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dimm->mtype = MEM_DDR4;
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break;
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default:
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if (entry->type_detail & BIT(6))
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dimm->mtype = MEM_RMBS;
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else if ((entry->type_detail & rdr_mask) == rdr_mask)
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dimm->mtype = MEM_RDR;
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else if (entry->type_detail & BIT(7))
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dimm->mtype = MEM_SDR;
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else if (entry->type_detail & BIT(9))
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dimm->mtype = MEM_EDO;
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else
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dimm->mtype = MEM_UNKNOWN;
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}
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/*
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* Actually, we can only detect if the memory has bits for
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* checksum or not
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*/
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if (entry->total_width == entry->data_width)
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dimm->edac_mode = EDAC_NONE;
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if (entry->size == 0xffff) {
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pr_info("Can't get DIMM%i size\n", dimm->idx);
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dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
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} else if (entry->size == 0x7fff) {
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dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
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} else {
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if (entry->size & BIT(15))
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dimm->nr_pages = MiB_TO_PAGES((entry->size & 0x7fff) << 10);
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else
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dimm->edac_mode = EDAC_SECDED;
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dimm->nr_pages = MiB_TO_PAGES(entry->size);
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}
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dimm->dtype = DEV_UNKNOWN;
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dimm->grain = 128; /* Likely, worse case */
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switch (entry->memory_type) {
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case 0x12:
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if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR;
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else
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dimm->mtype = MEM_DDR;
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break;
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case 0x13:
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if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR2;
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else
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dimm->mtype = MEM_DDR2;
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break;
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case 0x14:
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dimm->mtype = MEM_FB_DDR2;
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break;
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case 0x18:
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if (entry->type_detail & BIT(12))
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dimm->mtype = MEM_NVDIMM;
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else if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR3;
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else
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dimm->mtype = MEM_DDR3;
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break;
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case 0x1a:
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if (entry->type_detail & BIT(12))
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dimm->mtype = MEM_NVDIMM;
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else if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR4;
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else
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dimm->mtype = MEM_DDR4;
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break;
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default:
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if (entry->type_detail & BIT(6))
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dimm->mtype = MEM_RMBS;
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else if ((entry->type_detail & rdr_mask) == rdr_mask)
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dimm->mtype = MEM_RDR;
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else if (entry->type_detail & BIT(7))
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dimm->mtype = MEM_SDR;
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else if (entry->type_detail & BIT(9))
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dimm->mtype = MEM_EDO;
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else
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dimm->mtype = MEM_UNKNOWN;
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}
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dimm_setup_label(dimm, entry->handle);
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/*
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* Actually, we can only detect if the memory has bits for
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* checksum or not
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*/
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if (entry->total_width == entry->data_width)
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dimm->edac_mode = EDAC_NONE;
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else
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dimm->edac_mode = EDAC_SECDED;
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if (dimm->nr_pages) {
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edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
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dimm_fill->count, edac_mem_types[dimm->mtype],
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PAGES_TO_MiB(dimm->nr_pages),
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(dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
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edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
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entry->memory_type, entry->type_detail,
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entry->total_width, entry->data_width);
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dimm->dtype = DEV_UNKNOWN;
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dimm->grain = 128; /* Likely, worse case */
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dimm_setup_label(dimm, entry->handle);
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if (dimm->nr_pages) {
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edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
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dimm->idx, edac_mem_types[dimm->mtype],
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PAGES_TO_MiB(dimm->nr_pages),
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(dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
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edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
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entry->memory_type, entry->type_detail,
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entry->total_width, entry->data_width);
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}
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dimm->smbios_handle = entry->handle;
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}
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static void enumerate_dimms(const struct dmi_header *dh, void *arg)
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{
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struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
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struct ghes_hw_desc *hw = (struct ghes_hw_desc *)arg;
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struct dimm_info *d;
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if (dh->type != DMI_ENTRY_MEM_DEVICE)
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return;
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/* Enlarge the array with additional 16 */
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if (!hw->num_dimms || !(hw->num_dimms % 16)) {
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struct dimm_info *new;
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new = krealloc(hw->dimms, (hw->num_dimms + 16) * sizeof(struct dimm_info),
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GFP_KERNEL);
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if (!new) {
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WARN_ON_ONCE(1);
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return;
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}
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dimm->smbios_handle = entry->handle;
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dimm_fill->count++;
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hw->dimms = new;
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}
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d = &hw->dimms[hw->num_dimms];
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d->idx = hw->num_dimms;
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assign_dmi_dimm_info(d, entry);
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hw->num_dimms++;
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}
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static void ghes_scan_system(void)
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{
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static bool scanned;
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if (scanned)
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return;
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dmi_walk(enumerate_dimms, &ghes_hw);
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scanned = true;
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}
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void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
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@ -466,13 +495,12 @@ static struct acpi_platform_list plat_list[] = {
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int ghes_edac_register(struct ghes *ghes, struct device *dev)
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{
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bool fake = false;
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int rc = 0, num_dimm = 0;
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struct mem_ctl_info *mci;
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struct ghes_pvt *pvt;
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struct edac_mc_layer layers[1];
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struct ghes_edac_dimm_fill dimm_fill;
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unsigned long flags;
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int idx = -1;
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int rc = 0;
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if (IS_ENABLED(CONFIG_X86)) {
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/* Check if safe to enable on this system */
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@ -492,17 +520,16 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
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if (refcount_inc_not_zero(&ghes_refcount))
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goto unlock;
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/* Get the number of DIMMs */
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dmi_walk(ghes_edac_count_dimms, &num_dimm);
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ghes_scan_system();
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/* Check if we've got a bogus BIOS */
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if (num_dimm == 0) {
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if (!ghes_hw.num_dimms) {
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fake = true;
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num_dimm = 1;
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ghes_hw.num_dimms = 1;
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}
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layers[0].type = EDAC_MC_LAYER_ALL_MEM;
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layers[0].size = num_dimm;
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layers[0].size = ghes_hw.num_dimms;
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layers[0].is_virt_csrow = true;
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mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_pvt));
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@ -533,13 +560,34 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
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pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
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pr_info("If you find incorrect reports, please contact your hardware vendor\n");
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pr_info("to correct its BIOS.\n");
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pr_info("This system has %d DIMM sockets.\n", num_dimm);
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pr_info("This system has %d DIMM sockets.\n", ghes_hw.num_dimms);
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}
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if (!fake) {
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dimm_fill.count = 0;
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dimm_fill.mci = mci;
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dmi_walk(ghes_edac_dmidecode, &dimm_fill);
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struct dimm_info *src, *dst;
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int i = 0;
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mci_for_each_dimm(mci, dst) {
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src = &ghes_hw.dimms[i];
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dst->idx = src->idx;
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dst->smbios_handle = src->smbios_handle;
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dst->nr_pages = src->nr_pages;
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dst->mtype = src->mtype;
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dst->edac_mode = src->edac_mode;
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dst->dtype = src->dtype;
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dst->grain = src->grain;
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/*
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* If no src->label, preserve default label assigned
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* from EDAC core.
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*/
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if (strlen(src->label))
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memcpy(dst->label, src->label, sizeof(src->label));
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i++;
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}
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} else {
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struct dimm_info *dimm = edac_get_dimm(mci, 0, 0, 0);
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@ -552,7 +600,7 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
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rc = edac_mc_add_mc(mci);
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if (rc < 0) {
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pr_info("Can't register at EDAC core\n");
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pr_info("Can't register with the EDAC core\n");
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edac_mc_free(mci);
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rc = -ENODEV;
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goto unlock;
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@ -566,6 +614,11 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
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refcount_set(&ghes_refcount, 1);
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unlock:
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/* Not needed anymore */
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kfree(ghes_hw.dimms);
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ghes_hw.dimms = NULL;
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mutex_unlock(&ghes_reg_mutex);
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return rc;
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