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net: ipa: implement MAX_READS_BEATS QSB data
Starting with IPA v4.0, a limit is placed on the number of bytes outstanding in a transaction, to reduce latency. The limit is imposed only if this value is non-zero. We don't use a non-zero value for SC7180, but newer versions of IPA do. Prepare for that by allowing a programmed value to be specified in the platform configuration data. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -14,6 +14,7 @@ static const struct ipa_qsb_data ipa_qsb_data[] = {
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[IPA_QSB_MASTER_DDR] = {
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.max_writes = 8,
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.max_reads = 12,
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/* no outstanding read byte (beat) limit */
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},
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};
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@ -59,10 +59,12 @@ enum ipa_qsb_master_id {
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* struct ipa_qsb_data - Qualcomm System Bus configuration data
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* @max_writes: Maximum outstanding write requests for this master
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* @max_reads: Maximum outstanding read requests for this master
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* @max_reads_beats: Max outstanding read bytes in 8-byte "beats" (if non-zero)
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*/
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struct ipa_qsb_data {
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u8 max_writes;
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u8 max_reads;
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u8 max_reads_beats; /* Not present for IPA v3.5.1 */
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};
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/**
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@ -274,10 +274,16 @@ ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data)
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/* Max outstanding read accesses for QSB masters */
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val = u32_encode_bits(data0->max_reads, GEN_QMB_0_MAX_READS_FMASK);
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/* GEN_QMB_0_MAX_READS_BEATS is 0 (IPA v4.0 and above) */
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if (data->qsb_count > 1)
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if (ipa->version >= IPA_VERSION_4_0)
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val |= u32_encode_bits(data0->max_reads_beats,
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GEN_QMB_0_MAX_READS_BEATS_FMASK);
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if (data->qsb_count > 1) {
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val |= u32_encode_bits(data1->max_reads,
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GEN_QMB_1_MAX_READS_FMASK);
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if (ipa->version >= IPA_VERSION_4_0)
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val |= u32_encode_bits(data1->max_reads_beats,
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GEN_QMB_1_MAX_READS_BEATS_FMASK);
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}
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iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET);
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}
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